interesting
/
riscv-openocd
mirror of https://github.com/riscv/riscv-openocd.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

target/arm_adi_v5: move DP register definitions to one block 

DP and MEM-AP definitions were mixed.

Change-Id: I2f691b2274c01e9090c1e5160c6903d3207e35c2
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/6138
Tested-by: jenkins
This commit is contained in:
Tomas Vanek 2021-04-06 13:46:07 +02:00
parent 4455469847
commit ab337d05f4
1 changed files with 9 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

17
src/target/arm_adi_v5.h
View File

@ -85,6 +85,15 @@
#define CSYSPWRUPREQ (1UL << 30) #define CSYSPWRUPREQ (1UL << 30)
#define CSYSPWRUPACK (1UL << 31) #define CSYSPWRUPACK (1UL << 31)
#define DP_SELECT_APSEL 0xFF000000
#define DP_SELECT_APBANK 0x000000F0
#define DP_SELECT_DPBANK 0x0000000F
#define DP_SELECT_INVALID 0x00FFFF00 /* Reserved bits one */
#define DP_APSEL_MAX (255)
#define DP_APSEL_INVALID (-1)
/* MEM-AP register addresses */ /* MEM-AP register addresses */
#define MEM_AP_REG_CSW 0x00 #define MEM_AP_REG_CSW 0x00
#define MEM_AP_REG_TAR 0x04 #define MEM_AP_REG_TAR 0x04
@ -150,14 +159,6 @@
#define IDR_JEP106_ARM 0x04760000 #define IDR_JEP106_ARM 0x04760000
#define DP_SELECT_APSEL 0xFF000000
#define DP_SELECT_APBANK 0x000000F0
#define DP_SELECT_DPBANK 0x0000000F
#define DP_SELECT_INVALID 0x00FFFF00 /* Reserved bits one */
#define DP_APSEL_MAX (255)
#define DP_APSEL_INVALID (-1)
/* FIXME: not SWD specific; should be renamed, e.g. adiv5_special_seq */ /* FIXME: not SWD specific; should be renamed, e.g. adiv5_special_seq */
enum swd_special_seq { enum swd_special_seq {
LINE_RESET, LINE_RESET,