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omap4430: fix reset sequence 

* Write to the PRM reset control register should have been 'phys';
* Setup empty reset-assert handlers for the M3's, since the board-level reset
  takes care of them;
* Remove the dbginit cruft, because it gets called implicitly on reset.

Signed-off-by: Aaron Carroll <aaronc@cse.unsw.edu.au>
This commit is contained in:
Aaron Carroll 2011-02-02 18:16:26 +11:00 committed by Øyvind Harboe
parent efcea8306a
commit aaf145c422
1 changed files with 3 additions and 8 deletions
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11
tcl/target/omap4430.cfg
View File

@ -92,15 +92,10 @@ jtag configure $_CHIPNAME.jrc -event setup "
jtag tapenable $_CHIPNAME.m31_dap
"
proc omap4_dbginit {target} {
# General Cortex A9 debug initialisation
cortex_a9 dbginit
}
$_TARGETNAME configure -event reset-assert-post "omap4_dbginit $_TARGETNAME"
# Assume SRST is unavailable (e.g. TI-14 JTAG), so we must assert reset
# ourselves using PRM_RSTCTRL. 1 is a warm reset, 2 a cold reset.
set PRM_RSTCTRL 0x4A307B00
$_TARGETNAME configure -event reset-assert "$_TARGETNAME mww $PRM_RSTCTRL 0x1"
$_TARGETNAME configure -event reset-assert "$_TARGETNAME mww phys $PRM_RSTCTRL 0x1"
$_CHIPNAME.m30 configure -event reset-assert { }
$_CHIPNAME.m31 configure -event reset-assert { }