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tcl/target/ti_k3: Add AM62P SoC 

Add support for the TI K3 family AM62P SoC. This SoC is built on the
same base of AM62A7, so reuse the configuration with the exception of
the JTAG ID and the actual name used for the R5 core (moved from main
domain to wakeup domain).

For further details, see https://www.ti.com/lit/pdf/spruj83

Signed-off-by: Nishanth Menon <nm@ti.com>
Change-Id: I3a80be9e71204ed7697e51ac1ad488ef405744ef
Reviewed-on: https://review.openocd.org/c/openocd/+/7892
Reviewed-by: Bryan Brattlof <hello@bryanbrattlof.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
This commit is contained in:
Nishanth Menon 2023-09-06 10:21:09 -05:00 committed by Antonio Borneo
parent d8575ab8ab
commit a7b77ac84f
1 changed files with 11 additions and 2 deletions
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13
tcl/target/ti_k3.cfg
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@ -18,6 +18,8 @@
# Has 4 ARMV8 Cores and 1 R5 Core and an M4F
# * AM62a7: https://www.ti.com/lit/pdf/spruj16a
# Has 4 ARMV8 Cores and 2 R5 Cores
# * AM62P: https://www.ti.com/lit/pdf/spruj83
# Has 4 ARMV8 Cores and 2 R5 Cores
#
source [find target/swj-dp.tcl]
@ -130,16 +132,17 @@ switch $_soc {
set _dmem_emu_base_address_map_to 0x1d500000
set _dmem_emu_ap_list 1
}
am62p -
am62a7 {
set _K3_DAP_TAPID 0x0bb8d02f
# AM62a7 has 1 clusters of 4 A53 cores.
# AM62a7/AM62P has 1 cluster of 4 A53 cores.
set _armv8_cpu_name a53
set _armv8_cores 4
set ARMV8_DBGBASE {0x90010000 0x90110000 0x90210000 0x90310000}
set ARMV8_CTIBASE {0x90020000 0x90120000 0x90220000 0x90320000}
# AM62a7 has 2 cluster of 1 R5s core.
# AM62a7/AM62P has 2 cluster of 1 R5 core.
set _r5_cores 2
set R5_NAMES {main0_r5.0 mcu0_r5.0}
set R5_DBGBASE {0x9d410000 0x9d810000}
@ -149,6 +152,12 @@ switch $_soc {
set CM3_CTIBASE {0x20001000}
# Sysctrl power-ap unlock offsets
set _sysctrl_ap_unlock_offsets {0xf0 0x78}
# Overrides for am62p
if { "$_soc" == "am62p" } {
set _K3_DAP_TAPID 0x0bb9d02f
set R5_NAMES {wkup0_r5.0 mcu0_r5.0}
}
}
j721e {
set _K3_DAP_TAPID 0x0bb6402f