flash/nor/kinetis: add support for NXP S32K series
S32K General-Purpose Microcontrollers Scalable, low-power Arm® Cortex®-M series-based microcontrollers AEC-Q100 qualified with advanced safety and security and software support for industrial and automotive ASIL B/D applications in body, zone control, and electrification. Change-Id: I4143258535437c18b81802436267bfd561de9d31 Signed-off-by: David Vidrie Leon <davidvidrie@geotab.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8012 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
This commit is contained in:
David Vidrie Leon
Antonio Borneo
parent
0886730f5a
commit
a77d280bd0
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@ -6824,16 +6824,23 @@ nor is Chip Erase (only Sector Erase is implemented).}
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@deffn {Flash Driver} {kinetis}
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@cindex kinetis
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Kx, KLx, KVx and KE1x members of the Kinetis microcontroller family
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from NXP (former Freescale) include
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internal flash and use ARM Cortex-M0+ or M4 cores. The driver automatically
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Several microcontrollers from NXP (former Freescale), including
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Kx, KLx, KVx and KE1x members of the Kinetis family,
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and S32K11x/S32K14x microcontrollers, include
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internal flash and use ARM Cortex-M0+ or M4 cores.
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Kinetis and S32K1 families use incompatible
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identification registers, so the driver assumes Kinetis and requires
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a driver option to indicate S32K1 is to be used.
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Within the familiy, the driver automatically
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recognizes flash size and a number of flash banks (1-4) using the chip
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identification register, and autoconfigures itself.
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Use kinetis_ke driver for KE0x and KEAx devices.
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The @var{kinetis} driver defines option:
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@itemize
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@item -sim-base @var{addr} ... base of System Integration Module where chip identification resides. Driver tries two known locations if option is omitted.
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@item -s32k select S32K11x/S32K14x microcontroller flash support.
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@item -sim-base @var{addr} ... base of System Integration Module where chip identification resides. Driver tries known locations if option is omitted.
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@end itemize
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@example
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@ -6882,6 +6889,7 @@ command completes.
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@deffn {Command} {kinetis nvm_partition}
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For FlexNVM devices only (KxxDX and KxxFX).
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Not supported (yet) on S32K1 devices.
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Command shows or sets data flash or EEPROM backup size in kilobytes,
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sets two EEPROM blocks sizes in bytes and enables/disables loading
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of EEPROM contents to FlexRAM during reset.
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@ -80,6 +80,7 @@
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#define FLEXRAM 0x14000000
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#define MSCM_OCMDR0 0x40001400
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#define MSCM_OCMDR1 0x40001404
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#define FMC_PFB01CR 0x4001f004
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#define FTFX_FSTAT 0x40020000
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#define FTFX_FCNFG 0x40020001
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@ -230,6 +231,28 @@
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#define KINETIS_SDID_PROJECTID_KE1XF 0x00000080
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#define KINETIS_SDID_PROJECTID_KE1XZ 0x00000100
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/* The S32K series uses a different, incompatible SDID layout :
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* Bit 31-28 : GENERATION
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* Bit 27-24 : SUBSERIES
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* Bit 23-20 : DERIVATE
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* Bit 19-16 : RAMSIZE
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* Bit 15-12 : REVID
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* Bit 11-8 : PACKAGE
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* Bit 7-0 : FEATURES
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*/
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#define KINETIS_SDID_S32K_SERIES_MASK 0xFF000000 /* GENERATION + SUBSERIES */
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#define KINETIS_SDID_S32K_SERIES_K11X 0x11000000
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#define KINETIS_SDID_S32K_SERIES_K14X 0x14000000
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#define KINETIS_SDID_S32K_DERIVATE_MASK 0x00F00000
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#define KINETIS_SDID_S32K_DERIVATE_KXX2 0x00200000
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#define KINETIS_SDID_S32K_DERIVATE_KXX3 0x00300000
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#define KINETIS_SDID_S32K_DERIVATE_KXX4 0x00400000
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#define KINETIS_SDID_S32K_DERIVATE_KXX5 0x00500000
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#define KINETIS_SDID_S32K_DERIVATE_KXX6 0x00600000
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#define KINETIS_SDID_S32K_DERIVATE_KXX8 0x00800000
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struct kinetis_flash_bank {
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struct kinetis_chip *k_chip;
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bool probed;
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@ -275,6 +298,11 @@ struct kinetis_chip {
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uint32_t progr_accel_ram;
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uint32_t sim_base;
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enum {
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CT_KINETIS = 0,
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CT_S32K,
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} chip_type;
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enum {
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FS_PROGRAM_SECTOR = 1,
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FS_PROGRAM_LONGWORD = 2,
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@ -290,6 +318,7 @@ struct kinetis_chip {
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KINETIS_CACHE_K, /* invalidate using FMC->PFB0CR/PFB01CR */
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KINETIS_CACHE_L, /* invalidate using MCM->PLACR */
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KINETIS_CACHE_MSCM, /* devices like KE1xF, invalidate MSCM->OCMDR0 */
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KINETIS_CACHE_MSCM2, /* devices like S32K, invalidate MSCM->OCMDR0 and MSCM->OCMDR1 */
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} cache_type;
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enum {
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@ -392,6 +421,7 @@ const struct flash_driver kinetis_flash;
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static int kinetis_write_inner(struct flash_bank *bank, const uint8_t *buffer,
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uint32_t offset, uint32_t count);
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static int kinetis_probe_chip(struct kinetis_chip *k_chip);
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static int kinetis_probe_chip_s32k(struct kinetis_chip *k_chip);
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static int kinetis_auto_probe(struct flash_bank *bank);
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@ -877,6 +907,8 @@ static int kinetis_chip_options(struct kinetis_chip *k_chip, int argc, const cha
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if (strcmp(argv[i], "-sim-base") == 0) {
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if (i + 1 < argc)
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k_chip->sim_base = strtoul(argv[++i], NULL, 0);
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} else if (strcmp(argv[i], "-s32k") == 0) {
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k_chip->chip_type = CT_S32K;
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} else
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LOG_ERROR("Unsupported flash bank option %s", argv[i]);
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}
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@ -1140,7 +1172,13 @@ static int kinetis_disable_wdog(struct kinetis_chip *k_chip)
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int retval;
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if (!k_chip->probed) {
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switch (k_chip->chip_type) {
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case CT_S32K:
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retval = kinetis_probe_chip_s32k(k_chip);
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break;
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default:
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retval = kinetis_probe_chip(k_chip);
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}
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if (retval != ERROR_OK)
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return retval;
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}
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@ -1639,6 +1677,12 @@ static void kinetis_invalidate_flash_cache(struct kinetis_chip *k_chip)
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/* disable data prefetch and flash speculate */
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break;
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case KINETIS_CACHE_MSCM2:
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target_write_u32(target, MSCM_OCMDR0, 0x30);
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target_write_u32(target, MSCM_OCMDR1, 0x30);
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/* disable data prefetch and flash speculate */
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break;
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default:
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break;
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}
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@ -2048,6 +2092,174 @@ static int kinetis_write(struct flash_bank *bank, const uint8_t *buffer,
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}
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static int kinetis_probe_chip_s32k(struct kinetis_chip *k_chip)
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{
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int result;
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uint8_t fcfg1_eesize, fcfg1_depart;
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uint32_t ee_size = 0;
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uint32_t pflash_size_k, nvm_size_k, dflash_size_k;
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unsigned int generation = 0, subseries = 0, derivate = 0;
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struct target *target = k_chip->target;
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k_chip->probed = false;
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k_chip->pflash_sector_size = 0;
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k_chip->pflash_base = 0;
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k_chip->nvm_base = 0x10000000;
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k_chip->progr_accel_ram = FLEXRAM;
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k_chip->flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR;
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k_chip->watchdog_type = KINETIS_WDOG32_KE1X;
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if (k_chip->sim_base == 0)
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k_chip->sim_base = SIM_BASE;
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result = target_read_u32(target, k_chip->sim_base + SIM_SDID_OFFSET, &k_chip->sim_sdid);
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if (result != ERROR_OK)
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return result;
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generation = (k_chip->sim_sdid) >> 28 & 0x0f;
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subseries = (k_chip->sim_sdid) >> 24 & 0x0f;
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derivate = (k_chip->sim_sdid) >> 20 & 0x0f;
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switch (k_chip->sim_sdid & KINETIS_SDID_S32K_SERIES_MASK) {
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case KINETIS_SDID_S32K_SERIES_K11X:
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k_chip->cache_type = KINETIS_CACHE_L;
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k_chip->num_pflash_blocks = 1;
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k_chip->num_nvm_blocks = 1;
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/* Non-interleaved */
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k_chip->max_flash_prog_size = 512;
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switch (k_chip->sim_sdid & KINETIS_SDID_S32K_DERIVATE_MASK) {
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case KINETIS_SDID_S32K_DERIVATE_KXX6:
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/* S32K116 CPU 48Mhz Flash 128KB RAM 17KB+2KB */
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/* Non-Interleaved */
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k_chip->pflash_size = 128 << 10;
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k_chip->pflash_sector_size = 2 << 10;
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/* Non-Interleaved */
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k_chip->nvm_size = 32 << 10;
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k_chip->nvm_sector_size = 2 << 10;
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break;
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case KINETIS_SDID_S32K_DERIVATE_KXX8:
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/* S32K118 CPU 80Mhz Flash 256KB+32KB RAM 32KB+4KB */
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/* Non-Interleaved */
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k_chip->pflash_size = 256 << 10;
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k_chip->pflash_sector_size = 2 << 10;
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/* Non-Interleaved */
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k_chip->nvm_size = 32 << 10;
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k_chip->nvm_sector_size = 2 << 10;
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break;
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}
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break;
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case KINETIS_SDID_S32K_SERIES_K14X:
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k_chip->cache_type = KINETIS_CACHE_MSCM2;
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k_chip->num_pflash_blocks = 1;
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k_chip->num_nvm_blocks = 1;
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/* Non-interleaved */
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k_chip->max_flash_prog_size = 512;
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switch (k_chip->sim_sdid & KINETIS_SDID_S32K_DERIVATE_MASK) {
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case KINETIS_SDID_S32K_DERIVATE_KXX2:
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case KINETIS_SDID_S32K_DERIVATE_KXX3:
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/* S32K142/S32K142W CPU 80Mhz Flash 256KB+64KB RAM 32KB+4KB */
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/* Non-Interleaved */
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k_chip->pflash_size = 256 << 10;
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k_chip->pflash_sector_size = 2 << 10;
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/* Non-Interleaved */
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k_chip->nvm_size = 64 << 10;
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k_chip->nvm_sector_size = 2 << 10;
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break;
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case KINETIS_SDID_S32K_DERIVATE_KXX4:
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case KINETIS_SDID_S32K_DERIVATE_KXX5:
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/* S32K144/S32K144W CPU 80Mhz Flash 512KB+64KB RAM 64KB+4KB */
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/* Interleaved */
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k_chip->pflash_size = 512 << 10;
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k_chip->pflash_sector_size = 4 << 10;
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/* Non-Interleaved */
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k_chip->nvm_size = 64 << 10;
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k_chip->nvm_sector_size = 2 << 10;
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break;
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case KINETIS_SDID_S32K_DERIVATE_KXX6:
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/* S32K146 CPU 80Mhz Flash 1024KB+64KB RAM 128KB+4KB */
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/* Interleaved */
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k_chip->pflash_size = 1024 << 10;
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k_chip->pflash_sector_size = 4 << 10;
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k_chip->num_pflash_blocks = 2;
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/* Non-Interleaved */
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k_chip->nvm_size = 64 << 10;
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k_chip->nvm_sector_size = 2 << 10;
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break;
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case KINETIS_SDID_S32K_DERIVATE_KXX8:
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/* S32K148 CPU 80Mhz Flash 1536KB+512KB RAM 256KB+4KB */
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/* Interleaved */
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k_chip->pflash_size = 1536 << 10;
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k_chip->pflash_sector_size = 4 << 10;
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k_chip->num_pflash_blocks = 3;
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/* Interleaved */
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k_chip->nvm_size = 512 << 10;
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k_chip->nvm_sector_size = 4 << 10;
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/* Interleaved */
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k_chip->max_flash_prog_size = 1 << 10;
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break;
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}
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break;
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default:
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LOG_ERROR("Unsupported S32K1xx-series");
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}
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if (k_chip->pflash_sector_size == 0) {
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LOG_ERROR("MCU is unsupported, SDID 0x%08" PRIx32, k_chip->sim_sdid);
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return ERROR_FLASH_OPER_UNSUPPORTED;
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}
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result = target_read_u32(target, k_chip->sim_base + SIM_FCFG1_OFFSET, &k_chip->sim_fcfg1);
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if (result != ERROR_OK)
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return result;
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k_chip->sim_fcfg2 = 0; /* S32K1xx does not implement FCFG2 register. */
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fcfg1_depart = (k_chip->sim_fcfg1 >> 12) & 0x0f;
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fcfg1_eesize = (k_chip->sim_fcfg1 >> 16) & 0x0f;
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if (fcfg1_eesize <= 9)
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ee_size = (16 << (10 - fcfg1_eesize));
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if ((fcfg1_depart & 0x8) == 0) {
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/* Binary 0xxx values encode the amount reserved for EEPROM emulation. */
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if (fcfg1_depart)
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k_chip->dflash_size = k_chip->nvm_size - (4096 << fcfg1_depart);
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else
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k_chip->dflash_size = k_chip->nvm_size;
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} else {
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/* Binary 1xxx valued encode the DFlash size. */
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if (fcfg1_depart & 0x7)
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k_chip->dflash_size = 4096 << (fcfg1_depart & 0x7);
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else
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k_chip->dflash_size = 0;
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}
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snprintf(k_chip->name, sizeof(k_chip->name), "S32K%u%u%u",
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generation, subseries, derivate);
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pflash_size_k = k_chip->pflash_size / 1024;
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dflash_size_k = k_chip->dflash_size / 1024;
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LOG_INFO("%s detected: %u flash blocks", k_chip->name, k_chip->num_pflash_blocks + k_chip->num_nvm_blocks);
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LOG_INFO("%u PFlash banks: %" PRIu32 " KiB total", k_chip->num_pflash_blocks, pflash_size_k);
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nvm_size_k = k_chip->nvm_size / 1024;
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if (k_chip->num_nvm_blocks) {
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LOG_INFO("%u FlexNVM banks: %" PRIu32 " KiB total, %" PRIu32 " KiB available as data flash, %"
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PRIu32 " bytes FlexRAM",
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k_chip->num_nvm_blocks, nvm_size_k, dflash_size_k, ee_size);
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}
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k_chip->probed = true;
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if (create_banks)
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kinetis_create_missing_banks(k_chip);
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return ERROR_OK;
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}
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static int kinetis_probe_chip(struct kinetis_chip *k_chip)
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{
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int result;
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@ -2693,7 +2905,13 @@ static int kinetis_probe(struct flash_bank *bank)
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k_bank->probed = false;
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if (!k_chip->probed) {
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switch (k_chip->chip_type) {
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case CT_S32K:
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result = kinetis_probe_chip_s32k(k_chip);
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break;
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default:
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result = kinetis_probe_chip(k_chip);
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}
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if (result != ERROR_OK)
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return result;
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}
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@ -2765,6 +2983,8 @@ static int kinetis_probe(struct flash_bank *bank)
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return ERROR_FLASH_BANK_INVALID;
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}
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/* S32K1xx does not implement FCFG2 register. Skip checks. */
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if (k_chip->chip_type != CT_S32K) {
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fcfg2_pflsh = (uint8_t)((k_chip->sim_fcfg2 >> 23) & 0x01);
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fcfg2_maxaddr0 = (uint8_t)((k_chip->sim_fcfg2 >> 24) & 0x7f);
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fcfg2_maxaddr1 = (uint8_t)((k_chip->sim_fcfg2 >> 16) & 0x7f);
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@ -2783,6 +3003,7 @@ static int kinetis_probe(struct flash_bank *bank)
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LOG_WARNING("FlexNVM MAXADDR1 0x%02" PRIx8 " check failed,"
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" please report to OpenOCD mailing list", fcfg2_maxaddr1);
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}
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}
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free(bank->sectors);
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bank->sectors = NULL;
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@ -2932,6 +3153,11 @@ COMMAND_HANDLER(kinetis_nvm_partition)
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k_chip = kinetis_get_chip(target);
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if (k_chip->chip_type == CT_S32K) {
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LOG_ERROR("NVM partition not supported on S32K1xx (yet).");
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return ERROR_FAIL;
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}
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if (CMD_ARGC >= 2) {
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if (strcmp(CMD_ARGV[0], "dataflash") == 0)
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sz_type = DF_SIZE;
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@ -0,0 +1,79 @@
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# SPDX-License-Identifier: GPL-2.0-or-later
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#
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# Freescale S32K devices
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# Similar to Kinetis Kx series devices.
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#
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source [find target/swj-dp.tcl]
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME s32k
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}
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# Work-area is a space in RAM used for flash programming
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# By default use 4kB
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if { [info exists WORKAREASIZE] } {
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set _WORKAREASIZE $WORKAREASIZE
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} else {
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set _WORKAREASIZE 0x1000
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}
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if { [info exists CPUTAPID] } {
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set _CPUTAPID $CPUTAPID
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} else {
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set _CPUTAPID 0x0995001d
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}
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|
||||
swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
|
||||
dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
|
||||
|
||||
set _TARGETNAME $_CHIPNAME.cpu
|
||||
target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
|
||||
|
||||
$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
|
||||
|
||||
set _FLASHNAME $_CHIPNAME.pflash
|
||||
flash bank $_FLASHNAME kinetis 0 0 0 0 $_TARGETNAME -s32k
|
||||
kinetis create_banks
|
||||
|
||||
adapter speed 1000
|
||||
|
||||
reset_config srst_nogate
|
||||
|
||||
if {[using_hla]} {
|
||||
echo ""
|
||||
echo "!!!!!!!!!!!!!!!!!!!!!! WARNING !!!!!!!!!!!!!!!!! WARNING !!!!!!!!!!!!!!!!!!!!!!"
|
||||
echo " Kinetis MCUs have a MDM-AP dedicated mainly to MCU security related functions."
|
||||
echo " A high level adapter (like a ST-Link) you are currently using cannot access"
|
||||
echo " the MDM-AP, so commands like 'mdm mass_erase' are not available in your"
|
||||
echo " configuration. Also security locked state of the device will not be reported."
|
||||
echo " Expect problems connecting to a blank device without boot ROM."
|
||||
echo ""
|
||||
echo " Be very careful as you can lock the device though there is no way to unlock"
|
||||
echo " it without mass erase. Don't set write protection on the first block."
|
||||
echo "!!!!!!!!!!!!!!!!!!!!!! WARNING !!!!!!!!!!!!!!!!! WARNING !!!!!!!!!!!!!!!!!!!!!!"
|
||||
echo ""
|
||||
} else {
|
||||
# Detect secured MCU or boot lock-up in RESET/WDOG loop
|
||||
$_TARGETNAME configure -event examine-fail {
|
||||
kinetis mdm check_security
|
||||
}
|
||||
# During RESET/WDOG loop the target is sometimes falsely examined
|
||||
$_TARGETNAME configure -event examine-end {
|
||||
kinetis mdm check_security
|
||||
}
|
||||
|
||||
# if srst is not fitted use SYSRESETREQ to
|
||||
# perform a soft reset
|
||||
cortex_m reset_config sysresetreq
|
||||
}
|
||||
|
||||
# Disable watchdog not to disturb OpenOCD algorithms running on MCU
|
||||
# (e.g. armv7m_checksum_memory() in verify_image)
|
||||
# Flash driver also disables watchdog before FTFA flash programming.
|
||||
$_TARGETNAME configure -event reset-init {
|
||||
kinetis disable_wdog
|
||||
}
|
||||
Loading…
Reference in New Issue