Properly track selecting multiple harts at once. (#743)
* Properly track selecting multiple harts at once. use_hasel is a bit of a hack. Change-Id: Ia589ebc16bca32038d915df9988361b88e940917 Signed-off-by: Tim Newsome <tim@sifive.com> * Clarifying comment. Co-authored-by: Jan Matyas <50193733+JanMatCodasip@users.noreply.github.com> Signed-off-by: Tim Newsome <tim@sifive.com> * Rename set_hartsel to set_dmcontrol_hartsel Change-Id: Iab28531281aa6fc604ec7d34974ed444ea9ea850 * Make set_dmcontrol_hartsel() more idiomatic. Change-Id: I56a885043c515359e33b9c8a03aed637c81d1486 * Use constant for multiple harts instead of -1. Change-Id: Iefeaf74202f2b4918d21f15f7ff7ca514175b8fb Signed-off-by: Tim Newsome <tim@sifive.com> Signed-off-by: Tim Newsome <tim@sifive.com> Co-authored-by: Jan Matyas <50193733+JanMatCodasip@users.noreply.github.com>
This commit is contained in:
Tim Newsome
GitHub
parent
bed28d5ec7
commit
a50b280558
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@ -31,7 +31,7 @@
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static int riscv013_on_step_or_resume(struct target *target, bool step);
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static int riscv013_step_or_resume_current_hart(struct target *target,
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bool step, bool use_hasel);
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bool step);
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static void riscv013_clear_abstract_error(struct target *target);
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/* Implementations of the functions in riscv_info_t. */
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@ -129,6 +129,8 @@ typedef enum {
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YNM_NO
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} yes_no_maybe_t;
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#define HART_INDEX_MULTIPLE -1
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typedef struct {
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struct list_head list;
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int abs_chain_position;
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@ -140,9 +142,7 @@ typedef struct {
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/* Targets that are connected to this DM. */
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struct list_head target_list;
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/* Contains the ID of the hart that is currently selected by this DM.
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* (If multiple harts are selected this is meaningless, and that corner case
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* is not currently handled well.)
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*/
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* If multiple harts are selected this is HART_INDEX_MULTIPLE. */
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int current_hartid;
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bool hasel_supported;
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@ -216,6 +216,9 @@ typedef struct {
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/* DM that provides access to this target. */
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dm013_info_t *dm;
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/* This target was selected using hasel. */
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bool selected;
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} riscv013_info_t;
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LIST_HEAD(dm_list);
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@ -256,7 +259,7 @@ dm013_info_t *get_dm(struct target *target)
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if (!dm)
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return NULL;
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dm->abs_chain_position = abs_chain_position;
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dm->current_hartid = -1;
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dm->current_hartid = 0;
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dm->hart_count = -1;
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INIT_LIST_HEAD(&dm->target_list);
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list_add(&dm->list, &dm_list);
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@ -279,16 +282,21 @@ dm013_info_t *get_dm(struct target *target)
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return dm;
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}
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static uint32_t set_hartsel(uint32_t initial, uint32_t index)
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static uint32_t set_dmcontrol_hartsel(uint32_t initial, int hart_index)
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{
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initial &= ~DM_DMCONTROL_HARTSELLO;
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initial &= ~DM_DMCONTROL_HARTSELHI;
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uint32_t index_lo = index & ((1 << DM_DMCONTROL_HARTSELLO_LENGTH) - 1);
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initial |= index_lo << DM_DMCONTROL_HARTSELLO_OFFSET;
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uint32_t index_hi = index >> DM_DMCONTROL_HARTSELLO_LENGTH;
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assert(index_hi < 1 << DM_DMCONTROL_HARTSELHI_LENGTH);
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initial |= index_hi << DM_DMCONTROL_HARTSELHI_OFFSET;
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if (hart_index >= 0) {
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initial = set_field(initial, DM_DMCONTROL_HASEL, DM_DMCONTROL_HASEL_SINGLE);
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uint32_t index_lo = hart_index & ((1 << DM_DMCONTROL_HARTSELLO_LENGTH) - 1);
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initial = set_field(initial, DM_DMCONTROL_HARTSELLO, index_lo);
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uint32_t index_hi = hart_index >> DM_DMCONTROL_HARTSELLO_LENGTH;
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assert(index_hi < (1 << DM_DMCONTROL_HARTSELHI_LENGTH));
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initial = set_field(initial, DM_DMCONTROL_HARTSELHI, index_hi);
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} else if (hart_index == HART_INDEX_MULTIPLE) {
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initial = set_field(initial, DM_DMCONTROL_HASEL, DM_DMCONTROL_HASEL_MULTIPLE);
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/* TODO: https://github.com/riscv/riscv-openocd/issues/748 */
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initial = set_field(initial, DM_DMCONTROL_HARTSELLO, 0);
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initial = set_field(initial, DM_DMCONTROL_HARTSELHI, 0);
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}
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return initial;
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}
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@ -1684,7 +1692,7 @@ static int examine(struct target *target)
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if (get_field(s, DM_DMSTATUS_ANYHAVERESET))
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dmi_write(target, DM_DMCONTROL,
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set_hartsel(DM_DMCONTROL_DMACTIVE | DM_DMCONTROL_ACKHAVERESET, i));
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set_dmcontrol_hartsel(DM_DMCONTROL_DMACTIVE | DM_DMCONTROL_ACKHAVERESET, i));
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}
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LOG_DEBUG("Detected %d harts.", dm->hart_count);
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@ -1703,6 +1711,7 @@ static int examine(struct target *target)
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bool halted = riscv_is_halted(target);
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if (!halted) {
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r->prepped = true;
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if (riscv013_halt_go(target) != ERROR_OK) {
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LOG_TARGET_ERROR(target, "Fatal: Hart %d failed to halt during examine()",
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info->index);
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@ -1761,7 +1770,7 @@ static int examine(struct target *target)
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}
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if (!halted)
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riscv013_step_or_resume_current_hart(target, false, false);
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riscv013_step_or_resume_current_hart(target, false);
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if (target->smp) {
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bool haltgroup_supported;
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@ -2357,7 +2366,7 @@ static int assert_reset(struct target *target)
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/* Set haltreq for each hart. */
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uint32_t control = control_base;
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control = set_hartsel(control_base, info->index);
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control = set_dmcontrol_hartsel(control_base, info->index);
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control = set_field(control, DM_DMCONTROL_HALTREQ,
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target->reset_halt ? 1 : 0);
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dmi_write(target, DM_DMCONTROL, control);
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@ -2368,7 +2377,7 @@ static int assert_reset(struct target *target)
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} else {
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/* Reset just this hart. */
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uint32_t control = set_hartsel(control_base, info->index);
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uint32_t control = set_dmcontrol_hartsel(control_base, info->index);
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control = set_field(control, DM_DMCONTROL_HALTREQ,
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target->reset_halt ? 1 : 0);
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control = set_field(control, DM_DMCONTROL_NDMRESET, 1);
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@ -2398,7 +2407,7 @@ static int deassert_reset(struct target *target)
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uint32_t control = 0;
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control = set_field(control, DM_DMCONTROL_HALTREQ, target->reset_halt ? 1 : 0);
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control = set_field(control, DM_DMCONTROL_DMACTIVE, 1);
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dmi_write(target, DM_DMCONTROL, set_hartsel(control, info->index));
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dmi_write(target, DM_DMCONTROL, set_dmcontrol_hartsel(control, info->index));
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uint32_t dmstatus;
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int dmi_busy_delay = info->dmi_busy_delay;
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@ -2410,7 +2419,7 @@ static int deassert_reset(struct target *target)
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if (index != info->index)
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continue;
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dmi_write(target, DM_DMCONTROL,
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set_hartsel(control, index));
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set_dmcontrol_hartsel(control, index));
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} else {
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index = info->index;
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}
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@ -2449,7 +2458,7 @@ static int deassert_reset(struct target *target)
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if (get_field(dmstatus, DM_DMSTATUS_ALLHAVERESET)) {
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/* Ack reset. */
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dmi_write(target, DM_DMCONTROL,
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set_hartsel(control, index) |
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set_dmcontrol_hartsel(control, index) |
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DM_DMCONTROL_ACKHAVERESET);
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}
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@ -4122,7 +4131,7 @@ static int dm013_select_hart(struct target *target, int hart_index)
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return ERROR_OK;
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uint32_t dmcontrol = DM_DMCONTROL_DMACTIVE;
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dmcontrol = set_hartsel(dmcontrol, hart_index);
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dmcontrol = set_dmcontrol_hartsel(dmcontrol, hart_index);
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if (dmi_write(target, DM_DMCONTROL, dmcontrol) != ERROR_OK) {
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/* Who knows what the state is? */
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dm->current_hartid = -2;
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@ -4134,15 +4143,14 @@ static int dm013_select_hart(struct target *target, int hart_index)
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/* Select all harts that were prepped and that are selectable, clearing the
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* prepped flag on the harts that actually were selected. */
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static int select_prepped_harts(struct target *target, bool *use_hasel)
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static int select_prepped_harts(struct target *target)
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{
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RISCV_INFO(r);
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dm013_info_t *dm = get_dm(target);
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if (!dm)
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return ERROR_FAIL;
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if (!dm->hasel_supported) {
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RISCV_INFO(r);
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r->prepped = false;
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*use_hasel = false;
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dm013_select_target(target);
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return ERROR_OK;
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}
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@ -4155,27 +4163,33 @@ static int select_prepped_harts(struct target *target, bool *use_hasel)
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target_list_t *entry;
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unsigned total_selected = 0;
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unsigned int selected_index = 0;
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list_for_each_entry(entry, &dm->target_list, list) {
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struct target *t = entry->target;
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riscv_info_t *r = riscv_info(t);
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riscv013_info_t *info = get_info(t);
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unsigned index = info->index;
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LOG_DEBUG("index=%d, coreid=%d, prepped=%d", index, t->coreid, r->prepped);
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r->selected = r->prepped;
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if (r->prepped) {
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riscv_info_t *info = riscv_info(t);
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riscv013_info_t *info_013 = get_info(t);
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unsigned index = info_013->index;
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LOG_DEBUG("index=%d, coreid=%d, prepped=%d", index, t->coreid, info->prepped);
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if (info->prepped) {
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info_013->selected = true;
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hawindow[index / 32] |= 1 << (index % 32);
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r->prepped = false;
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info->prepped = false;
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total_selected++;
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selected_index = index;
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}
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index++;
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}
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if (total_selected == 0) {
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LOG_TARGET_ERROR(target, "No harts were prepped!");
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return ERROR_FAIL;
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} else if (total_selected == 1) {
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/* Don't use hasel if we only need to talk to one hart. */
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if (total_selected <= 1) {
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*use_hasel = false;
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return ERROR_OK;
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return dm013_select_hart(target, selected_index);
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}
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if (dm013_select_hart(target, HART_INDEX_MULTIPLE) != ERROR_OK)
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return ERROR_FAIL;
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for (unsigned i = 0; i < hawindow_count; i++) {
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if (dmi_write(target, DM_HAWINDOWSEL, i) != ERROR_OK)
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return ERROR_FAIL;
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@ -4183,7 +4197,6 @@ static int select_prepped_harts(struct target *target, bool *use_hasel)
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return ERROR_FAIL;
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}
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*use_hasel = true;
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return ERROR_OK;
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}
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@ -4194,19 +4207,18 @@ static int riscv013_halt_prep(struct target *target)
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static int riscv013_halt_go(struct target *target)
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{
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RISCV013_INFO(info);
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dm013_info_t *dm = get_dm(target);
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if (!dm)
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return ERROR_FAIL;
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bool use_hasel = false;
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if (select_prepped_harts(target, &use_hasel) != ERROR_OK)
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if (select_prepped_harts(target) != ERROR_OK)
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return ERROR_FAIL;
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LOG_TARGET_DEBUG(target, "halting hart");
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/* Issue the halt command, and then wait for the current hart to halt. */
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uint32_t dmcontrol = DM_DMCONTROL_DMACTIVE | DM_DMCONTROL_HALTREQ;
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if (use_hasel)
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dmcontrol |= DM_DMCONTROL_HASEL;
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dmcontrol = set_hartsel(dmcontrol, info->index);
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dmcontrol = set_dmcontrol_hartsel(dmcontrol, dm->current_hartid);
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dmi_write(target, DM_DMCONTROL, dmcontrol);
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uint32_t dmstatus;
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for (size_t i = 0; i < 256; ++i) {
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@ -4232,11 +4244,8 @@ static int riscv013_halt_go(struct target *target)
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dmcontrol = set_field(dmcontrol, DM_DMCONTROL_HALTREQ, 0);
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dmi_write(target, DM_DMCONTROL, dmcontrol);
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if (use_hasel) {
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if (dm->current_hartid == HART_INDEX_MULTIPLE) {
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target_list_t *entry;
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dm013_info_t *dm = get_dm(target);
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if (!dm)
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return ERROR_FAIL;
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list_for_each_entry(entry, &dm->target_list, list) {
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struct target *t = entry->target;
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t->state = TARGET_HALTED;
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@ -4251,16 +4260,15 @@ static int riscv013_halt_go(struct target *target)
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static int riscv013_resume_go(struct target *target)
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{
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bool use_hasel = false;
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if (select_prepped_harts(target, &use_hasel) != ERROR_OK)
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if (select_prepped_harts(target) != ERROR_OK)
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return ERROR_FAIL;
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return riscv013_step_or_resume_current_hart(target, false, use_hasel);
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return riscv013_step_or_resume_current_hart(target, false);
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}
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static int riscv013_step_current_hart(struct target *target)
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{
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return riscv013_step_or_resume_current_hart(target, true, false);
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return riscv013_step_or_resume_current_hart(target, true);
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}
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static int riscv013_resume_prep(struct target *target)
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@ -4296,7 +4304,7 @@ static bool riscv013_is_halted(struct target *target)
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/* TODO: Can we make this more obvious to eg. a gdb user? */
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uint32_t dmcontrol = DM_DMCONTROL_DMACTIVE |
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DM_DMCONTROL_ACKHAVERESET;
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dmcontrol = set_hartsel(dmcontrol, info->index);
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dmcontrol = set_dmcontrol_hartsel(dmcontrol, info->index);
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/* If we had been halted when we reset, request another halt. If we
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* ended up running out of reset, then the user will (hopefully) get a
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* message that a reset happened, that the target is running, and then
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@ -4799,9 +4807,9 @@ static int riscv013_on_step_or_resume(struct target *target, bool step)
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}
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static int riscv013_step_or_resume_current_hart(struct target *target,
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bool step, bool use_hasel)
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bool step)
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{
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if (!riscv_is_halted(target)) {
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if (target->state != TARGET_HALTED) {
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LOG_TARGET_ERROR(target, "Hart is not halted!");
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return ERROR_FAIL;
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}
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@ -4813,12 +4821,9 @@ static int riscv013_step_or_resume_current_hart(struct target *target,
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dm013_info_t *dm = get_dm(target);
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/* Issue the resume command, and then wait for the current hart to resume. */
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uint32_t dmcontrol = DM_DMCONTROL_DMACTIVE | DM_DMCONTROL_RESUMEREQ;
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if (use_hasel)
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dmcontrol |= DM_DMCONTROL_HASEL;
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dmcontrol = set_hartsel(dmcontrol, dm->current_hartid);
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dmcontrol = set_dmcontrol_hartsel(dmcontrol, dm->current_hartid);
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dmi_write(target, DM_DMCONTROL, dmcontrol);
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dmcontrol = set_field(dmcontrol, DM_DMCONTROL_HASEL, 0);
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dmcontrol = set_field(dmcontrol, DM_DMCONTROL_RESUMEREQ, 0);
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uint32_t dmstatus;
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