ARM DPM: support adding/removing HW breakpoints
Generalize the core of watchpoint setup so that it can handle breakpoints too. Create breakpoint add/remove routines which will use that, and hook them up to target types which don't provide their own breakpoint support (nothing, yet). This suffices for hardware-only breakpoint support. The ARM11 code will be able to switch over to this without much trouble, since it doesn't yet handle software breakpoints. Switching Cortex-A8 will be a bit more involved. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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@ -320,14 +320,17 @@ static int dpm_maybe_update_bpwp(struct arm_dpm *dpm, bool bpwp,
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xp->address, xp->control);
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xp->address, xp->control);
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if (retval != ERROR_OK)
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if (retval != ERROR_OK)
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LOG_ERROR("%s: can't %s HW bp/wp %d",
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LOG_ERROR("%s: can't %s HW %spoint %d",
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disable ? "disable" : "enable",
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disable ? "disable" : "enable",
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target_name(dpm->arm->target),
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target_name(dpm->arm->target),
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xp->number);
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(xp->number < 16) ? "break" : "watch",
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xp->number & 0xf);
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done:
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done:
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return retval;
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return retval;
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}
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}
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static int dpm_add_breakpoint(struct target *target, struct breakpoint *bp);
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/**
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/**
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* Writes all modified core registers for all processor modes. In normal
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* Writes all modified core registers for all processor modes. In normal
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* operation this is called on exit from halting debug state.
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* operation this is called on exit from halting debug state.
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@ -354,7 +357,7 @@ int arm_dpm_write_dirty_registers(struct arm_dpm *dpm, bool bpwp)
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* we should be able to assume we handle them; but until then,
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* we should be able to assume we handle them; but until then,
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* cope with the hand-crafted breakpoint code.
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* cope with the hand-crafted breakpoint code.
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*/
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*/
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if (0) {
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if (arm->target->type->add_breakpoint == dpm_add_breakpoint) {
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for (unsigned i = 0; i < dpm->nbp; i++) {
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for (unsigned i = 0; i < dpm->nbp; i++) {
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struct dpm_bp *dbp = dpm->dbp + i;
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struct dpm_bp *dbp = dpm->dbp + i;
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struct breakpoint *bp = dbp->bp;
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struct breakpoint *bp = dbp->bp;
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@ -665,43 +668,26 @@ done:
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* fact isn't currently leveraged.
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* fact isn't currently leveraged.
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*/
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*/
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static int dpm_watchpoint_setup(struct arm_dpm *dpm, unsigned index,
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static int dpm_bpwp_setup(struct arm_dpm *dpm, struct dpm_bpwp *xp,
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struct watchpoint *wp)
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uint32_t addr, uint32_t length)
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{
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{
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uint32_t addr = wp->address;
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uint32_t control;
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uint32_t control;
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/* this hardware doesn't support data value matching or masking */
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if (wp->value || wp->mask != ~(uint32_t)0) {
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LOG_DEBUG("watchpoint values and masking not supported");
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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}
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control = (1 << 0) /* enable */
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control = (1 << 0) /* enable */
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| (3 << 1); /* both user and privileged access */
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| (3 << 1); /* both user and privileged access */
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switch (wp->rw) {
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case WPT_READ:
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control |= 1 << 3;
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break;
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case WPT_WRITE:
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control |= 2 << 3;
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break;
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case WPT_ACCESS:
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control |= 3 << 3;
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break;
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}
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/* Match 1, 2, or all 4 byte addresses in this word.
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/* Match 1, 2, or all 4 byte addresses in this word.
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*
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*
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* FIXME: v7 hardware allows lengths up to 2 GB, and has eight
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* FIXME: v7 hardware allows lengths up to 2 GB for BP and WP.
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* byte address select bits. Support larger wp->length, if addr
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* Support larger length, when addr is suitably aligned. In
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* is suitably aligned.
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* particular, allow watchpoints on 8 byte "double" values.
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*
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* REVISIT allow watchpoints on unaligned 2-bit values; and on
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* v7 hardware, unaligned 4-byte ones too.
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*/
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*/
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switch (wp->length) {
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switch (length) {
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case 1:
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case 1:
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control |= (1 << (addr & 3)) << 5;
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control |= (1 << (addr & 3)) << 5;
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addr &= ~3;
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break;
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break;
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case 2:
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case 2:
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/* require 2-byte alignment */
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/* require 2-byte alignment */
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@ -718,26 +704,110 @@ static int dpm_watchpoint_setup(struct arm_dpm *dpm, unsigned index,
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}
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}
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/* FALL THROUGH */
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/* FALL THROUGH */
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default:
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default:
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LOG_DEBUG("bad watchpoint length or alignment");
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LOG_ERROR("unsupported {break,watch}point length/alignment");
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return ERROR_INVALID_ARGUMENTS;
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return ERROR_INVALID_ARGUMENTS;
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}
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}
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/* other control bits:
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/* other shared control bits:
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* bits 9:12 == 0 ... only checking up to four byte addresses (v7 only)
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* bits 15:14 == 0 ... both secure and nonsecure states (v6.1+ only)
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* bits 15:14 == 0 ... both secure and nonsecure states (v6.1+ only)
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* bit 20 == 0 ... not linked to a context ID
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* bit 20 == 0 ... not linked to a context ID
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* bit 28:24 == 0 ... not ignoring N LSBs (v7 only)
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* bit 28:24 == 0 ... not ignoring N LSBs (v7 only)
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*/
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*/
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dpm->dwp[index].wp = wp;
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xp->address = addr & ~3;
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dpm->dwp[index].bpwp.address = addr & ~3;
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xp->control = control;
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dpm->dwp[index].bpwp.control = control;
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xp->dirty = true;
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dpm->dwp[index].bpwp.dirty = true;
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LOG_DEBUG("BPWP: addr %8.8x, control %x, number %d",
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xp->address, control, xp->number);
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/* hardware is updated in write_dirty_registers() */
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/* hardware is updated in write_dirty_registers() */
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return ERROR_OK;
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return ERROR_OK;
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}
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}
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static int dpm_add_breakpoint(struct target *target, struct breakpoint *bp)
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{
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struct arm *arm = target_to_arm(target);
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struct arm_dpm *dpm = arm->dpm;
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int retval = ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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if (bp->length < 2)
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return ERROR_INVALID_ARGUMENTS;
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if (!dpm->bpwp_enable)
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return retval;
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/* FIXME we need a generic solution for software breakpoints. */
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if (bp->type == BKPT_SOFT)
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LOG_DEBUG("using HW bkpt, not SW...");
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for (unsigned i = 0; i < dpm->nbp; i++) {
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if (!dpm->dbp[i].bp) {
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retval = dpm_bpwp_setup(dpm, &dpm->dbp[i].bpwp,
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bp->address, bp->length);
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if (retval == ERROR_OK)
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dpm->dbp[i].bp = bp;
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break;
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}
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}
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return retval;
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}
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static int dpm_remove_breakpoint(struct target *target, struct breakpoint *bp)
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{
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struct arm *arm = target_to_arm(target);
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struct arm_dpm *dpm = arm->dpm;
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int retval = ERROR_INVALID_ARGUMENTS;
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for (unsigned i = 0; i < dpm->nbp; i++) {
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if (dpm->dbp[i].bp == bp) {
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dpm->dbp[i].bp = NULL;
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dpm->dbp[i].bpwp.dirty = true;
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/* hardware is updated in write_dirty_registers() */
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retval = ERROR_OK;
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break;
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}
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}
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return retval;
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}
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static int dpm_watchpoint_setup(struct arm_dpm *dpm, unsigned index,
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struct watchpoint *wp)
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{
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int retval;
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struct dpm_wp *dwp = dpm->dwp + index;
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uint32_t control;
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/* this hardware doesn't support data value matching or masking */
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if (wp->value || wp->mask != ~(uint32_t)0) {
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LOG_DEBUG("watchpoint values and masking not supported");
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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}
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retval = dpm_bpwp_setup(dpm, &dwp->bpwp, wp->address, wp->length);
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if (retval != ERROR_OK)
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return retval;
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control = dwp->bpwp.control;
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switch (wp->rw) {
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case WPT_READ:
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control |= 1 << 3;
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break;
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case WPT_WRITE:
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control |= 2 << 3;
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break;
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case WPT_ACCESS:
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control |= 3 << 3;
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break;
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}
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dwp->bpwp.control = control;
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dpm->dwp[index].wp = wp;
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return retval;
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}
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static int dpm_add_watchpoint(struct target *target, struct watchpoint *wp)
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static int dpm_add_watchpoint(struct target *target, struct watchpoint *wp)
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{
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{
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@ -865,11 +935,16 @@ int arm_dpm_setup(struct arm_dpm *dpm)
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arm->mrc = dpm_mrc;
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arm->mrc = dpm_mrc;
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arm->mcr = dpm_mcr;
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arm->mcr = dpm_mcr;
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/* breakpoint and watchpoint setup */
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/* breakpoint setup -- optional until it works everywhere */
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if (!target->type->add_breakpoint) {
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target->type->add_breakpoint = dpm_add_breakpoint;
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target->type->remove_breakpoint = dpm_remove_breakpoint;
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}
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/* watchpoint setup */
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target->type->add_watchpoint = dpm_add_watchpoint;
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target->type->add_watchpoint = dpm_add_watchpoint;
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target->type->remove_watchpoint = dpm_remove_watchpoint;
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target->type->remove_watchpoint = dpm_remove_watchpoint;
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/* FIXME add breakpoint support */
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/* FIXME add vector catch support */
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/* FIXME add vector catch support */
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dpm->nbp = 1 + ((dpm->didr >> 24) & 0xf);
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dpm->nbp = 1 + ((dpm->didr >> 24) & 0xf);
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