doxygen: remove warnings

Change-Id: I020845a8df7b67f3b6c1a233b3ee07a5d14fa685
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/556
Tested-by: jenkins
This commit is contained in:
Spencer Oliver 2012-04-04 13:37:09 +01:00
parent e2535e7901
commit a2935397b4
7 changed files with 191 additions and 196 deletions

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@ -90,7 +90,7 @@ chmod +x .git/hooks/commit-msg
@code @code
tools/initial.sh <username> tools/initial.sh <username>
@endcode @endcode
With <username> being your Gerrit username. With @<username@> being your Gerrit username.
-# Set up git with your name and email: -# Set up git with your name and email:
@code @code
git config --global user.name "John Smith" git config --global user.name "John Smith"

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@ -19,7 +19,8 @@
***************************************************************************/ ***************************************************************************/
/** /**
* @file Definition of the commands supported by the OpenULINK firmware. * @file
* Definition of the commands supported by the OpenULINK firmware.
* *
* Basically, two types of commands can be distinguished: * Basically, two types of commands can be distinguished:
* - Commands with fixed payload size * - Commands with fixed payload size

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@ -22,7 +22,8 @@
#define REG_EZUSB_H #define REG_EZUSB_H
/** /**
* @file All information in this file was taken from the EZ-USB Technical * @file
* All information in this file was taken from the EZ-USB Technical
* Reference Manual, Cypress Semiconductor, 3901 North First Street * Reference Manual, Cypress Semiconductor, 3901 North First Street
* San Jose, CA 95134 (www.cypress.com). * San Jose, CA 95134 (www.cypress.com).
* *

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@ -28,7 +28,8 @@
#include "reg_ezusb.h" #include "reg_ezusb.h"
/** /**
* @file Implementation of the OpenULINK communication protocol. * @file
* Implementation of the OpenULINK communication protocol.
* *
* The OpenULINK protocol uses one OUT and one IN endpoint. These two endpoints * The OpenULINK protocol uses one OUT and one IN endpoint. These two endpoints
* are configured to use the maximum packet size for full-speed transfers, * are configured to use the maximum packet size for full-speed transfers,
@ -75,8 +76,6 @@ void execute_set_led_command(void)
/** /**
* Executes one command and updates global command indexes. * Executes one command and updates global command indexes.
* *
* @param index the index of the Bulk EP2-OUT data buffer at which the
* command ID is stored.
* @return true if this command was the last command. * @return true if this command was the last command.
* @return false if there are more commands within the current contents of the * @return false if there are more commands within the current contents of the
* Bulk EP2-OUT data buffer. * Bulk EP2-OUT data buffer.

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@ -19,7 +19,8 @@
***************************************************************************/ ***************************************************************************/
/** /**
* @file Defines USB descriptors, interrupt routines and helper functions. * @file
* Defines USB descriptors, interrupt routines and helper functions.
* To minimize code size, we make the following assumptions: * To minimize code size, we make the following assumptions:
* - The OpenULINK has exactly one configuration * - The OpenULINK has exactly one configuration
* - and exactly one alternate setting * - and exactly one alternate setting

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@ -74,7 +74,7 @@ static int reset_jtag(void)
static int dsp5680xx_drscan(struct target *target, uint8_t *d_in, static int dsp5680xx_drscan(struct target *target, uint8_t *d_in,
uint8_t *d_out, int len) uint8_t *d_out, int len)
{ {
/** -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- /* -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
* *
*Inputs: *Inputs:
* - d_in: This is the data that will be shifted into the JTAG DR reg. * - d_in: This is the data that will be shifted into the JTAG DR reg.
@ -113,14 +113,14 @@ static int dsp5680xx_drscan(struct target *target, uint8_t *d_in,
return retval; return retval;
} }
/** -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- /**
*Inputs: * Test func
* - data_to_shift_into_ir: This is the data that will be shifted into the JTAG IR reg. *
* - data_shifted_out_of_ir: The data that will be shifted out of the JTAG IR reg will be * @param target
* stored here * @param d_in This is the data that will be shifted into the JTAG IR reg.
* - len: Length of the data to be shifted to JTAG IR. * @param d_out The data that will be shifted out of the JTAG IR reg will be stored here.
* @apram ir_len Length of the data to be shifted to JTAG IR.
* *
*-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
*/ */
static int dsp5680xx_irscan(struct target *target, uint32_t *d_in, static int dsp5680xx_irscan(struct target *target, uint32_t *d_in,
uint32_t *d_out, uint8_t ir_len) uint32_t *d_out, uint8_t ir_len)
@ -302,7 +302,7 @@ static int dsp5680xx_exe3(struct target *target, uint16_t opcode1,
return retval; return retval;
} }
/** /*
*--------------- Real-time data exchange --------------- *--------------- Real-time data exchange ---------------
* The EOnCE Transmit (OTX) and Receive (ORX) registers are data memory mapped, each with an upper * The EOnCE Transmit (OTX) and Receive (ORX) registers are data memory mapped, each with an upper
* and lower 16 bit word. * and lower 16 bit word.
@ -372,7 +372,7 @@ static int core_rx_lower_data(struct target *target, uint8_t *data_read)
return retval; return retval;
} }
/** /*
*-- -- -- -- --- -- -- -- --- -- -- -- --- -- -- -- --- -- -- -- --- -- *-- -- -- -- --- -- -- -- --- -- -- -- --- -- -- -- --- -- -- -- --- --
*-- -- -- -- --- -- -- -Core Instructions- -- -- -- --- -- -- -- --- -- *-- -- -- -- --- -- -- -Core Instructions- -- -- -- --- -- -- -- --- --
*-- -- -- -- --- -- -- -- --- -- -- -- --- -- -- -- --- -- -- -- --- -- *-- -- -- -- --- -- -- -- --- -- -- -- --- -- -- -- --- -- -- -- --- --
@ -884,7 +884,7 @@ static int dsp5680xx_init_target(struct command_context *cmd_ctx,
dsp5680xx_context.debug_mode_enabled = false; dsp5680xx_context.debug_mode_enabled = false;
LOG_DEBUG("target initiated!"); LOG_DEBUG("target initiated!");
/* TODO core tap must be enabled before running these commands, currently /* TODO core tap must be enabled before running these commands, currently
this is done in the .cfg tcl script. */ * this is done in the .cfg tcl script. */
return ERROR_OK; return ERROR_OK;
} }
@ -1049,7 +1049,7 @@ static int dsp5680xx_resume(struct target *target, int current,
} }
LOG_DEBUG("EOnCE status: 0x%02X.", eonce_status); LOG_DEBUG("EOnCE status: 0x%02X.", eonce_status);
} else { } else {
/** /*
* If debug mode was not enabled but target was halted, then it is most likely that * If debug mode was not enabled but target was halted, then it is most likely that
* access to eonce registers is locked. * access to eonce registers is locked.
* Reset target to make it run again. * Reset target to make it run again.
@ -1090,7 +1090,7 @@ static int dsp5680xx_resume(struct target *target, int current,
*/ */
static int dsp5680xx_convert_address(uint32_t *address, int *pmem) static int dsp5680xx_convert_address(uint32_t *address, int *pmem)
{ {
/** /*
* Distinguish data memory (x) from program memory (p) by the address. * Distinguish data memory (x) from program memory (p) by the address.
* Addresses over S_FILE_DATA_OFFSET are considered (x) memory. * Addresses over S_FILE_DATA_OFFSET are considered (x) memory.
*/ */
@ -1818,7 +1818,7 @@ static int dsp5680xx_f_signature(struct target *t, uint32_t a, uint32_t words,
if (!dsp5680xx_context.debug_mode_enabled) { if (!dsp5680xx_context.debug_mode_enabled) {
retval = eonce_enter_debug_mode_without_reset(target, NULL); retval = eonce_enter_debug_mode_without_reset(target, NULL);
/** /*
* Generate error here, since it is not done in eonce_enter_debug_mode_without_reset * Generate error here, since it is not done in eonce_enter_debug_mode_without_reset
*/ */
err_check(retval, DSP5680XX_ERROR_HALT, err_check(retval, DSP5680XX_ERROR_HALT,
@ -1849,7 +1849,7 @@ int dsp5680xx_f_erase_check(struct target *target, uint8_t *erased,
} }
retval = set_fm_ck_div(target); retval = set_fm_ck_div(target);
err_check_propagate(retval); err_check_propagate(retval);
/** /*
* Check if chip is already erased. * Check if chip is already erased.
*/ */
tmp = HFM_FLASH_BASE_ADDR + sector * HFM_SECTOR_SIZE / 2; tmp = HFM_FLASH_BASE_ADDR + sector * HFM_SECTOR_SIZE / 2;
@ -1905,15 +1905,15 @@ int dsp5680xx_f_erase(struct target *target, int first, int last)
retval = dsp5680xx_halt(target); retval = dsp5680xx_halt(target);
err_check_propagate(retval); err_check_propagate(retval);
} }
/** -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- /*
* Reset SIM * Reset SIM
* -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- *
*/ */
retval = dsp5680xx_f_SIM_reset(target); retval = dsp5680xx_f_SIM_reset(target);
err_check_propagate(retval); err_check_propagate(retval);
/** -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- /*
* Set hfmdiv * Set hfmdiv
* -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- *
*/ */
retval = set_fm_ck_div(target); retval = set_fm_ck_div(target);
err_check_propagate(retval); err_check_propagate(retval);
@ -1936,7 +1936,7 @@ int dsp5680xx_f_erase(struct target *target, int first, int last)
return ERROR_OK; return ERROR_OK;
} }
/** /*
* Algorithm for programming normal p: flash * Algorithm for programming normal p: flash
* Follow state machine from "56F801x Peripheral Reference Manual"@163. * Follow state machine from "56F801x Peripheral Reference Manual"@163.
* Registers to set up before calling: * Registers to set up before calling:
@ -2005,15 +2005,15 @@ int dsp5680xx_f_wr(struct target *t, uint8_t *b, uint32_t a, uint32_t count,
retval = eonce_enter_debug_mode(target, NULL); retval = eonce_enter_debug_mode(target, NULL);
err_check_propagate(retval); err_check_propagate(retval);
} }
/** -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- /*
* Download the pgm that flashes. * Download the pgm that flashes.
* -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- *
*/ */
const uint32_t len = pgm_write_pflash_length; const uint32_t len = pgm_write_pflash_length;
uint32_t ram_addr = 0x8700; uint32_t ram_addr = 0x8700;
/** /*
* This seems to be a safe address. * This seems to be a safe address.
* This one is the one used by codewarrior in 56801x_flash.cfg * This one is the one used by codewarrior in 56801x_flash.cfg
*/ */
@ -2025,15 +2025,15 @@ int dsp5680xx_f_wr(struct target *t, uint8_t *b, uint32_t a, uint32_t count,
retval = dsp5680xx_execute_queue(); retval = dsp5680xx_execute_queue();
err_check_propagate(retval); err_check_propagate(retval);
} }
/** -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- /*
* Set hfmdiv * Set hfmdiv
* -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- *
*/ */
retval = set_fm_ck_div(target); retval = set_fm_ck_div(target);
err_check_propagate(retval); err_check_propagate(retval);
/** -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- /*
* Setup registers needed by pgm_write_pflash * Setup registers needed by pgm_write_pflash
* -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- *
*/ */
dsp5680xx_context.flush = 0; dsp5680xx_context.flush = 0;
@ -2044,9 +2044,9 @@ int dsp5680xx_f_wr(struct target *t, uint8_t *b, uint32_t a, uint32_t count,
err_check_propagate(retval); err_check_propagate(retval);
retval = core_move_long_to_r2(target, HFM_BASE_ADDR); /* FM base address to r2 */ retval = core_move_long_to_r2(target, HFM_BASE_ADDR); /* FM base address to r2 */
err_check_propagate(retval); err_check_propagate(retval);
/** -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- /*
* Run flashing program. * Run flashing program.
* -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- *
*/ */
/* write to HFM_CNFG (lock=0, select bank) */ /* write to HFM_CNFG (lock=0, select bank) */
retval = core_move_value_at_r2_disp(target, 0x00, HFM_CNFG); retval = core_move_value_at_r2_disp(target, 0x00, HFM_CNFG);
@ -2108,9 +2108,9 @@ int dsp5680xx_f_wr(struct target *t, uint8_t *b, uint32_t a, uint32_t count,
} }
dsp5680xx_context.flush = 1; dsp5680xx_context.flush = 1;
if (!is_flash_lock) { if (!is_flash_lock) {
/** -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- /*
*Verify flash (skip when exec lock sequence) *Verify flash (skip when exec lock sequence)
* -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- *
*/ */
uint16_t signature; uint16_t signature;
@ -2195,9 +2195,7 @@ int dsp5680xx_f_unlock(struct target *target)
err_check_propagate(retval); err_check_propagate(retval);
instr = HFM_CLK_DEFAULT; instr = HFM_CLK_DEFAULT;
retval = retval = dsp5680xx_drscan(target, (uint8_t *) &instr, (uint8_t *) &ir_out, 16);
dsp5680xx_drscan(target, (uint8_t *) &instr, (uint8_t *) &ir_out,
16);
err_check_propagate(retval); err_check_propagate(retval);
jtag_add_sleep(TIME_DIV_FREESCALE * 150 * 1000); jtag_add_sleep(TIME_DIV_FREESCALE * 150 * 1000);
@ -2210,8 +2208,7 @@ int dsp5680xx_f_unlock(struct target *target)
jtag_add_sleep(150); jtag_add_sleep(150);
instr = 0x0606ffff; instr = 0x0606ffff;
retval = retval = dsp5680xx_drscan(target, (uint8_t *) &instr, (uint8_t *) &ir_out,
dsp5680xx_drscan(target, (uint8_t *) &instr, (uint8_t *) &ir_out,
32); 32);
err_check_propagate(retval); err_check_propagate(retval);
@ -2222,8 +2219,7 @@ int dsp5680xx_f_unlock(struct target *target)
DSP5680XX_JTAG_MASTER_TAP_IRLEN); DSP5680XX_JTAG_MASTER_TAP_IRLEN);
err_check_propagate(retval); err_check_propagate(retval);
instr = 0x2; instr = 0x2;
retval = retval = dsp5680xx_drscan(target, (uint8_t *) &instr, (uint8_t *) &ir_out,
dsp5680xx_drscan(target, (uint8_t *) &instr, (uint8_t *) &ir_out,
4); 4);
err_check_propagate(retval); err_check_propagate(retval);
@ -2242,9 +2238,7 @@ int dsp5680xx_f_lock(struct target *target)
struct jtag_tap *tap_cpu; struct jtag_tap *tap_cpu;
uint16_t lock_word[] = { HFM_LOCK_FLASH }; uint16_t lock_word[] = { HFM_LOCK_FLASH };
retval = retval = dsp5680xx_f_wr(target, (uint8_t *) (lock_word), HFM_LOCK_ADDR_L, 2, 1);
dsp5680xx_f_wr(target, (uint8_t *) (lock_word), HFM_LOCK_ADDR_L, 2,
1);
err_check_propagate(retval); err_check_propagate(retval);
jtag_add_reset(0, 1); jtag_add_reset(0, 1);

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@ -35,7 +35,6 @@
* The chip has two taps in the JTAG chain, the Master tap and the Core tap. * The chip has two taps in the JTAG chain, the Master tap and the Core tap.
* In this code the Master tap is only used to unlock the flash memory by executing a JTAG instruction. * In this code the Master tap is only used to unlock the flash memory by executing a JTAG instruction.
* *
*
*/ */
#define S_FILE_DATA_OFFSET 0x200000 #define S_FILE_DATA_OFFSET 0x200000
@ -128,7 +127,7 @@
*/ */
/** ---------------------------------------------------------------- /** ----------------------------------------------------------------
* Register Select Encoding (eonce_rev.1.0_0208081.pdf@14) * Register Select Encoding (eonce_rev.1.0_0208081.pdf:14)
* ---------------------------------------------------------------- * ----------------------------------------------------------------
*/ */
#define DSP5680XX_ONCE_NOREG 0x00 /* No register selected */ #define DSP5680XX_ONCE_NOREG 0x00 /* No register selected */
@ -157,7 +156,7 @@
#define FLUSH_COUNT_READ_WRITE 8192 /* This value works, higher values (and lower...) may work as well. */ #define FLUSH_COUNT_READ_WRITE 8192 /* This value works, higher values (and lower...) may work as well. */
#define FLUSH_COUNT_FLASH 8192 #define FLUSH_COUNT_FLASH 8192
/** ---------------------------------------------------------------- /** ----------------------------------------------------------------
* HFM (flash module) Commands (ref:MC56F801xRM.pdf@159) * HFM (flash module) Commands (ref:MC56F801xRM.pdf:159)
* ---------------------------------------------------------------- * ----------------------------------------------------------------
*/ */
#define HFM_ERASE_VERIFY 0x05 #define HFM_ERASE_VERIFY 0x05
@ -171,7 +170,7 @@
*/ */
/** ---------------------------------------------------------------- /** ----------------------------------------------------------------
* Flashing (ref:MC56F801xRM.pdf@159) * Flashing (ref:MC56F801xRM.pdf:159)
* ---------------------------------------------------------------- * ----------------------------------------------------------------
*/ */
#define HFM_BASE_ADDR 0x0F400 /** In x: mem. (write to S_FILE_DATA_OFFSET+HFM_BASE_ADDR #define HFM_BASE_ADDR 0x0F400 /** In x: mem. (write to S_FILE_DATA_OFFSET+HFM_BASE_ADDR
@ -195,7 +194,7 @@
#define HFM_EXEC_COMPLETE 0x40 #define HFM_EXEC_COMPLETE 0x40
/* User status register (USTAT) masks (MC56F80XXRM.pdf@6.7.5) */ /* User status register (USTAT) masks (MC56F80XXRM.pdf:6.7.5) */
#define HFM_USTAT_MASK_BLANK 0x4 #define HFM_USTAT_MASK_BLANK 0x4
#define HFM_USTAT_MASK_PVIOL_ACCER 0x30 #define HFM_USTAT_MASK_PVIOL_ACCER 0x30
@ -224,7 +223,7 @@
*/ */
/** ---------------------------------------------------------------- /** ----------------------------------------------------------------
* Register Memory Map (eonce_rev.1.0_0208081.pdf@16) * Register Memory Map (eonce_rev.1.0_0208081.pdf:16)
* ---------------------------------------------------------------- * ----------------------------------------------------------------
*/ */
#define MC568013_EONCE_OBASE_ADDR 0xFF #define MC568013_EONCE_OBASE_ADDR 0xFF
@ -314,7 +313,7 @@ static inline struct dsp5680xx_common *target_to_dsp5680xx(struct target
* @param buffer * @param buffer
* @param address Word addressing. * @param address Word addressing.
* @param count In bytes. * @param count In bytes.
* @param verify_flash Execute a CRC check after flashing. * @param is_flash_lock
* *
* @return * @return
*/ */
@ -322,7 +321,7 @@ int dsp5680xx_f_wr(struct target *target, uint8_t * buffer, uint32_t address,
uint32_t count, int is_flash_lock); uint32_t count, int is_flash_lock);
/** /**
* The FM has the funcionality of checking if the flash array is erased. This function * The FM has the functionality of checking if the flash array is erased. This function
* executes it. It does not support individual sector analysis. * executes it. It does not support individual sector analysis.
* *
* @param target * @param target
@ -337,7 +336,7 @@ int dsp5680xx_f_erase_check(struct target *target, uint8_t * erased,
/** /**
* Erases either a sector or the complete flash array. If either the range first-last covers * Erases either a sector or the complete flash array. If either the range first-last covers
* the complete array or if @first == 0 and @last == 0 then a mass erase command is executed * the complete array or if first == 0 and last == 0 then a mass erase command is executed
* on the FM. If not, then individual sectors are erased. * on the FM. If not, then individual sectors are erased.
* *
* @param target * @param target
@ -382,4 +381,4 @@ int dsp5680xx_f_lock(struct target *target);
*/ */
int dsp5680xx_f_unlock(struct target *target); int dsp5680xx_f_unlock(struct target *target);
#endif /* dsp5680xx.h */ #endif /* DSP5680XX_H */