interesting
/
riscv-openocd
mirror of https://github.com/riscv/riscv-openocd.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

cfg: add srst_nogate to the supported targets, remove from board configs 

It depends on the particular target whether it can work with SRST
asserted or not, so this belongs to the target config rather than the
board config.

Also, this allows for simple

openocd -f myboard.cfg -c "reset_config connect_assert_srst"

command to be used whenever a user feels a need to connect to an
unresponsive target.

Change-Id: I3d8da9ae47088fc0c75a20bfdd20074be1014de0
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2459
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This commit is contained in:
Paul Fertser 2015-01-10 13:19:26 +03:00 committed by Spencer Oliver
parent 7dd50909e3
commit a1bbf4b75b
27 changed files with 38 additions and 36 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
tcl/board/st_nucleo_f0.cfg
View File

@ -1,4 +1,4 @@
# This is for all ST NUCLEO with any STM32F0. Know Boards at the moment:
# This is for all ST NUCLEO with any STM32F0. Known boards at the moment:
# STM32F030R8
# http://www.st.com/web/catalog/tools/FM116/SC959/SS1532/LN1847/PF259997
# NUCLEO-F072RB
@ -12,5 +12,4 @@ transport select hla_swd
source [find target/stm32f0x.cfg]
# use hardware reset, connect under reset
reset_config srst_only srst_nogate
reset_config srst_only

3
tcl/board/st_nucleo_f103rb.cfg
View File

@ -7,5 +7,4 @@ transport select hla_swd
source [find target/stm32f1x.cfg]
# use hardware reset, connect under reset
reset_config srst_only srst_nogate
reset_config srst_only

3
tcl/board/st_nucleo_f334r8.cfg
View File

@ -7,5 +7,4 @@ transport select hla_swd
source [find target/stm32f3x.cfg]
# use hardware reset, connect under reset
reset_config srst_only srst_nogate
reset_config srst_only

5
tcl/board/st_nucleo_f4.cfg
View File

@ -1,4 +1,4 @@
# This is for all ST NUCLEO with any STM32F. Know Boards at the moment:
# This is for all ST NUCLEO with any STM32F4. Known boards at the moment:
# STM32F401RET6
# http://www.st.com/web/catalog/tools/FM116/SC959/SS1532/LN1847/PF260000
# STM32F411RET6
@ -10,5 +10,4 @@ transport select hla_swd
source [find target/stm32f4x.cfg]
# use hardware reset, connect under reset
reset_config srst_only srst_nogate
reset_config srst_only

3
tcl/board/stm320518_eval_stlink.cfg
View File

@ -16,5 +16,4 @@ set CHIPNAME STM32F051R8T6
source [find target/stm32f0x.cfg]
# use hardware reset, connect under reset
reset_config srst_only srst_nogate
reset_config srst_only

3
tcl/board/stm3220g_eval_stlink.cfg
View File

@ -16,5 +16,4 @@ set CHIPNAME STM32F207IGH6
source [find target/stm32f2x.cfg]
# use hardware reset, connect under reset
reset_config srst_only srst_nogate
reset_config srst_only

3
tcl/board/stm3241g_eval_stlink.cfg
View File

@ -16,5 +16,4 @@ set CHIPNAME STM32F417IGH6
source [find target/stm32f4x.cfg]
# use hardware reset, connect under reset
reset_config srst_only srst_nogate
reset_config srst_only

3
tcl/board/stm32429i_eval_stlink.cfg
View File

@ -16,5 +16,4 @@ set CHIPNAME STM32F429NIH6
source [find target/stm32f4x.cfg]
# use hardware reset, connect under reset
reset_config srst_only srst_nogate
reset_config srst_only

3
tcl/board/stm32439i_eval_stlink.cfg
View File

@ -16,5 +16,4 @@ set CHIPNAME STM32F439NIH6
source [find target/stm32f4x.cfg]
# use hardware reset, connect under reset
reset_config srst_only srst_nogate
reset_config srst_only

3
tcl/board/stm32f0discovery.cfg
View File

@ -8,5 +8,4 @@ transport select hla_swd
set WORKAREASIZE 0x2000
source [find target/stm32f0x.cfg]
# use hardware reset, connect under reset
reset_config srst_only srst_nogate
reset_config srst_only

3
tcl/board/stm32f3discovery.cfg
View File

@ -7,5 +7,4 @@ transport select hla_swd
source [find target/stm32f3x.cfg]
# use hardware reset, connect under reset
reset_config srst_only srst_nogate
reset_config srst_only

3
tcl/board/stm32f429discovery.cfg
View File

@ -9,5 +9,4 @@ transport select hla_swd
source [find target/stm32f4x.cfg]
# use hardware reset, connect under reset supported
reset_config srst_only srst_nogate
reset_config srst_only

3
tcl/board/stm32f4discovery.cfg
View File

@ -7,5 +7,4 @@ transport select hla_swd
source [find target/stm32f4x.cfg]
# use hardware reset, connect under reset
reset_config srst_only srst_nogate
reset_config srst_only

3
tcl/board/stm32l0discovery.cfg
View File

@ -8,5 +8,4 @@ transport select hla_swd
set WORKAREASIZE 0x2000
source [find target/stm32l0.cfg]
# use hardware reset, connect under reset
reset_config srst_only srst_nogate
reset_config srst_only

3
tcl/board/stm32ldiscovery.cfg
View File

@ -8,5 +8,4 @@ transport select hla_swd
set WORKAREASIZE 0x4000
source [find target/stm32l1.cfg]
# use hardware reset, connect under reset
reset_config srst_only srst_nogate
reset_config srst_only

1
tcl/board/stm32vldiscovery.cfg
View File

@ -8,3 +8,4 @@ transport select hla_swd
set WORKAREASIZE 0x2000
source [find target/stm32f1x.cfg]
reset_config srst_only

3
tcl/target/k40.cfg
View File

@ -31,8 +31,7 @@ swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPU
target create $_TARGETNAME cortex_m -chain-position $_CHIPNAME.cpu
$_CHIPNAME.cpu configure -event examine-start { puts "START..." ; }
$_CHIPNAME.cpu configure -event examine-end { puts "END..." ; }
reset_config srst_nogate
if {![using_hla]} {
# if srst is not fitted use SYSRESETREQ to

3
tcl/target/k60.cfg
View File

@ -31,8 +31,7 @@ swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPU
target create $_TARGETNAME cortex_m -chain-position $_CHIPNAME.cpu
$_CHIPNAME.cpu configure -event examine-start { puts "START..." ; }
$_CHIPNAME.cpu configure -event examine-end { puts "END..." ; }
reset_config srst_nogate
if {![using_hla]} {
# if srst is not fitted use SYSRESETREQ to

2
tcl/target/kl25.cfg
View File

@ -55,6 +55,8 @@ flash bank $_FLASHNAME kinetis 0 0 0 0 $_TARGETNAME
# specifies up to 1MHz for VLPR mode.
adapter_khz 1000
reset_config srst_nogate
if {![using_hla]} {
# if srst is not fitted use SYSRESETREQ to
# perform a soft reset

2
tcl/target/stm32f0x.cfg
View File

@ -46,6 +46,8 @@ adapter_khz 1000
adapter_nsrst_delay 100
reset_config srst_nogate
if {![using_hla]} {
# if srst is not fitted use SYSRESETREQ to
# perform a soft reset

2
tcl/target/stm32f1x.cfg
View File

@ -86,6 +86,8 @@ if {[using_jtag]} {
jtag_ntrst_delay 100
}
reset_config srst_nogate
if {![using_hla]} {
# if srst is not fitted use SYSRESETREQ to
# perform a soft reset

2
tcl/target/stm32f2x.cfg
View File

@ -70,6 +70,8 @@ $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME stm32f2x 0 0 0 0 $_TARGETNAME
reset_config srst_nogate
if {![using_hla]} {
# if srst is not fitted use SYSRESETREQ to
# perform a soft reset

2
tcl/target/stm32f3x.cfg
View File

@ -70,6 +70,8 @@ $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME stm32f1x 0 0 0 0 $_TARGETNAME
reset_config srst_nogate
if {![using_hla]} {
# if srst is not fitted use SYSRESETREQ to
# perform a soft reset

2
tcl/target/stm32f4x.cfg
View File

@ -82,6 +82,8 @@ if {[using_jtag]} {
jtag_ntrst_delay 100
}
reset_config srst_nogate
if {![using_hla]} {
# if srst is not fitted use SYSRESETREQ to
# perform a soft reset

2
tcl/target/stm32l0.cfg
View File

@ -46,6 +46,8 @@ $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME stm32lx 0x08000000 0 0 0 $_TARGETNAME
reset_config srst_nogate
if {![using_hla]} {
# if srst is not fitted use SYSRESETREQ to
# perform a soft reset

2
tcl/target/stm32l1.cfg
View File

@ -75,6 +75,8 @@ $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME stm32lx 0x08000000 0 0 0 $_TARGETNAME
reset_config srst_nogate
if {![using_hla]} {
# if srst is not fitted use SYSRESETREQ to
# perform a soft reset

2
tcl/target/stm32w108xx.cfg
View File

@ -63,6 +63,8 @@ set _FLASHNAME $_CHIPNAME.flash
# 64k (0x10000) of flash
flash bank $_FLASHNAME em357 0x08000000 0x10000 0 0 $_TARGETNAME
reset_config srst_nogate
if {![using_hla]} {
cortex_m reset_config sysresetreq
}