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adi_v5_jtag: implement DAP WAIT support 

ADIv5 specifies that DP and AP accesses may generate a WAIT
response when the hardware is not able to complete a request for various
reasons in time before the next request is sent. Currently, the software
treats a WAIT response as a fatal error and aborts operation on the DAP.

This patch implements WAIT handling by keeping a journal of all
outstanding and completed accesses, including their response status.
At certain times (when dap_run() is called), the journal is inspected
for WAIT responses and all discarded accesses are replayed to complete
them. Special care is taken to not re-execute already successfully
completed operations.

Change-Id: I2790070388cf1ab2e8c9a042d74eb3ef776aa583
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3166
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
This commit is contained in:
Matthias Welwarsky 2015-12-11 15:12:56 +01:00 committed by Paul Fertser
parent ae8cdc139e
commit a185eaad9d
3 changed files with 457 additions and 157 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

608
src/target/adi_v5_jtag.c
View File

@ -39,6 +39,9 @@
#include "arm.h" #include "arm.h"
#include "arm_adi_v5.h" #include "arm_adi_v5.h"
#include <helper/time_support.h> #include <helper/time_support.h>
#include <helper/list.h>
/*#define DEBUG_WAIT*/
/* JTAG instructions/registers for JTAG-DP and SWJ-DP */ /* JTAG instructions/registers for JTAG-DP and SWJ-DP */
#define JTAG_DP_ABORT 0x8 #define JTAG_DP_ABORT 0x8
@ -52,12 +55,198 @@
static int jtag_ap_q_abort(struct adiv5_dap *dap, uint8_t *ack); static int jtag_ap_q_abort(struct adiv5_dap *dap, uint8_t *ack);
#ifdef DEBUG_WAIT
static const char *dap_reg_name(int instr, int reg_addr)
{
char *reg_name = "UNK";
if (instr == JTAG_DP_DPACC) {
switch (reg_addr) {
case DP_ABORT:
reg_name = "ABORT";
break;
case DP_CTRL_STAT:
reg_name = "CTRL/STAT";
break;
case DP_SELECT:
reg_name = "SELECT";
break;
case DP_RDBUFF:
reg_name = "RDBUFF";
break;
case DP_WCR:
reg_name = "WCR";
break;
default:
reg_name = "UNK";
break;
}
}
if (instr == JTAG_DP_APACC) {
switch (reg_addr) {
case MEM_AP_REG_CSW:
reg_name = "CSW";
break;
case MEM_AP_REG_TAR:
reg_name = "TAR";
break;
case MEM_AP_REG_DRW:
reg_name = "DRW";
break;
case MEM_AP_REG_BD0:
reg_name = "BD0";
break;
case MEM_AP_REG_BD1:
reg_name = "BD1";
break;
case MEM_AP_REG_BD2:
reg_name = "BD2";
break;
case MEM_AP_REG_BD3:
reg_name = "BD3";
break;
case MEM_AP_REG_CFG:
reg_name = "CFG";
break;
case MEM_AP_REG_BASE:
reg_name = "BASE";
break;
case AP_REG_IDR:
reg_name = "IDR";
break;
default:
reg_name = "UNK";
break;
}
}
return reg_name;
}
#endif
struct dap_cmd {
struct list_head lh;
uint8_t instr;
uint8_t reg_addr;
uint8_t RnW;
uint8_t *invalue;
uint8_t ack;
uint32_t memaccess_tck;
uint32_t dp_select;
struct scan_field fields[2];
uint8_t out_addr_buf;
uint8_t invalue_buf[4];
uint8_t outvalue_buf[4];
};
static void log_dap_cmd(const char *header, struct dap_cmd *el)
{
#ifdef DEBUG_WAIT
LOG_DEBUG("%s: %2s %6s %5s 0x%08x 0x%08x %2s", header,
el->instr == JTAG_DP_APACC ? "AP" : "DP",
dap_reg_name(el->instr, el->reg_addr),
el->RnW == DPAP_READ ? "READ" : "WRITE",
buf_get_u32(el->outvalue_buf, 0, 32),
buf_get_u32(el->invalue, 0, 32),
el->ack == JTAG_ACK_OK_FAULT ? "OK" :
(el->ack == JTAG_ACK_WAIT ? "WAIT" : "INVAL"));
#endif
}
static struct dap_cmd *dap_cmd_new(uint8_t instr,
uint8_t reg_addr, uint8_t RnW,
uint8_t *outvalue, uint8_t *invalue,
uint32_t memaccess_tck)
{
struct dap_cmd *cmd;
cmd = (struct dap_cmd *)calloc(1, sizeof(struct dap_cmd));
if (cmd != NULL) {
INIT_LIST_HEAD(&cmd->lh);
cmd->instr = instr;
cmd->reg_addr = reg_addr;
cmd->RnW = RnW;
if (outvalue != NULL)
memcpy(cmd->outvalue_buf, outvalue, 4);
cmd->invalue = (invalue != NULL) ? invalue : cmd->invalue_buf;
cmd->memaccess_tck = memaccess_tck;
}
return cmd;
}
static void flush_journal(struct list_head *lh)
{
struct dap_cmd *el, *tmp;
list_for_each_entry_safe(el, tmp, lh, lh) {
list_del(&el->lh);
free(el);
}
}
/*************************************************************************** /***************************************************************************
* *
* DPACC and APACC scanchain access through JTAG-DP (or SWJ-DP) * DPACC and APACC scanchain access through JTAG-DP (or SWJ-DP)
* *
***************************************************************************/ ***************************************************************************/
static int adi_jtag_dp_scan_cmd(struct adiv5_dap *dap, struct dap_cmd *cmd, uint8_t *ack)
{
struct jtag_tap *tap = dap->tap;
int retval;
retval = arm_jtag_set_instr(tap, cmd->instr, NULL, TAP_IDLE);
if (retval != ERROR_OK)
return retval;
/* Scan out a read or write operation using some DP or AP register.
* For APACC access with any sticky error flag set, this is discarded.
*/
cmd->fields[0].num_bits = 3;
buf_set_u32(&cmd->out_addr_buf, 0, 3, ((cmd->reg_addr >> 1) & 0x6) | (cmd->RnW & 0x1));
cmd->fields[0].out_value = &cmd->out_addr_buf;
cmd->fields[0].in_value = (ack != NULL) ? ack : &cmd->ack;
/* NOTE: if we receive JTAG_ACK_WAIT, the previous operation did not
* complete; data we write is discarded, data we read is unpredictable.
* When overrun detect is active, STICKYORUN is set.
*/
cmd->fields[1].num_bits = 32;
cmd->fields[1].out_value = cmd->outvalue_buf;
cmd->fields[1].in_value = cmd->invalue;
jtag_add_dr_scan(tap, 2, cmd->fields, TAP_IDLE);
/* Add specified number of tck clocks after starting memory bus
* access, giving the hardware time to complete the access.
* They provide more time for the (MEM) AP to complete the read ...
* See "Minimum Response Time" for JTAG-DP, in the ADIv5 spec.
*/
if (cmd->instr == JTAG_DP_APACC) {
if (((cmd->reg_addr == MEM_AP_REG_DRW)
|| ((cmd->reg_addr & 0xF0) == MEM_AP_REG_BD0))
&& (cmd->memaccess_tck != 0))
jtag_add_runtest(cmd->memaccess_tck, TAP_IDLE);
}
return ERROR_OK;
}
static int adi_jtag_dp_scan_cmd_sync(struct adiv5_dap *dap, struct dap_cmd *cmd, uint8_t *ack)
{
int retval;
retval = adi_jtag_dp_scan_cmd(dap, cmd, ack);
if (retval != ERROR_OK)
return retval;
return jtag_execute_queue();
}
/** /**
* Scan DPACC or APACC using target ordered uint8_t buffers. No endianness * Scan DPACC or APACC using target ordered uint8_t buffers. No endianness
* conversions are performed. See section 4.4.3 of the ADIv5 spec, which * conversions are performed. See section 4.4.3 of the ADIv5 spec, which
@ -80,49 +269,23 @@ static int jtag_ap_q_abort(struct adiv5_dap *dap, uint8_t *ack);
static int adi_jtag_dp_scan(struct adiv5_dap *dap, static int adi_jtag_dp_scan(struct adiv5_dap *dap,
uint8_t instr, uint8_t reg_addr, uint8_t RnW, uint8_t instr, uint8_t reg_addr, uint8_t RnW,
uint8_t *outvalue, uint8_t *invalue, uint8_t *ack, uint8_t *outvalue, uint8_t *invalue,
uint32_t memaccess_tck) uint32_t memaccess_tck, uint8_t *ack)
{ {
struct jtag_tap *tap = dap->tap; struct dap_cmd *cmd;
struct scan_field fields[2];
uint8_t out_addr_buf;
int retval; int retval;
retval = arm_jtag_set_instr(tap, instr, NULL, TAP_IDLE); cmd = dap_cmd_new(instr, reg_addr, RnW, outvalue, invalue, memaccess_tck);
if (retval != ERROR_OK) if (cmd != NULL)
return retval; cmd->dp_select = dap->select;
else
return ERROR_JTAG_DEVICE_ERROR;
/* Scan out a read or write operation using some DP or AP register. retval = adi_jtag_dp_scan_cmd(dap, cmd, ack);
* For APACC access with any sticky error flag set, this is discarded. if (retval == ERROR_OK)
*/ list_add_tail(&cmd->lh, &dap->cmd_journal);
fields[0].num_bits = 3;
buf_set_u32(&out_addr_buf, 0, 3, ((reg_addr >> 1) & 0x6) | (RnW & 0x1));
fields[0].out_value = &out_addr_buf;
fields[0].in_value = ack;
/* NOTE: if we receive JTAG_ACK_WAIT, the previous operation did not return retval;
* complete; data we write is discarded, data we read is unpredictable.
* When overrun detect is active, STICKYORUN is set.
*/
fields[1].num_bits = 32;
fields[1].out_value = outvalue;
fields[1].in_value = invalue;
jtag_add_dr_scan(tap, 2, fields, TAP_IDLE);
/* Add specified number of tck clocks after starting memory bus
* access, giving the hardware time to complete the access.
* They provide more time for the (MEM) AP to complete the read ...
* See "Minimum Response Time" for JTAG-DP, in the ADIv5 spec.
*/
if ((instr == JTAG_DP_APACC)
&& ((reg_addr == MEM_AP_REG_DRW)
|| ((reg_addr & 0xF0) == MEM_AP_REG_BD0))
&& memaccess_tck != 0)
jtag_add_runtest(memaccess_tck, TAP_IDLE);
return ERROR_OK;
} }
/** /**
@ -133,8 +296,8 @@ static int adi_jtag_dp_scan(struct adiv5_dap *dap,
*/ */
static int adi_jtag_dp_scan_u32(struct adiv5_dap *dap, static int adi_jtag_dp_scan_u32(struct adiv5_dap *dap,
uint8_t instr, uint8_t reg_addr, uint8_t RnW, uint8_t instr, uint8_t reg_addr, uint8_t RnW,
uint32_t outvalue, uint32_t *invalue, uint8_t *ack, uint32_t outvalue, uint32_t *invalue,
uint32_t memaccess_tck) uint32_t memaccess_tck, uint8_t *ack)
{ {
uint8_t out_value_buf[4]; uint8_t out_value_buf[4];
int retval; int retval;
@ -142,7 +305,7 @@ static int adi_jtag_dp_scan_u32(struct adiv5_dap *dap,
buf_set_u32(out_value_buf, 0, 32, outvalue); buf_set_u32(out_value_buf, 0, 32, outvalue);
retval = adi_jtag_dp_scan(dap, instr, reg_addr, RnW, retval = adi_jtag_dp_scan(dap, instr, reg_addr, RnW,
out_value_buf, (uint8_t *)invalue, ack, memaccess_tck); out_value_buf, (uint8_t *)invalue, memaccess_tck, ack);
if (retval != ERROR_OK) if (retval != ERROR_OK)
return retval; return retval;
@ -153,13 +316,17 @@ static int adi_jtag_dp_scan_u32(struct adiv5_dap *dap,
return retval; return retval;
} }
static void adi_jtag_finish_read(struct adiv5_dap *dap) static int adi_jtag_finish_read(struct adiv5_dap *dap)
{ {
int retval = ERROR_OK;
if (dap->last_read != NULL) { if (dap->last_read != NULL) {
adi_jtag_dp_scan_u32(dap, JTAG_DP_DPACC, retval = adi_jtag_dp_scan_u32(dap, JTAG_DP_DPACC,
DP_RDBUFF, DPAP_READ, 0, dap->last_read, &dap->ack, 0); DP_RDBUFF, DPAP_READ, 0, dap->last_read, 0, NULL);
dap->last_read = NULL; dap->last_read = NULL;
} }
return retval;
} }
static int adi_jtag_scan_inout_check_u32(struct adiv5_dap *dap, static int adi_jtag_scan_inout_check_u32(struct adiv5_dap *dap,
@ -170,16 +337,207 @@ static int adi_jtag_scan_inout_check_u32(struct adiv5_dap *dap,
/* Issue the read or write */ /* Issue the read or write */
retval = adi_jtag_dp_scan_u32(dap, instr, reg_addr, retval = adi_jtag_dp_scan_u32(dap, instr, reg_addr,
RnW, outvalue, NULL, NULL, memaccess_tck); RnW, outvalue, NULL, memaccess_tck, NULL);
if (retval != ERROR_OK) if (retval != ERROR_OK)
return retval; return retval;
/* For reads, collect posted value; RDBUFF has no other effect. /* For reads, collect posted value; RDBUFF has no other effect.
* Assumes read gets acked with OK/FAULT, and CTRL_STAT says "OK". * Assumes read gets acked with OK/FAULT, and CTRL_STAT says "OK".
*/ */
if ((RnW == DPAP_READ) && (invalue != NULL)) if ((RnW == DPAP_READ) && (invalue != NULL)) {
retval = adi_jtag_dp_scan_u32(dap, JTAG_DP_DPACC, retval = adi_jtag_dp_scan_u32(dap, JTAG_DP_DPACC,
DP_RDBUFF, DPAP_READ, 0, invalue, &dap->ack, 0); DP_RDBUFF, DPAP_READ, 0, invalue, 0, NULL);
if (retval != ERROR_OK)
return retval;
}
return jtag_execute_queue();
}
static int jtagdp_overrun_check(struct adiv5_dap *dap)
{
int retval;
struct dap_cmd *el, *tmp, *prev = NULL;
int found_wait = 0;
uint64_t time_now;
LIST_HEAD(replay_list);
/* make sure all queued transactions are complete */
retval = jtag_execute_queue();
if (retval != ERROR_OK)
goto done;
/* skip all completed transactions up to the first WAIT */
list_for_each_entry(el, &dap->cmd_journal, lh) {
if (el->ack == JTAG_ACK_OK_FAULT) {
log_dap_cmd("LOG", el);
} else if (el->ack == JTAG_ACK_WAIT) {
found_wait = 1;
break;
} else {
LOG_ERROR("Invalid ACK (%1x) in DAP response", el->ack);
log_dap_cmd("ERR", el);
retval = ERROR_JTAG_DEVICE_ERROR;
goto done;
}
}
/*
* If we found a stalled transaction and a previous transaction
* exists, check if it's a READ access.
*/
if (found_wait && el != list_first_entry(&dap->cmd_journal, struct dap_cmd, lh)) {
prev = list_entry(el->lh.prev, struct dap_cmd, lh);
if (prev->RnW == DPAP_READ) {
log_dap_cmd("PND", prev);
/* search for the next OK transaction, it contains
* the result of the previous READ */
tmp = el;
list_for_each_entry_from(tmp, &dap->cmd_journal, lh) {
if (tmp->ack == JTAG_ACK_OK_FAULT) {
/* recover the read value */
log_dap_cmd("FND", tmp);
if (el->invalue != el->invalue_buf) {
uint32_t invalue = le_to_h_u32(tmp->invalue);
memcpy(el->invalue, &invalue, sizeof(uint32_t));
}
prev = NULL;
break;
}
}
if (prev != NULL) {
log_dap_cmd("LST", el);
/*
* At this point we're sure that no previous
* transaction completed and the DAP/AP is still
* in busy state. We know that the next "OK" scan
* will return the READ result we need to recover.
* To complete the READ, we just keep polling RDBUFF
* until the WAIT condition clears
*/
tmp = dap_cmd_new(JTAG_DP_DPACC,
DP_RDBUFF, DPAP_READ, NULL, NULL, 0);
if (tmp == NULL) {
retval = ERROR_JTAG_DEVICE_ERROR;
goto done;
}
/* synchronously retry the command until it succeeds */
time_now = timeval_ms();
do {
retval = adi_jtag_dp_scan_cmd_sync(dap, tmp, NULL);
if (retval != ERROR_OK)
break;
if (tmp->ack == JTAG_ACK_OK_FAULT) {
log_dap_cmd("FND", tmp);
if (el->invalue != el->invalue_buf) {
uint32_t invalue = le_to_h_u32(tmp->invalue);
memcpy(el->invalue, &invalue, sizeof(uint32_t));
}
break;
}
if (tmp->ack != JTAG_ACK_WAIT) {
LOG_ERROR("Invalid ACK (%1x) in DAP response", tmp->ack);
log_dap_cmd("ERR", tmp);
retval = ERROR_JTAG_DEVICE_ERROR;
break;
}
} while (timeval_ms() - time_now < 1000);
if (retval == ERROR_OK) {
/* timeout happened */
if (tmp->ack != JTAG_ACK_OK_FAULT) {
LOG_ERROR("Timeout during WAIT recovery");
jtag_ap_q_abort(dap, NULL);
retval = ERROR_JTAG_DEVICE_ERROR;
}
}
/* we're done with this command, release it */
free(tmp);
if (retval != ERROR_OK)
goto done;
}
/* make el->invalue point to the default invalue
* so that we can safely retry it without clobbering
* the result we just recovered */
el->invalue = el->invalue_buf;
}
}
/* move all remaining transactions over to the replay list */
list_for_each_entry_safe_from(el, tmp, &dap->cmd_journal, lh) {
log_dap_cmd("REP", el);
list_move_tail(&el->lh, &replay_list);
}
/* we're done with the journal, flush it */
flush_journal(&dap->cmd_journal);
/* check for overrun condition in the last batch of transactions */
if (found_wait) {
LOG_INFO("DAP transaction stalled (WAIT) - slowing down");
/* clear the sticky overrun condition */
retval = adi_jtag_scan_inout_check_u32(dap, JTAG_DP_DPACC,
DP_CTRL_STAT, DPAP_WRITE,
dap->dp_ctrl_stat | SSTICKYORUN, NULL, 0);
if (retval != ERROR_OK)
goto done;
/* restore SELECT register first */
if (!list_empty(&replay_list)) {
el = list_first_entry(&replay_list, struct dap_cmd, lh);
tmp = dap_cmd_new(JTAG_DP_DPACC,
DP_SELECT, DPAP_WRITE, (uint8_t *)&el->dp_select, NULL, 0);
if (tmp == NULL) {
retval = ERROR_JTAG_DEVICE_ERROR;
goto done;
}
list_add(&tmp->lh, &replay_list);
dap->select = DP_SELECT_INVALID;
}
list_for_each_entry_safe(el, tmp, &replay_list, lh) {
time_now = timeval_ms();
do {
retval = adi_jtag_dp_scan_cmd_sync(dap, el, NULL);
if (retval != ERROR_OK)
break;
log_dap_cmd("REC", el);
if (el->ack == JTAG_ACK_OK_FAULT) {
if (el->invalue != el->invalue_buf) {
uint32_t invalue = le_to_h_u32(el->invalue);
memcpy(el->invalue, &invalue, sizeof(uint32_t));
}
break;
}
if (el->ack != JTAG_ACK_WAIT) {
LOG_ERROR("Invalid ACK (%1x) in DAP response", el->ack);
log_dap_cmd("ERR", el);
retval = ERROR_JTAG_DEVICE_ERROR;
break;
}
} while (timeval_ms() - time_now < 1000);
if (retval == ERROR_OK) {
if (el->ack != JTAG_ACK_OK_FAULT) {
LOG_ERROR("Timeout during WAIT recovery");
jtag_ap_q_abort(dap, NULL);
retval = ERROR_JTAG_DEVICE_ERROR;
}
} else
break;
}
}
done:
flush_journal(&replay_list);
flush_journal(&dap->cmd_journal);
return retval; return retval;
} }
@ -190,123 +548,48 @@ static int jtagdp_transaction_endcheck(struct adiv5_dap *dap)
/* too expensive to call keep_alive() here */ /* too expensive to call keep_alive() here */
/* Here be dragons!
*
* It is easy to be in a JTAG clock range where the target
* is not operating in a stable fashion. This happens
* for a few reasons:
*
* - the user may construct a simple test case to try to see
* if a higher JTAG clock works to eke out more performance.
* This simple case may pass, but more complex situations can
* fail.
*
* - The mostly works JTAG clock rate and the complete failure
* JTAG clock rate may be as much as 2-4x apart. This seems
* to be especially true on RC oscillator driven parts.
*
* So: even if calling adi_jtag_scan_inout_check_u32() multiple
* times here seems to "make things better here", it is just
* hiding problems with too high a JTAG clock.
*
* Note that even if some parts have RCLK/RTCK, that doesn't
* mean that RCLK/RTCK is the *correct* rate to run the JTAG
* interface at, i.e. RCLK/RTCK rates can be "too high", especially
* before the RC oscillator phase is not yet complete.
*/
/* Post CTRL/STAT read; discard any previous posted read value /* Post CTRL/STAT read; discard any previous posted read value
* but collect its ACK status. * but collect its ACK status.
*/ */
retval = adi_jtag_scan_inout_check_u32(dap, JTAG_DP_DPACC, retval = adi_jtag_scan_inout_check_u32(dap, JTAG_DP_DPACC,
DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat, 0); DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat, 0);
if (retval != ERROR_OK) if (retval != ERROR_OK)
return retval; goto done;
retval = jtag_execute_queue();
if (retval != ERROR_OK)
return retval;
dap->ack = dap->ack & 0x7;
/* common code path avoids calling timeval_ms() */
if (dap->ack != JTAG_ACK_OK_FAULT) {
long long then = timeval_ms();
while (dap->ack != JTAG_ACK_OK_FAULT) {
if (dap->ack == JTAG_ACK_WAIT) {
if ((timeval_ms()-then) > 1000) {
LOG_WARNING("Timeout (1000ms) waiting "
"for ACK=OK/FAULT "
"in JTAG-DP transaction - aborting");
uint8_t ack;
int abort_ret = jtag_ap_q_abort(dap, &ack);
if (abort_ret != 0)
LOG_WARNING("Abort failed : return=%d ack=%d", abort_ret, ack);
return ERROR_JTAG_DEVICE_ERROR;
}
} else {
LOG_WARNING("Invalid ACK %#x "
"in JTAG-DP transaction",
dap->ack);
return ERROR_JTAG_DEVICE_ERROR;
}
retval = adi_jtag_scan_inout_check_u32(dap, JTAG_DP_DPACC,
DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat, 0);
if (retval != ERROR_OK)
return retval;
retval = jtag_execute_queue();
if (retval != ERROR_OK)
return retval;
dap->ack = dap->ack & 0x7;
}
}
/* REVISIT also STICKYCMP, for pushed comparisons (nyet used) */ /* REVISIT also STICKYCMP, for pushed comparisons (nyet used) */
/* Check for STICKYERR and STICKYORUN */ /* Check for STICKYERR */
if (ctrlstat & (SSTICKYORUN | SSTICKYERR)) { if (ctrlstat & SSTICKYERR) {
LOG_DEBUG("jtag-dp: CTRL/STAT error, 0x%" PRIx32, ctrlstat); LOG_DEBUG("jtag-dp: CTRL/STAT 0x%" PRIx32, ctrlstat);
/* Check power to debug regions */ /* Check power to debug regions */
if ((ctrlstat & (CDBGPWRUPREQ | CDBGPWRUPACK | CSYSPWRUPREQ | CSYSPWRUPACK)) != if ((ctrlstat & (CDBGPWRUPREQ | CDBGPWRUPACK | CSYSPWRUPREQ | CSYSPWRUPACK)) !=
(CDBGPWRUPREQ | CDBGPWRUPACK | CSYSPWRUPREQ | CSYSPWRUPACK)) { (CDBGPWRUPREQ | CDBGPWRUPACK | CSYSPWRUPREQ | CSYSPWRUPACK)) {
LOG_ERROR("Debug regions are unpowered, an unexpected reset might have happened"); LOG_ERROR("Debug regions are unpowered, an unexpected reset might have happened");
return ERROR_JTAG_DEVICE_ERROR; retval = ERROR_JTAG_DEVICE_ERROR;
} else { goto done;
if (ctrlstat & SSTICKYORUN)
LOG_ERROR("JTAG-DP OVERRUN - check clock, "
"memaccess, or reduce jtag speed");
if (ctrlstat & SSTICKYERR)
LOG_ERROR("JTAG-DP STICKY ERROR");
/* Clear Sticky Error Bits */
retval = adi_jtag_scan_inout_check_u32(dap, JTAG_DP_DPACC,
DP_CTRL_STAT, DPAP_WRITE,
dap->dp_ctrl_stat | SSTICKYORUN
| SSTICKYERR, NULL, 0);
if (retval != ERROR_OK)
return retval;
retval = adi_jtag_scan_inout_check_u32(dap, JTAG_DP_DPACC,
DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat, 0);
if (retval != ERROR_OK)
return retval;
retval = jtag_execute_queue();
if (retval != ERROR_OK)
return retval;
LOG_DEBUG("jtag-dp: CTRL/STAT 0x%" PRIx32, ctrlstat);
} }
retval = jtag_execute_queue();
if (ctrlstat & SSTICKYERR)
LOG_ERROR("JTAG-DP STICKY ERROR");
if (ctrlstat & SSTICKYORUN)
LOG_DEBUG("JTAG-DP STICKY OVERRUN");
/* Clear Sticky Error Bits */
retval = adi_jtag_scan_inout_check_u32(dap, JTAG_DP_DPACC,
DP_CTRL_STAT, DPAP_WRITE,
dap->dp_ctrl_stat | SSTICKYERR, NULL, 0);
if (retval != ERROR_OK) if (retval != ERROR_OK)
return retval; goto done;
return ERROR_JTAG_DEVICE_ERROR;
if (ctrlstat & SSTICKYERR) {
retval = ERROR_JTAG_DEVICE_ERROR;
goto done;
}
} }
return ERROR_OK; done:
flush_journal(&dap->cmd_journal);
return retval;
} }
/*--------------------------------------------------------------------------*/ /*--------------------------------------------------------------------------*/
@ -315,7 +598,7 @@ static int jtag_dp_q_read(struct adiv5_dap *dap, unsigned reg,
uint32_t *data) uint32_t *data)
{ {
int retval = adi_jtag_dp_scan_u32(dap, JTAG_DP_DPACC, reg, int retval = adi_jtag_dp_scan_u32(dap, JTAG_DP_DPACC, reg,
DPAP_READ, 0, dap->last_read, &dap->ack, 0); DPAP_READ, 0, dap->last_read, 0, NULL);
dap->last_read = data; dap->last_read = data;
return retval; return retval;
} }
@ -324,7 +607,7 @@ static int jtag_dp_q_write(struct adiv5_dap *dap, unsigned reg,
uint32_t data) uint32_t data)
{ {
int retval = adi_jtag_dp_scan_u32(dap, JTAG_DP_DPACC, int retval = adi_jtag_dp_scan_u32(dap, JTAG_DP_DPACC,
reg, DPAP_WRITE, data, dap->last_read, &dap->ack, 0); reg, DPAP_WRITE, data, dap->last_read, 0, NULL);
dap->last_read = NULL; dap->last_read = NULL;
return retval; return retval;
} }
@ -351,8 +634,7 @@ static int jtag_ap_q_read(struct adiv5_ap *ap, unsigned reg,
return retval; return retval;
retval = adi_jtag_dp_scan_u32(ap->dap, JTAG_DP_APACC, reg, retval = adi_jtag_dp_scan_u32(ap->dap, JTAG_DP_APACC, reg,
DPAP_READ, 0, ap->dap->last_read, &ap->dap->ack, DPAP_READ, 0, ap->dap->last_read, ap->memaccess_tck, NULL);
ap->memaccess_tck);
ap->dap->last_read = data; ap->dap->last_read = data;
return retval; return retval;
@ -366,8 +648,7 @@ static int jtag_ap_q_write(struct adiv5_ap *ap, unsigned reg,
return retval; return retval;
retval = adi_jtag_dp_scan_u32(ap->dap, JTAG_DP_APACC, reg, retval = adi_jtag_dp_scan_u32(ap->dap, JTAG_DP_APACC, reg,
DPAP_WRITE, data, ap->dap->last_read, &ap->dap->ack, DPAP_WRITE, data, ap->dap->last_read, ap->memaccess_tck, NULL);
ap->memaccess_tck);
ap->dap->last_read = NULL; ap->dap->last_read = NULL;
return retval; return retval;
} }
@ -375,14 +656,27 @@ static int jtag_ap_q_write(struct adiv5_ap *ap, unsigned reg,
static int jtag_ap_q_abort(struct adiv5_dap *dap, uint8_t *ack) static int jtag_ap_q_abort(struct adiv5_dap *dap, uint8_t *ack)
{ {
/* for JTAG, this is the only valid ABORT register operation */ /* for JTAG, this is the only valid ABORT register operation */
return adi_jtag_dp_scan_u32(dap, JTAG_DP_ABORT, int retval = adi_jtag_dp_scan_u32(dap, JTAG_DP_ABORT,
0, DPAP_WRITE, 1, NULL, ack, 0); 0, DPAP_WRITE, 1, NULL, 0, NULL);
if (retval != ERROR_OK)
return retval;
return jtag_execute_queue();
} }
static int jtag_dp_run(struct adiv5_dap *dap) static int jtag_dp_run(struct adiv5_dap *dap)
{ {
adi_jtag_finish_read(dap); int retval;
return jtagdp_transaction_endcheck(dap); int retval2 = ERROR_OK;
retval = adi_jtag_finish_read(dap);
if (retval != ERROR_OK)
goto done;
retval2 = jtagdp_overrun_check(dap);
retval = jtagdp_transaction_endcheck(dap);
done:
return (retval2 != ERROR_OK) ? retval2 : retval;
} }
/* FIXME don't export ... just initialize as /* FIXME don't export ... just initialize as

2
src/target/arm_adi_v5.c
View File

@ -76,6 +76,7 @@
#include "arm.h" #include "arm.h"
#include "arm_adi_v5.h" #include "arm_adi_v5.h"
#include <helper/time_support.h> #include <helper/time_support.h>
#include <helper/list.h>
/* ARM ADI Specification requires at least 10 bits used for TAR autoincrement */ /* ARM ADI Specification requires at least 10 bits used for TAR autoincrement */
@ -586,6 +587,7 @@ struct adiv5_dap *dap_init(void)
/* Number of bits for tar autoincrement, impl. dep. at least 10 */ /* Number of bits for tar autoincrement, impl. dep. at least 10 */
dap->ap[i].tar_autoincr_block = (1<<10); dap->ap[i].tar_autoincr_block = (1<<10);
} }
INIT_LIST_HEAD(&dap->cmd_journal);
return dap; return dap;
} }

4
src/target/arm_adi_v5.h
View File

@ -31,6 +31,7 @@
* resources accessed through a MEM-AP. * resources accessed through a MEM-AP.
*/ */
#include <helper/list.h>
#include "arm_jtag.h" #include "arm_jtag.h"
/* FIXME remove these JTAG-specific decls when mem_ap_read_buf_u32() /* FIXME remove these JTAG-specific decls when mem_ap_read_buf_u32()
@ -206,6 +207,9 @@ struct adiv5_ap {
struct adiv5_dap { struct adiv5_dap {
const struct dap_ops *ops; const struct dap_ops *ops;
/* dap transaction list for WAIT support */
struct list_head cmd_journal;
struct jtag_tap *tap; struct jtag_tap *tap;
/* Control config */ /* Control config */
uint32_t dp_ctrl_stat; uint32_t dp_ctrl_stat;