Merge pull request #1149 from zqb-all/read-write-cross-page
riscv: fix read/write virtual memory across page boundaries
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commit
9ff272e34b
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@ -3086,6 +3086,21 @@ static int riscv_virt2phys(struct target *target, target_addr_t virtual, target_
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virtual, physical);
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}
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static int check_virt_memory_access(struct target *target, target_addr_t address,
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uint32_t size, uint32_t count, bool is_write)
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{
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const bool is_misaligned = address % size != 0;
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// TODO: This assumes that size of each page is 4 KiB, which is not necessarily the case.
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const bool crosses_page_boundary = RISCV_PGBASE(address + size * count - 1) != RISCV_PGBASE(address);
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if (is_misaligned && crosses_page_boundary) {
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LOG_TARGET_ERROR(target, "Mis-aligned memory %s (address=0x%" TARGET_PRIxADDR ", size=%d, count=%d)"
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" would access an element across page boundary. This is not supported.",
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is_write ? "write" : "read", address, size, count);
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return ERROR_FAIL;
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}
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return ERROR_OK;
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}
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static int riscv_read_phys_memory(struct target *target, target_addr_t phys_address,
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uint32_t size, uint32_t count, uint8_t *buffer)
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{
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@ -3093,25 +3108,6 @@ static int riscv_read_phys_memory(struct target *target, target_addr_t phys_addr
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return r->read_memory(target, phys_address, size, count, buffer, size);
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}
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static int riscv_read_memory(struct target *target, target_addr_t address,
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uint32_t size, uint32_t count, uint8_t *buffer)
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{
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if (count == 0) {
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LOG_TARGET_WARNING(target, "0-length read from 0x%" TARGET_PRIxADDR, address);
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return ERROR_OK;
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}
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target_addr_t physical_addr;
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int result = target->type->virt2phys(target, address, &physical_addr);
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if (result != ERROR_OK) {
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LOG_TARGET_ERROR(target, "Address translation failed.");
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return result;
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}
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RISCV_INFO(r);
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return r->read_memory(target, physical_addr, size, count, buffer, size);
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}
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static int riscv_write_phys_memory(struct target *target, target_addr_t phys_address,
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uint32_t size, uint32_t count, const uint8_t *buffer)
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{
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@ -3121,25 +3117,76 @@ static int riscv_write_phys_memory(struct target *target, target_addr_t phys_add
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return tt->write_memory(target, phys_address, size, count, buffer);
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}
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static int riscv_write_memory(struct target *target, target_addr_t address,
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uint32_t size, uint32_t count, const uint8_t *buffer)
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static int riscv_rw_memory(struct target *target, target_addr_t address, uint32_t size,
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uint32_t count, uint8_t *read_buffer, const uint8_t *write_buffer)
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{
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/* Exactly one of the buffers must be set, the other must be NULL */
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assert(!!read_buffer != !!write_buffer);
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const bool is_write = write_buffer ? true : false;
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if (count == 0) {
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LOG_TARGET_WARNING(target, "0-length write to 0x%" TARGET_PRIxADDR, address);
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LOG_TARGET_WARNING(target, "0-length %s 0x%" TARGET_PRIxADDR,
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is_write ? "write to" : "read from", address);
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return ERROR_OK;
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}
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target_addr_t physical_addr;
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int result = target->type->virt2phys(target, address, &physical_addr);
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if (result != ERROR_OK) {
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LOG_TARGET_ERROR(target, "Address translation failed.");
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int mmu_enabled;
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int result = riscv_mmu(target, &mmu_enabled);
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if (result != ERROR_OK)
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return result;
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}
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RISCV_INFO(r);
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struct target_type *tt = get_target_type(target);
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if (!tt)
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return ERROR_FAIL;
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return tt->write_memory(target, physical_addr, size, count, buffer);
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if (!mmu_enabled) {
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if (is_write)
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return tt->write_memory(target, address, size, count, write_buffer);
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else
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return r->read_memory(target, address, size, count, read_buffer, size);
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}
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result = check_virt_memory_access(target, address, size, count, is_write);
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if (result != ERROR_OK)
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return result;
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uint32_t current_count = 0;
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while (current_count < count) {
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target_addr_t physical_addr;
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result = target->type->virt2phys(target, address, &physical_addr);
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if (result != ERROR_OK) {
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LOG_TARGET_ERROR(target, "Address translation failed.");
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return result;
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}
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/* TODO: For simplicity, this algorithm assumes the worst case - the smallest possible page size,
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* which is 4 KiB. The algorithm can be improved to detect the real page size, and allow to use larger
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* memory transfers and avoid extra unnecessary virt2phys address translations. */
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uint32_t chunk_count = MIN(count - current_count, (RISCV_PGSIZE - RISCV_PGOFFSET(address)) / size);
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if (is_write)
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result = tt->write_memory(target, physical_addr, size, chunk_count, write_buffer + current_count * size);
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else
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result = r->read_memory(target, physical_addr, size, chunk_count, read_buffer + current_count * size, size);
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if (result != ERROR_OK)
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return result;
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current_count += chunk_count;
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address += chunk_count * size;
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}
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return ERROR_OK;
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}
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static int riscv_read_memory(struct target *target, target_addr_t address,
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uint32_t size, uint32_t count, uint8_t *buffer)
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{
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return riscv_rw_memory(target, address, size, count, buffer, NULL);
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}
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static int riscv_write_memory(struct target *target, target_addr_t address,
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uint32_t size, uint32_t count, const uint8_t *buffer)
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{
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return riscv_rw_memory(target, address, size, count, NULL, buffer);
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}
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static const char *riscv_get_gdb_arch(const struct target *target)
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@ -29,6 +29,9 @@ struct riscv_program;
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#define RISCV_HGATP_MODE(xlen) ((xlen) == 32 ? HGATP32_MODE : HGATP64_MODE)
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#define RISCV_HGATP_PPN(xlen) ((xlen) == 32 ? HGATP32_PPN : HGATP64_PPN)
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#define RISCV_PGSHIFT 12
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#define RISCV_PGSIZE BIT(RISCV_PGSHIFT)
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#define RISCV_PGBASE(addr) ((addr) & ~(RISCV_PGSIZE - 1))
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#define RISCV_PGOFFSET(addr) ((addr) & (RISCV_PGSIZE - 1))
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#define PG_MAX_LEVEL 5
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