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doc: xtensa architecture clarifications/fixes 

- Fix Xtensa .cfg file references for NXP EVK
- Add clarification note for "xtensa xtmem" command
- Resolve TEX build warnings

Signed-off-by: ianst <ianst@cadence.com>
Change-Id: I0f2b56d0d084d86f557fadf3ac35fd04bf99650c
Reviewed-on: https://review.openocd.org/c/openocd/+/7972
Tested-by: jenkins
Reviewed-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This commit is contained in:
ianst 2023-10-20 13:00:41 -07:00 committed by Antonio Borneo
parent 3862e07688
commit 9ebc2a6519
1 changed files with 13 additions and 6 deletions
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doc/openocd.texi
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@ -11364,16 +11364,18 @@ NOTE: @file{xtensa-core-XXX.cfg} must match the target Xtensa hardware
connected to OpenOCD. connected to OpenOCD.
Some example Xtensa configurations are bundled with OpenOCD for reference: Some example Xtensa configurations are bundled with OpenOCD for reference:
@itemize @bullet @enumerate
@item Cadence Palladium VDebug emulation target. The user can combine their @item Cadence Palladium VDebug emulation target. The user can combine their
@file{xtensa-core-XXX.cfg} with the provided @file{xtensa-core-XXX.cfg} with the provided
@file{board/xtensa-palladium-vdebug.cfg} to debug an emulated Xtensa RTL design. @file{board/xtensa-palladium-vdebug.cfg} to debug an emulated Xtensa RTL design.
@item NXP MIMXRT685-EVK evaluation kit. The relevant configuration files are @item NXP MIMXRT685-EVK evaluation kit. The relevant configuration files are:
@file{board/xtensa-rt685-jlink.cfg} and @file{board/xtensa-core-nxp_rt600.cfg}. @itemize @bullet
Additional information is provided by @item @file{board/xtensa-rt685-ext.cfg}
@uref{https://www.nxp.com/design/development-boards/i-mx-evaluation-and-development-boards/i-mx-rt600-evaluation-kit:MIMXRT685-EVK, @item @file{target/xtensa-core-nxp_rt600.cfg}
NXP}.
@end itemize @end itemize
Additional information is available by searching for "i.MX RT600 Evaluation Kit"
on @url{https://www.nxp.com}.
@end enumerate
@subsection Xtensa Configuration Commands @subsection Xtensa Configuration Commands
@ -11398,6 +11400,11 @@ others may be common to both but have different valid ranges.
Configure Xtensa target memory. Memory type determines access rights, Configure Xtensa target memory. Memory type determines access rights,
where RAMs are read/write while ROMs are read-only. @var{baseaddr} and where RAMs are read/write while ROMs are read-only. @var{baseaddr} and
@var{bytes} are both integers, typically hexadecimal and decimal, respectively. @var{bytes} are both integers, typically hexadecimal and decimal, respectively.
NOTE: Some Xtensa memory types, such as system RAM/ROM or MMIO/device regions,
can be added or modified after the Xtensa core has been generated. Additional
@code{xtensa xtmem} definitions should be manually added to xtensa-core-XXX.cfg
to keep OpenOCD's target address map consistent with the Xtensa configuration.
@end deffn @end deffn
@deffn {Config Command} {xtensa xtmem} (@option{icache}|@option{dcache}) linebytes cachebytes ways [writeback] @deffn {Config Command} {xtensa xtmem} (@option{icache}|@option{dcache}) linebytes cachebytes ways [writeback]