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- added new and missing target scripts - stm32stick and str730 

git-svn-id: svn://svn.berlios.de/openocd/trunk@579 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
ntfreak 2008-04-14 08:15:23 +00:00
parent 6a775dff38
commit 9bd0116866
4 changed files with 66 additions and 2 deletions
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3
src/target/Makefile.am
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@ -27,5 +27,6 @@ nobase_dist_pkglib_DATA = xscale/debug_handler.bin event/at91eb40a_reset.script
ecos/at91eb40a.elf target/lm3s6965.cfg interface/parport.cfg \
event/omap5912_reset.script interface/amontec-tiny.cfg interface/str9-comstick.cfg \
target/epc9301.cfg target/ipx42x.cfg target/lpc2129.cfg target/netx500.cfg \
target/omap5912.cfg target/pxa270.cfg target/str750.cfg target/str9comstick.cfg
target/omap5912.cfg target/pxa270.cfg target/str750.cfg target/str9comstick.cfg \
target/str730.cfg target/stm32stick.cfg

25
src/target/target/stm32stick.cfg Normal file
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@ -0,0 +1,25 @@
# Hitex stm32 performance stick
jtag_nsrst_delay 100
jtag_ntrst_delay 100
#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config trst_and_srst
#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 4 0x1 0xf 0xe
jtag_device 5 0x1 0x1 0x1e
jtag_device 4 0x1 0xf 0xe
#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target cortex_m3 little reset_init 0
run_and_halt_time 0 30
working_area 0 0x20000000 16384 nobackup
#flash bank str7x <base> <size> 0 0 <target#> <variant>
flash bank stm32x 0 0 0 0 0
# For more information about the configuration files, take a look at:
# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger

28
src/target/target/str730.cfg Normal file
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@ -0,0 +1,28 @@
#STR730 CPU
#use combined on interfaces or targets that can’t set TRST/SRST separately
#reset_config trst_and_srst srst_pulls_trst
reset_config trst_and_srst srst_pulls_trst
#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 4 0x1 0xf 0xe
#jtag nTRST and nSRST delay
jtag_nsrst_delay 500
jtag_ntrst_delay 500
#target configuration
daemon_startup reset
#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little run_and_halt 0 arm7tdmi
run_and_halt_time 0 30
working_area 0 0x40000000 0x4000 nobackup
#flash bank <driver> <base> <size> <chip_width> <bus_width>
flash bank str7x 0x20000000 0x00040000 0 0 0 STR3x

12
src/target/target/str750.cfg
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@ -1,19 +1,29 @@
#STR750 CPU
#use combined on interfaces or targets that can’t set TRST/SRST separately
#reset_config trst_and_srst srst_pulls_trst
reset_config trst_and_srst srst_pulls_trst
#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 4 0x1 0xf 0xe
#jtag nTRST and nSRST delay
jtag_nsrst_delay 500
jtag_ntrst_delay 500
#target configuration
daemon_startup reset
#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little run_and_halt 0 arm7tdmi
run_and_halt_time 0 30
working_area 0 0x40000000 0x4000 nobackup
#flash bank <driver> <base> <size> <chip_width> <bus_width>
flash bank str7x 0x20000000 0x000040000 0 0 0 STR75x
flash bank str7x 0x20000000 0x00040000 0 0 0 STR75x
flash bank str7x 0x200C0000 0x00004000 0 0 0 STR75x