pld/intel: remove idcodes from intel.c
Remove list of id codes for all families. Maintain a list with id, bscan-length and check position in the tcl config files for each family. The Intel FPGA Driver option 'family' is not otional anymore. Change-Id: I9a40a041069e84f6b4728f2cd715756a36759c89 Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/8083 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
This commit is contained in:
Daniel Anselmi
Antonio Borneo
parent
7e4c9609ca
commit
9bc7a381b2
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@ -8886,13 +8886,12 @@ For the option @option{-family} @var{name} is one of @var{trion|titanium}.
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@end deffn
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@deffn {FPGA Driver} {intel} [@option{-family} <name>]
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@deffn {FPGA Driver} {intel} @option{-family} <name>
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This driver can be used to load the bitstream into Intel (former Altera) FPGAs.
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The families Cyclone III, Cyclone IV, Cyclone V, Cyclone 10, Arria II are supported.
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@c Arria V and Arria 10, MAX II, MAX V, MAX10)
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For the option @option{-family} @var{name} is one of @var{cycloneiii cycloneiv cyclonev cyclone10 arriaii}.
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This is needed when the JTAG ID of the device is ambiguous (same ID is used for chips in different families).
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The option @option{-family} @var{name} is one of @var{cycloneiii cycloneiv cyclonev cyclone10 arriaii}.
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As input file format the driver supports a '.rbf' (raw bitstream file) file. The '.rbf' file can be generated
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from a '.sof' file with @verb{|quartus_cpf -c blinker.sof blinker.rbf|}
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@ -760,8 +760,9 @@ static const struct command_registration jtag_subcommand_handlers[] = {
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.mode = COMMAND_EXEC,
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.handler = handle_jtag_configure,
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.help = "Return any Tcl handler for the specified "
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"TAP event.",
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.usage = "tap_name '-event' event_name",
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"TAP event or the value of the IDCODE found in hardware.",
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.usage = "tap_name '-event' event_name | "
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"tap_name '-idcode'",
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},
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{
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.name = "names",
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142
src/pld/intel.c
142
src/pld/intel.c
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@ -37,144 +37,13 @@ struct intel_pld_device {
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enum intel_family_e family;
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};
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struct intel_device_parameters_elem {
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uint32_t id;
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unsigned int boundary_scan_length;
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int checkpos;
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enum intel_family_e family;
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};
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static const struct intel_device_parameters_elem intel_device_parameters[] = {
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{0x020f10dd, 603, 226, INTEL_CYCLONEIII}, /* EP3C5 EP3C10 */
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{0x020f20dd, 1080, 409, INTEL_CYCLONEIII}, /* EP3C16 */
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{0x020f30dd, 732, 286, INTEL_CYCLONEIII}, /* EP3C25 */
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{0x020f40dd, 1632, 604, INTEL_CYCLONEIII}, /* EP3C40 */
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{0x020f50dd, 1164, 442, INTEL_CYCLONEIII}, /* EP3C55 */
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{0x020f60dd, 1314, 502, INTEL_CYCLONEIII}, /* EP3C80 */
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{0x020f70dd, 1620, 613, INTEL_CYCLONEIII}, /* EP3C120*/
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{0x027010dd, 1314, 226, INTEL_CYCLONEIII}, /* EP3CLS70 */
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{0x027000dd, 1314, 226, INTEL_CYCLONEIII}, /* EP3CLS100 */
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{0x027030dd, 1314, 409, INTEL_CYCLONEIII}, /* EP3CLS150 */
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{0x027020dd, 1314, 409, INTEL_CYCLONEIII}, /* EP3CLS200 */
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{0x020f10dd, 603, 226, INTEL_CYCLONEIV}, /* EP4CE6 EP4CE10 */
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{0x020f20dd, 1080, 409, INTEL_CYCLONEIV}, /* EP4CE15 */
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{0x020f30dd, 732, 286, INTEL_CYCLONEIV}, /* EP4CE22 */
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{0x020f40dd, 1632, 604, INTEL_CYCLONEIV}, /* EP4CE30 EP4CE40 */
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{0x020f50dd, 1164, 442, INTEL_CYCLONEIV}, /* EP4CE55 */
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{0x020f60dd, 1314, 502, INTEL_CYCLONEIV}, /* EP4CE75 */
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{0x020f70dd, 1620, 613, INTEL_CYCLONEIV}, /* EP4CE115 */
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{0x028010dd, 260, 229, INTEL_CYCLONEIV}, /* EP4CGX15 */
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{0x028120dd, 494, 463, INTEL_CYCLONEIV}, /* EP4CGX22 */
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{0x028020dd, 494, 463, INTEL_CYCLONEIV}, /* EP4CGX30 */
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{0x028230dd, 1006, 943, INTEL_CYCLONEIV}, /* EP4CGX30 */
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{0x028130dd, 1006, 943, INTEL_CYCLONEIV}, /* EP4CGX50 */
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{0x028030dd, 1006, 943, INTEL_CYCLONEIV}, /* EP4CGX75 */
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{0x028140dd, 1495, 1438, INTEL_CYCLONEIV}, /* EP4CGX110 */
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{0x028040dd, 1495, 1438, INTEL_CYCLONEIV}, /* EP4CGX150 */
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{0x02b150dd, 864, 163, INTEL_CYCLONEV}, /* 5CEBA2F23 5CEBA2F17 5CEFA2M13 5CEFA2F23 5CEBA2U15 5CEFA2U19 5CEBA2U19 */
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{0x02d020dd, 1485, 19, INTEL_CYCLONEV}, /* 5CSXFC6D6F31 5CSTFD6D5F31 5CSEBA6U23 5CSEMA6U23 5CSEBA6U19 5CSEBA6U23
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5CSEBA6U19 5CSEMA6F31 5CSXFC6C6U23 */
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{0x02b040dd, 1728, -1, INTEL_CYCLONEV}, /* 5CGXFC9EF35 5CGXBC9AU19 5CGXBC9CF23 5CGTFD9CF23 5CGXFC9AU19 5CGXFC9CF23
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5CGXFC9EF31 5CGXFC9DF27 5CGXBC9DF27 5CGXBC9EF31 5CGTFD9EF31 5CGTFD9EF35
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5CGTFD9AU19 5CGXBC9EF35 5CGTFD9DF27 */
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{0x02b050dd, 864, 163, INTEL_CYCLONEV}, /* 5CEFA4U19 5CEFA4F23 5CEFA4M13 5CEBA4F17 5CEBA4U15 5CEBA4U19 5CEBA4F23 */
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{0x02b030dd, 1488, 19, INTEL_CYCLONEV}, /* 5CGXBC7CU19 5CGTFD7CU19 5CGTFD7DF27 5CGXFC7BM15 5CGXFC7DF27 5CGXFC7DF31
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5CGTFD7CF23 5CGXBC7CF23 5CGXBC7DF31 5CGTFD7BM15 5CGXFC7CU19 5CGTFD7DF31
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5CGXBC7BM15 5CGXFC7CF23 5CGXBC7DF27 */
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{0x02d120dd, 1485, -1, INTEL_CYCLONEV}, /* 5CSEBA5U23 5CSEBA5U23 5CSTFD5D5F31 5CSEBA5U19 5CSXFC5D6F31 5CSEMA5U23
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5CSEMA5F31 5CSXFC5C6U23 5CSEBA5U19 */
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{0x02b220dd, 1104, 19, INTEL_CYCLONEV}, /* 5CEBA5U19 5CEFA5U19 5CEFA5M13 5CEBA5F23 5CEFA5F23 */
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{0x02b020dd, 1104, 19, INTEL_CYCLONEV}, /* 5CGXBC5CU19 5CGXFC5F6M11 5CGXFC5CM13 5CGTFD5CF23 5CGXBC5CF23 5CGTFD5CF27
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5CGTFD5F5M11 5CGXFC5CF27 5CGXFC5CU19 5CGTFD5CM13 5CGXFC5CF23 5CGXBC5CF27
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5CGTFD5CU19 */
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{0x02d010dd, 1197, -1, INTEL_CYCLONEV}, /* 5CSEBA4U23 5CSXFC4C6U23 5CSEMA4U23 5CSEBA4U23 5CSEBA4U19 5CSEBA4U19
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5CSXFC2C6U23 */
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{0x02b120dd, 1104, 19, INTEL_CYCLONEV}, /* 5CGXFC4CM13 5CGXFC4CU19 5CGXFC4F6M11 5CGXBC4CU19 5CGXFC4CF27 5CGXBC4CF23
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5CGXBC4CF27 5CGXFC4CF23 */
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{0x02b140dd, 1728, -1, INTEL_CYCLONEV}, /* 5CEFA9F31 5CEBA9F31 5CEFA9F27 5CEBA9U19 5CEBA9F27 5CEFA9U19 5CEBA9F23
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5CEFA9F23 */
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{0x02b010dd, 720, 19, INTEL_CYCLONEV}, /* 5CGXFC3U15 5CGXBC3U15 5CGXFC3F23 5CGXFC3U19 5CGXBC3U19 5CGXBC3F23 */
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{0x02b130dd, 1488, 19, INTEL_CYCLONEV}, /* 5CEFA7F31 5CEBA7F27 5CEBA7M15 5CEFA7U19 5CEBA7F23 5CEFA7F23 5CEFA7F27
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5CEFA7M15 5CEBA7U19 5CEBA7F31 */
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{0x02d110dd, 1197, -1, INTEL_CYCLONEV}, /* 5CSEBA2U23 5CSEMA2U23 5CSEBA2U23 5CSEBA2U19 5CSEBA2U19 */
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{0x020f10dd, 603, 226, INTEL_CYCLONE10}, /* 10CL006E144 10CL006U256 10CL010M164 10CL010U256 10CL010E144 */
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{0x020f20dd, 1080, 409, INTEL_CYCLONE10}, /* 10CL016U256 10CL016E144 10CL016U484 10CL016F484 10CL016M164 */
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{0x020f30dd, 732, 286, INTEL_CYCLONE10}, /* 10CL025U256 10CL025E144 */
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{0x020f40dd, 1632, 604, INTEL_CYCLONE10}, /* 10CL040F484 10CL040U484 */
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{0x020f50dd, 1164, 442, INTEL_CYCLONE10}, /* 10CL055F484 10CL055U484 */
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{0x020f60dd, 1314, 502, INTEL_CYCLONE10}, /* 10CL080F484 10CL080F780 10CL080U484 */
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{0x020f70dd, 1620, 613, INTEL_CYCLONE10}, /* 10CL120F484 10CL120F780 */
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{0x02e120dd, 1339, -1, INTEL_CYCLONE10}, /* 10CX085U484 10CX085F672 */
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{0x02e320dd, 1339, -1, INTEL_CYCLONE10}, /* 10CX105F780 10CX105U484 10CX105F672 */
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{0x02e720dd, 1339, -1, INTEL_CYCLONE10}, /* 10CX150F672 10CX150F780 10CX150U484 */
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{0x02ef20dd, 1339, -1, INTEL_CYCLONE10}, /* 10CX220F672 10CX220F780 10CX220U484 */
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{0x025120dd, 1227, 1174, INTEL_ARRIAII}, /* EP2AGX45 */
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{0x025020dd, 1227, -1, INTEL_ARRIAII}, /* EP2AGX65 */
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{0x025130dd, 1467, -1, INTEL_ARRIAII}, /* EP2AGX95 */
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{0x025030dd, 1467, -1, INTEL_ARRIAII}, /* EP2AGX125 */
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{0x025140dd, 1971, -1, INTEL_ARRIAII}, /* EP2AGX190 */
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{0x025040dd, 1971, -1, INTEL_ARRIAII}, /* EP2AGX260 */
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{0x024810dd, 2274, -1, INTEL_ARRIAII}, /* EP2AGZ225 */
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{0x0240a0dd, 2682, -1, INTEL_ARRIAII}, /* EP2AGZ300 */
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{0x024820dd, 2682, -1, INTEL_ARRIAII}, /* EP2AGZ350 */
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};
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static int intel_fill_device_parameters(struct intel_pld_device *intel_info)
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{
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for (size_t i = 0; i < ARRAY_SIZE(intel_device_parameters); ++i) {
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if (intel_device_parameters[i].id == intel_info->tap->idcode &&
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intel_info->family == intel_device_parameters[i].family) {
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if (intel_info->boundary_scan_length == 0)
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intel_info->boundary_scan_length = intel_device_parameters[i].boundary_scan_length;
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if (intel_info->checkpos == -1)
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intel_info->checkpos = intel_device_parameters[i].checkpos;
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return ERROR_OK;
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}
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}
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return ERROR_FAIL;
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}
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static int intel_check_for_unique_id(struct intel_pld_device *intel_info)
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{
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int found = 0;
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for (size_t i = 0; i < ARRAY_SIZE(intel_device_parameters); ++i) {
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if (intel_device_parameters[i].id == intel_info->tap->idcode) {
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++found;
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intel_info->family = intel_device_parameters[i].family;
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}
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}
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return (found == 1) ? ERROR_OK : ERROR_FAIL;
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}
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static int intel_check_config(struct intel_pld_device *intel_info)
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{
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if (!intel_info->tap->has_idcode) {
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LOG_ERROR("no IDCODE");
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if (intel_info->boundary_scan_length == 0) {
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LOG_ERROR("unknown boundary scan length. Please specify with 'intel set_bscan'.");
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return ERROR_FAIL;
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}
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if (intel_info->family == INTEL_UNKNOWN) {
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if (intel_check_for_unique_id(intel_info) != ERROR_OK) {
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LOG_ERROR("id is ambiguous, please specify family");
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return ERROR_FAIL;
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}
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}
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if (intel_info->boundary_scan_length == 0 || intel_info->checkpos == -1) {
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int ret = intel_fill_device_parameters(intel_info);
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if (ret != ERROR_OK)
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return ret;
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}
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if (intel_info->checkpos >= 0 && (unsigned int)intel_info->checkpos >= intel_info->boundary_scan_length) {
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LOG_ERROR("checkpos has to be smaller than scan length %d < %u",
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intel_info->checkpos, intel_info->boundary_scan_length);
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@ -305,6 +174,8 @@ static int intel_load(struct pld_device *pld_device, const char *filename)
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LOG_ERROR("Check failed");
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return ERROR_FAIL;
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}
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} else {
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LOG_INFO("unable to check. Please specify with position 'intel set_check_pos'.");
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}
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retval = intel_set_instr(tap, 0x003);
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@ -417,7 +288,7 @@ COMMAND_HANDLER(intel_set_check_pos_command_handler)
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PLD_CREATE_COMMAND_HANDLER(intel_pld_create_command)
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{
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if (CMD_ARGC != 4 && CMD_ARGC != 6)
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if (CMD_ARGC != 6)
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return ERROR_COMMAND_SYNTAX_ERROR;
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if (strcmp(CMD_ARGV[2], "-chain-position") != 0)
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@ -430,7 +301,7 @@ PLD_CREATE_COMMAND_HANDLER(intel_pld_create_command)
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}
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enum intel_family_e family = INTEL_UNKNOWN;
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if (CMD_ARGC == 6) {
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if (strcmp(CMD_ARGV[4], "-family") != 0)
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return ERROR_COMMAND_SYNTAX_ERROR;
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@ -448,7 +319,6 @@ PLD_CREATE_COMMAND_HANDLER(intel_pld_create_command)
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command_print(CMD, "unknown family");
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return ERROR_FAIL;
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}
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}
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struct intel_pld_device *intel_info = malloc(sizeof(struct intel_pld_device));
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if (!intel_info) {
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@ -21,11 +21,26 @@ if { [info exists CHIPNAME] } {
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set _CHIPNAME arriaii
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}
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jtag newtap $_CHIPNAME tap -irlen 10 \
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-expected-id 0x025120dd -expected-id 0x025040dd \
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-expected-id 0x025020dd -expected-id 0x024810dd \
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-expected-id 0x025130dd -expected-id 0x0240a0dd \
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-expected-id 0x025030dd -expected-id 0x024820dd \
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-expected-id 0x025140dd
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array set _ARRIA_2_DATA {
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0x025120dd {1227 1174 EP2AGX45}
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0x025020dd {1227 -1 EP2AGX65}
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0x025130dd {1467 -1 EP2AGX95}
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0x025030dd {1467 -1 EP2AGX125}
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0x025140dd {1971 -1 EP2AGX190}
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0x025040dd {1971 -1 EP2AGX260}
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0x024810dd {2274 -1 EP2AGZ225}
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0x0240a0dd {2682 -1 EP2AGZ300}
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0x024820dd {2682 -1 EP2AGZ350}
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}
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set jtag_newtap_cmd {jtag newtap $_CHIPNAME tap -irlen 10 -ignore-version}
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foreach id [array names _ARRIA_2_DATA] {
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set cmd [concat "-expected-id" id]
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}
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eval $jtag_newtap_cmd
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source [find fpga/altera_common_init.cfg]
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pld create $_CHIPNAME.pld intel -chain-position $_CHIPNAME.tap -family arriaii
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jtag configure $_CHIPNAME.tap -event setup "set_bscan_checkpos_on_setup $_CHIPNAME {$_ARRIA_2_DATA}"
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@ -4,31 +4,33 @@
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# see: https://www.intel.com/content/www/us/en/docs/programmable/683777/current/bst-operation-control.html
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# and: https://www.intel.cn/content/dam/support/us/en/programmable/kdb/pdfs/literature/hb/cyclone-10/c10gx-51003.pdf
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# GX085: 0x02e120dd
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# GX105: 0x02e320dd
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# GX150: 0x02e720dd
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# GX220: 0x02ef20dd
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# 10cl006: 0x020f10dd
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# 10cl010: 0x020f10dd
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# 10cl016: 0x020f20dd
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# 10cl025: 0x020f30dd
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# 10cl040: 0x020f40dd
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# 10cl055: 0x020f50dd
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# 10cl080: 0x020f60dd
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# 10cl120: 0x020f70dd
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME cyclone10
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}
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jtag newtap $_CHIPNAME tap -irlen 10 \
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-expected-id 0x02e720dd -expected-id 0x02e120dd \
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-expected-id 0x02ef20dd -expected-id 0x02e320dd \
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-expected-id 0x020f10dd -expected-id 0x020f20dd \
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-expected-id 0x020f30dd -expected-id 0x020f40dd \
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-expected-id 0x020f50dd -expected-id 0x020f60dd \
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-expected-id 0x020f70dd
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array set _CYCLONE_10_DATA {
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0x020f10dd { 603 226 10cl006_10cl010}
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0x020f20dd {1080 409 10cl016}
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0x020f30dd { 732 286 10cl025}
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0x020f40dd {1632 604 10cl040}
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0x020f50dd {1164 442 10cl055}
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0x020f60dd {1314 502 10cl080}
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0x020f70dd {1620 613 10cl120}
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0x02e120dd {1339 -1 GX085}
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0x02e320dd {1339 -1 GX105}
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0x02e720dd {1339 -1 GX150}
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0x02ef20dd {1339 -1 GX220}
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}
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pld device intel $_CHIPNAME.tap cyclone10
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set jtag_newtap_cmd {jtag newtap $_CHIPNAME tap -irlen 10 -ignore-version}
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foreach id [array names _CYCLONE_10_DATA] {
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set cmd [concat "-expected-id" id]
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}
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eval $jtag_newtap_cmd
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source [find fpga/altera_common_init.cfg]
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pld create $_CHIPNAME.pld intel -chain-position $_CHIPNAME.tap -family cyclone10
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jtag configure $_CHIPNAME.tap -event setup "set_bscan_checkpos_on_setup $_CHIPNAME {$_CYCLONE_10_DATA}"
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@ -4,32 +4,33 @@
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# see Cyclone III Device Handbook
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# Table 12-2: Device IDCODE for Cyclone III Device Family
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#EP3C5 0x020f10dd
|
||||
#EP3C10 0x020f10dd
|
||||
#EP3C16 0x020f20dd
|
||||
#EP3C25 0x020f30dd
|
||||
#EP3C40 0x020f40dd
|
||||
#EP3C55 0x020f50dd
|
||||
#EP3C80 0x020f60dd
|
||||
#EP3C120 0x020f70dd
|
||||
#Cyclone III LS
|
||||
#EP3CLS70 0x027010dd
|
||||
#EP3CLS100 0x027000dd
|
||||
#EP3CLS150 0x027030dd
|
||||
#EP3CLS200 0x027020dd
|
||||
|
||||
if { [info exists CHIPNAME] } {
|
||||
set _CHIPNAME $CHIPNAME
|
||||
} else {
|
||||
set _CHIPNAME cycloneiii
|
||||
}
|
||||
|
||||
jtag newtap $_CHIPNAME tap -irlen 10 \
|
||||
-expected-id 0x020f10dd -expected-id 0x020f20dd \
|
||||
-expected-id 0x020f30dd -expected-id 0x020f40dd \
|
||||
-expected-id 0x020f50dd -expected-id 0x020f60dd \
|
||||
-expected-id 0x020f70dd -expected-id 0x027010dd \
|
||||
-expected-id 0x027000dd -expected-id 0x027030dd \
|
||||
-expected-id 0x027020dd
|
||||
array set _CYCLONE_3_DATA {
|
||||
0x020f10dd { 603 226 EP3C5_EP3C10}
|
||||
0x020f20dd {1080 409 EP3C16}
|
||||
0x020f30dd { 732 286 EP3C25}
|
||||
0x020f40dd {1632 604 EP3C40}
|
||||
0x020f50dd {1164 442 EP3C55}
|
||||
0x020f60dd {1314 502 EP3C80}
|
||||
0x020f70dd {1620 613 EP3C120}
|
||||
0x027010dd {1314 226 EP3CLS70}
|
||||
0x027000dd {1314 226 EP3CLS100}
|
||||
0x027030dd {1314 409 EP3CLS150}
|
||||
0x027020dd {1314 409 EP3CLS200}
|
||||
}
|
||||
|
||||
set jtag_newtap_cmd {jtag newtap $_CHIPNAME tap -irlen 10 -ignore-version}
|
||||
foreach id [array names _CYCLONE_3_DATA] {
|
||||
set cmd [concat "-expected-id" id]
|
||||
}
|
||||
eval $jtag_newtap_cmd
|
||||
|
||||
source [find fpga/altera_common_init.cfg]
|
||||
|
||||
pld create $_CHIPNAME.pld intel -chain-position $_CHIPNAME.tap -family cycloneiii
|
||||
jtag configure $_CHIPNAME.tap -event setup "set_bscan_checkpos_on_setup $_CHIPNAME {$_CYCLONE_3_DATA}"
|
||||
|
|
|
|||
|
|
@ -4,38 +4,37 @@
|
|||
# see Cyclone IV Device Handbook
|
||||
# Table 10-2: IDCODE Information for 32-Bit Cyclone IV Devices
|
||||
|
||||
#EP4CE6 0x020f10dd
|
||||
#EP4CE10 0x020f10dd
|
||||
#EP4CE15 0x020f20dd
|
||||
#EP4CE22 0x020f30dd
|
||||
#EP4CE30 0x020f40dd
|
||||
#EP4CE40 0x020f40dd
|
||||
#EP4CE55 0x020f50dd
|
||||
#EP4CE75 0x020f60dd
|
||||
#EP4CE115 0x020f70dd
|
||||
#EP4CGX15 0x028010dd
|
||||
#EP4CGX22 0x028120dd
|
||||
#EP4CGX30 (3) 0x028020dd
|
||||
#EP4CGX30 (4) 0x028230dd
|
||||
#EP4CGX50 0x028130dd
|
||||
#EP4CGX75 0x028030dd
|
||||
#EP4CGX110 0x028140dd
|
||||
#EP4CGX150 0x028040dd
|
||||
|
||||
if { [info exists CHIPNAME] } {
|
||||
set _CHIPNAME $CHIPNAME
|
||||
} else {
|
||||
set _CHIPNAME cycloneiv
|
||||
}
|
||||
|
||||
jtag newtap $_CHIPNAME tap -irlen 10 \
|
||||
-expected-id 0x020f10dd -expected-id 0x020f20dd \
|
||||
-expected-id 0x020f30dd -expected-id 0x020f40dd \
|
||||
-expected-id 0x020f50dd -expected-id 0x020f60dd \
|
||||
-expected-id 0x020f70dd -expected-id 0x028010dd \
|
||||
-expected-id 0x028120dd -expected-id 0x028020dd \
|
||||
-expected-id 0x028230dd -expected-id 0x028130dd \
|
||||
-expected-id 0x028030dd -expected-id 0x028140dd \
|
||||
-expected-id 0x028040dd
|
||||
array set _CYCLON_4_DATA {
|
||||
0x020f10dd { 603 226 EP4CE6_EP4CE10}
|
||||
0x020f20dd {1080 409 EP4CE15}
|
||||
0x020f30dd { 732 286 EP4CE22}
|
||||
0x020f40dd {1632 604 EP4CE30_EP4CE40}
|
||||
0x020f50dd {1164 442 EP4CE55}
|
||||
0x020f60dd {1314 502 EP4CE75}
|
||||
0x020f70dd {1620 613 EP4CE115}
|
||||
0x028010dd { 260 229 EP4CGX15}
|
||||
0x028120dd { 494 463 EP4CGX22}
|
||||
0x028020dd { 494 463 EP4CGX30}
|
||||
0x028230dd {1006 943 EP4CGX30}
|
||||
0x028130dd {1006 943 EP4CGX50}
|
||||
0x028030dd {1006 943 EP4CGX75}
|
||||
0x028140dd {1495 1438 EP4CGX110}
|
||||
0x028040dd {1495 1438 EP4CGX150}
|
||||
}
|
||||
|
||||
set jtag_newtap_cmd {jtag newtap $_CHIPNAME tap -irlen 10 -ignore-version}
|
||||
foreach id [array names _CYCLON_4_DATA] {
|
||||
set cmd [concat "-expected-id" id]
|
||||
}
|
||||
eval $jtag_newtap_cmd
|
||||
|
||||
source [find fpga/altera_common_init.cfg]
|
||||
|
||||
pld create $_CHIPNAME.pld intel -chain-position $_CHIPNAME.tap -family cycloneiv
|
||||
jtag configure $_CHIPNAME.tap -event setup "set_bscan_checkpos_on_setup $_CHIPNAME {$_CYCLONE_4_DATA}"
|
||||
|
|
|
|||
|
|
@ -4,44 +4,36 @@
|
|||
# see Cyclone V Device Handbook
|
||||
# Table 9-1: IDCODE Information for Cyclone V Devices
|
||||
|
||||
#5CEA2 0x02b150dd
|
||||
#5CEA4 0x02b050dd
|
||||
#5CEA5 0x02b220dd
|
||||
#5CEA7 0x02b130dd
|
||||
#5CEA9 0x02b140dd
|
||||
#5CGXC3 0x02b010dd
|
||||
#5CGXC4 0x02b120dd
|
||||
#5CGXC5 0x02b020dd
|
||||
#5CGXC7 0x02b030dd
|
||||
#5CGXC9 0x02b040dd
|
||||
#5CGTD5 0x02b020dd
|
||||
#5CGTD7 0x02b030dd
|
||||
#5CGTD9 0x02b040dd
|
||||
#5CSEA2 0x02d110dd
|
||||
#5CSEA4 0x02d010dd
|
||||
#5CSEA5 0x02d120dd
|
||||
#5CSEA6 0x02d020dd
|
||||
#5CSXC2 0x02d110dd
|
||||
#5CSXC4 0x02d010dd
|
||||
#5CSXC5 0x02d120dd
|
||||
#5CSXC6 0x02d020dd
|
||||
#5CSTD5 0x02d120dd
|
||||
#5CSTD6 0x02d020dd
|
||||
|
||||
|
||||
if { [info exists CHIPNAME] } {
|
||||
set _CHIPNAME $CHIPNAME
|
||||
} else {
|
||||
set _CHIPNAME cyclonev
|
||||
}
|
||||
|
||||
jtag newtap $_CHIPNAME tap -irlen 10 \
|
||||
-expected-id 0x02b150dd -expected-id 0x02b050dd \
|
||||
-expected-id 0x02b220dd -expected-id 0x02b130dd \
|
||||
-expected-id 0x02b140dd -expected-id 0x02b010dd \
|
||||
-expected-id 0x02b120dd -expected-id 0x02b020dd \
|
||||
-expected-id 0x02b030dd -expected-id 0x02b040dd \
|
||||
-expected-id 0x02d110dd -expected-id 0x02d010dd \
|
||||
-expected-id 0x02d120dd -expected-id 0x02d020dd
|
||||
array set _CYCLONE_5_DATA {
|
||||
0x02b150dd { 864 163 5CEA2}
|
||||
0x02d020dd {1485 19 5CSEA6_5CSXC6_5CSTD6}
|
||||
0x02b040dd {1728 -1 5CGXC9_5CGTD9}
|
||||
0x02b050dd { 864 163 5CEA4}
|
||||
0x02b030dd {1488 19 5CGXC7_5CGTD7}
|
||||
0x02d120dd {1485 -1 5CSEA5_5CSXC5_5CSTD5}
|
||||
0x02b220dd {1104 19 5CEA5}
|
||||
0x02b020dd {1104 19 5CGXC5_5CGTD5}
|
||||
0x02d010dd {1197 -1 5CSEA4_5CSXC4}
|
||||
0x02b120dd {1104 19 5CGXC4}
|
||||
0x02b140dd {1728 -1 5CEA9}
|
||||
0x02b010dd { 720 19 5CGXC3}
|
||||
0x02b130dd {1488 19 5CEA7}
|
||||
0x02d110dd {1197 -1 5CSEA2_5CSXC2}
|
||||
}
|
||||
|
||||
set jtag_newtap_cmd {jtag newtap $_CHIPNAME tap -irlen 10 -ignore-version}
|
||||
foreach id [array names _CYCLONE_5_DATA] {
|
||||
set cmd [concat "-expected-id" id]
|
||||
}
|
||||
eval $jtag_newtap_cmd
|
||||
|
||||
source [find fpga/altera_common_init.cfg]
|
||||
|
||||
pld create $_CHIPNAME.pld intel -chain-position $_CHIPNAME.tap -family cyclonev
|
||||
jtag configure $_CHIPNAME.tap -event setup "set_bscan_checkpos_on_setup $_CHIPNAME {$_CYCLONE_5_DATA}"
|
||||
|
|
|
|||
|
|
@ -0,0 +1,9 @@
|
|||
# SPDX-License-Identifier: GPL-2.0-or-later
|
||||
|
||||
proc set_bscan_checkpos_on_setup {chipname data} {
|
||||
set tapid_w_version [jtag cget $chipname.tap -idcode]
|
||||
set version_mask 0x0fffffff
|
||||
set tapid [format 0x%08x [expr {$tapid_w_version & $version_mask}]]
|
||||
intel set_bscan $chipname.pld [lindex $data($tapid) 0]
|
||||
intel set_check_pos $chipname.pld [lindex $data($tapid) 1]
|
||||
}
|
||||
Loading…
Reference in New Issue