fm3: fix Fujitsu MB9Ax family support
Some MB9Ax (especially few internal SRAM model) fails programming because of wrong SRAM basic-address on running algorithm. Default SRAM basic-address must be 0x20000000. This patch is fixing default SRAM basic-address and ramcode offset. Tested on a MB9BF618T and MB9AF112K. Change-Id: Ibda9aceb4c317bcae0dcce9f6d0fd1c4b5d81952 Signed-off-by: Nemui Trinomius <nemuisan_kawausogasuki@live.jp> Reviewed-on: http://openocd.zylin.com/1793 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
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@ -450,10 +450,11 @@ static int fm3_write_block(struct flash_bank *bank, uint8_t *buffer,
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0x00, 0xBE, /* BKPT #0 */
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0x00, 0xBE, /* BKPT #0 */
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/* The following address pointers assume, that the code is running from */
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/* The following address pointers assume, that the code is running from */
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/* SRAM basic-address(BASE_ADDR)+8.These address pointers will be patched */
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/* SRAM basic-address + 8.These address pointers will be patched, if a */
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/* if a different start address in RAM is used (e.g. for Flash type 2)! */
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/* different start address in RAM is used (e.g. for Flash type 2)! */
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0x00, 0x80, 0xFF, 0x1F, /* u32DummyRead address in RAM (BASE_ADDR) */
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/* Default SRAM basic-address is 0x20000000. */
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0x04, 0x80, 0xFF, 0x1F /* u32FlashResult address in RAM (BASE_ADDR+4)*/
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0x00, 0x00, 0x00, 0x20, /* u32DummyRead address in RAM (0x20000000) */
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0x04, 0x00, 0x00, 0x20 /* u32FlashResult address in RAM (0x20000004) */
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};
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};
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LOG_INFO("Fujitsu MB9[A/B]FXXX: FLASH Write ...");
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LOG_INFO("Fujitsu MB9[A/B]FXXX: FLASH Write ...");
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@ -479,18 +480,32 @@ static int fm3_write_block(struct flash_bank *bank, uint8_t *buffer,
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return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
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return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
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}
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}
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/* allocate working area with flash programming code */
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/* allocate working area and variables with flash programming code */
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if (target_alloc_working_area(target, sizeof(fm3_flash_write_code),
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if (target_alloc_working_area(target, sizeof(fm3_flash_write_code) + 8,
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&write_algorithm) != ERROR_OK) {
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&write_algorithm) != ERROR_OK) {
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LOG_WARNING("no working area available, can't do block memory writes");
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LOG_WARNING("no working area available, can't do block memory writes");
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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}
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}
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retval = target_write_buffer(target, write_algorithm->address,
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retval = target_write_buffer(target, write_algorithm->address + 8,
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sizeof(fm3_flash_write_code), fm3_flash_write_code);
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sizeof(fm3_flash_write_code), fm3_flash_write_code);
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if (retval != ERROR_OK)
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if (retval != ERROR_OK)
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return retval;
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return retval;
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/* Patching 'local variable address' */
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/* Algorithm: u32DummyRead: */
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retval = target_write_u32(target, (write_algorithm->address + 8)
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+ sizeof(fm3_flash_write_code) - 8, (write_algorithm->address));
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if (retval != ERROR_OK)
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return retval;
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/* Algorithm: u32FlashResult: */
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retval = target_write_u32(target, (write_algorithm->address + 8)
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+ sizeof(fm3_flash_write_code) - 4, (write_algorithm->address) + 4);
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if (retval != ERROR_OK)
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return retval;
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/* memory buffer */
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/* memory buffer */
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while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK) {
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while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK) {
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buffer_size /= 2;
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buffer_size /= 2;
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@ -518,26 +533,6 @@ static int fm3_write_block(struct flash_bank *bank, uint8_t *buffer,
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while (count > 0) {
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while (count > 0) {
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uint32_t thisrun_count = (count > (buffer_size / 2)) ? (buffer_size / 2) : count;
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uint32_t thisrun_count = (count > (buffer_size / 2)) ? (buffer_size / 2) : count;
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retval = target_write_buffer(target, write_algorithm->address, 8,
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fm3_flash_write_code);
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if (retval != ERROR_OK)
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break;
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/* Patching 'local variable address' for different RAM addresses */
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if (write_algorithm->address != (target->working_area_phys + 8)) {
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/* Algorithm: u32DummyRead: */
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retval = target_write_u32(target, (write_algorithm->address)
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+ sizeof(fm3_flash_write_code) - 8, (write_algorithm->address) - 8);
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if (retval != ERROR_OK)
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break;
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/* Algorithm: u32FlashResult: */
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retval = target_write_u32(target, (write_algorithm->address)
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+ sizeof(fm3_flash_write_code) - 4, (write_algorithm->address) - 4);
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if (retval != ERROR_OK)
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break;
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}
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retval = target_write_buffer(target, source->address, thisrun_count * 2, buffer);
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retval = target_write_buffer(target, source->address, thisrun_count * 2, buffer);
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if (retval != ERROR_OK)
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if (retval != ERROR_OK)
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break;
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break;
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@ -549,7 +544,7 @@ static int fm3_write_block(struct flash_bank *bank, uint8_t *buffer,
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buf_set_u32(reg_params[4].value, 0, 32, u32FlashSeqAddress2);
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buf_set_u32(reg_params[4].value, 0, 32, u32FlashSeqAddress2);
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retval = target_run_algorithm(target, 0, NULL, 6, reg_params,
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retval = target_run_algorithm(target, 0, NULL, 6, reg_params,
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write_algorithm->address, 0, 1000, &armv7m_info);
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(write_algorithm->address + 8), 0, 1000, &armv7m_info);
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if (retval != ERROR_OK) {
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if (retval != ERROR_OK) {
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LOG_ERROR("Error executing fm3 Flash programming algorithm");
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LOG_ERROR("Error executing fm3 Flash programming algorithm");
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retval = ERROR_FLASH_OPERATION_FAILED;
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retval = ERROR_FLASH_OPERATION_FAILED;
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@ -791,9 +786,7 @@ static int fm3_chip_erase(struct flash_bank *bank)
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return ERROR_TARGET_NOT_HALTED;
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return ERROR_TARGET_NOT_HALTED;
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}
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}
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LOG_INFO("Fujitsu MB9[AB]xxx: Chip Erase ... (may take several seconds)");
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LOG_INFO("Fujitsu MB9[A/B]xxx: Chip Erase ... (may take several seconds)");
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/* Implement Flash chip erase (mass erase) completely on host */
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/* FASZR = 0x01, Enables CPU Programming Mode (16-bit Flash access) */
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/* FASZR = 0x01, Enables CPU Programming Mode (16-bit Flash access) */
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retval = target_write_u32(target, 0x40000000, 0x0001);
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retval = target_write_u32(target, 0x40000000, 0x0001);
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