C99 printf() -Werror fixes
git-svn-id: svn://svn.berlios.de/openocd/trunk@2338 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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940703e16c
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@ -292,24 +292,45 @@ static int stellaris_info(struct flash_bank_s *bank, char *buf, int buf_size)
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{
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{
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device_class = 0;
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device_class = 0;
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}
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}
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printed = snprintf(buf, buf_size, "\nLMI Stellaris information: Chip is class %i(%s) %s v%c.%i\n",
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printed = snprintf(buf,
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device_class, StellarisClassname[device_class], stellaris_info->target_name,
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buf_size,
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'A' + ((stellaris_info->did0>>8) & 0xFF), (stellaris_info->did0) & 0xFF);
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"\nLMI Stellaris information: Chip is class %i(%s) %s v%c.%i\n",
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device_class,
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StellarisClassname[device_class],
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stellaris_info->target_name,
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(int)('A' + ((stellaris_info->did0>>8) & 0xFF)),
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(int)((stellaris_info->did0) & 0xFF));
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buf += printed;
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buf += printed;
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buf_size -= printed;
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buf_size -= printed;
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printed = snprintf(buf, buf_size, "did1: 0x%8.8x, arch: 0x%4.4x, eproc: %s, ramsize:%ik, flashsize: %ik\n",
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printed = snprintf(buf,
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stellaris_info->did1, stellaris_info->did1, "ARMV7M", (1+((stellaris_info->dc0>>16) & 0xFFFF))/4, (1+(stellaris_info->dc0 & 0xFFFF))*2);
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buf_size,
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"did1: 0x%8.8" PRIx32 ", arch: 0x%4.4" PRIx32 ", eproc: %s, ramsize:%ik, flashsize: %ik\n",
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stellaris_info->did1,
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stellaris_info->did1,
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"ARMV7M",
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(int)((1+((stellaris_info->dc0>>16) & 0xFFFF))/4),
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(int)((1+(stellaris_info->dc0 & 0xFFFF))*2));
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buf += printed;
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buf += printed;
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buf_size -= printed;
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buf_size -= printed;
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printed = snprintf(buf, buf_size, "master clock(estimated): %ikHz, rcc is 0x%x \n", stellaris_info->mck_freq / 1000, stellaris_info->rcc);
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printed = snprintf(buf,
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buf_size,
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"master clock(estimated): %ikHz, rcc is 0x%" PRIx32 " \n",
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(int)(stellaris_info->mck_freq / 1000),
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stellaris_info->rcc);
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buf += printed;
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buf += printed;
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buf_size -= printed;
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buf_size -= printed;
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if (stellaris_info->num_lockbits>0)
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if (stellaris_info->num_lockbits>0)
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{
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{
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printed = snprintf(buf, buf_size, "pagesize: %i, lockbits: %i 0x%4.4x, pages in lock region: %i \n", stellaris_info->pagesize, stellaris_info->num_lockbits, stellaris_info->lockbits,stellaris_info->num_pages/stellaris_info->num_lockbits);
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printed = snprintf(buf,
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buf_size,
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"pagesize: %" PRIi32 ", lockbits: %i 0x%4.4" PRIx32 ", pages in lock region: %i \n",
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stellaris_info->pagesize,
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stellaris_info->num_lockbits,
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stellaris_info->lockbits,
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(int)(stellaris_info->num_pages/stellaris_info->num_lockbits));
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buf += printed;
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buf += printed;
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buf_size -= printed;
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buf_size -= printed;
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}
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}
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@ -340,9 +361,9 @@ static void stellaris_read_clock_info(flash_bank_t *bank)
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unsigned long mainfreq;
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unsigned long mainfreq;
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target_read_u32(target, SCB_BASE|RCC, &rcc);
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target_read_u32(target, SCB_BASE|RCC, &rcc);
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LOG_DEBUG("Stellaris RCC %x", rcc);
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LOG_DEBUG("Stellaris RCC %" PRIx32 "", rcc);
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target_read_u32(target, SCB_BASE|PLLCFG, &pllcfg);
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target_read_u32(target, SCB_BASE|PLLCFG, &pllcfg);
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LOG_DEBUG("Stellaris PLLCFG %x", pllcfg);
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LOG_DEBUG("Stellaris PLLCFG %" PRIx32 "", pllcfg);
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stellaris_info->rcc = rcc;
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stellaris_info->rcc = rcc;
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sysdiv = (rcc>>23) & 0xF;
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sysdiv = (rcc>>23) & 0xF;
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@ -390,7 +411,7 @@ static void stellaris_set_flash_mode(flash_bank_t *bank,int mode)
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target_t *target = bank->target;
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target_t *target = bank->target;
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uint32_t usecrl = (stellaris_info->mck_freq/1000000ul-1);
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uint32_t usecrl = (stellaris_info->mck_freq/1000000ul-1);
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LOG_DEBUG("usecrl = %i",usecrl);
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LOG_DEBUG("usecrl = %i",(int)(usecrl));
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target_write_u32(target, SCB_BASE|USECRL, usecrl);
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target_write_u32(target, SCB_BASE|USECRL, usecrl);
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}
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}
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@ -443,7 +464,8 @@ static int stellaris_read_part_info(struct flash_bank_s *bank)
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target_read_u32(target, SCB_BASE|DID1, &did1);
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target_read_u32(target, SCB_BASE|DID1, &did1);
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target_read_u32(target, SCB_BASE|DC0, &stellaris_info->dc0);
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target_read_u32(target, SCB_BASE|DC0, &stellaris_info->dc0);
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target_read_u32(target, SCB_BASE|DC1, &stellaris_info->dc1);
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target_read_u32(target, SCB_BASE|DC1, &stellaris_info->dc1);
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LOG_DEBUG("did0 0x%x, did1 0x%x, dc0 0x%x, dc1 0x%x", did0, did1, stellaris_info->dc0, stellaris_info->dc1);
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LOG_DEBUG("did0 0x%" PRIx32 ", did1 0x%" PRIx32 ", dc0 0x%" PRIx32 ", dc1 0x%" PRIx32 "",
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did0, did1, stellaris_info->dc0, stellaris_info->dc1);
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ver = did0 >> 28;
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ver = did0 >> 28;
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if((ver != 0) && (ver != 1))
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if((ver != 0) && (ver != 1))
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@ -594,7 +616,7 @@ static int stellaris_erase(struct flash_bank_s *bank, int first, int last)
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target_read_u32(target, FLASH_CRIS, &flash_cris);
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target_read_u32(target, FLASH_CRIS, &flash_cris);
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if(flash_cris & (AMASK))
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if(flash_cris & (AMASK))
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{
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{
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LOG_WARNING("Error erasing flash page %i, flash_cris 0x%x", banknr, flash_cris);
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LOG_WARNING("Error erasing flash page %i, flash_cris 0x%" PRIx32 "", banknr, flash_cris);
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target_write_u32(target, FLASH_CRIS, 0);
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target_write_u32(target, FLASH_CRIS, 0);
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return ERROR_FLASH_OPERATION_FAILED;
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return ERROR_FLASH_OPERATION_FAILED;
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}
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}
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@ -652,7 +674,7 @@ static int stellaris_protect(struct flash_bank_s *bank, int set, int first, int
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target_write_u32(target, FLASH_CIM, 0);
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target_write_u32(target, FLASH_CIM, 0);
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target_write_u32(target, FLASH_MISC, PMISC|AMISC);
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target_write_u32(target, FLASH_MISC, PMISC|AMISC);
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LOG_DEBUG("fmppe 0x%x",fmppe);
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LOG_DEBUG("fmppe 0x%" PRIx32 "",fmppe);
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target_write_u32(target, SCB_BASE|FMPPE, fmppe);
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target_write_u32(target, SCB_BASE|FMPPE, fmppe);
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/* Commit FMPPE */
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/* Commit FMPPE */
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target_write_u32(target, FLASH_FMA, 1);
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target_write_u32(target, FLASH_FMA, 1);
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@ -671,7 +693,7 @@ static int stellaris_protect(struct flash_bank_s *bank, int set, int first, int
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target_read_u32(target, FLASH_CRIS, &flash_cris);
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target_read_u32(target, FLASH_CRIS, &flash_cris);
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if(flash_cris & (AMASK))
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if(flash_cris & (AMASK))
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{
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{
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LOG_WARNING("Error setting flash page protection, flash_cris 0x%x", flash_cris);
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LOG_WARNING("Error setting flash page protection, flash_cris 0x%" PRIx32 "", flash_cris);
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target_write_u32(target, FLASH_CRIS, 0);
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target_write_u32(target, FLASH_CRIS, 0);
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return ERROR_FLASH_OPERATION_FAILED;
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return ERROR_FLASH_OPERATION_FAILED;
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}
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}
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@ -732,7 +754,7 @@ static int stellaris_write_block(struct flash_bank_s *bank, uint8_t *buffer, uin
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armv7m_algorithm_t armv7m_info;
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armv7m_algorithm_t armv7m_info;
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int retval = ERROR_OK;
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int retval = ERROR_OK;
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LOG_DEBUG("(bank=%p buffer=%p offset=%08X wcount=%08X)",
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LOG_DEBUG("(bank=%p buffer=%p offset=%08" PRIx32 " wcount=%08" PRIx32 "",
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bank, buffer, offset, wcount);
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bank, buffer, offset, wcount);
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/* flash write code */
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/* flash write code */
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@ -747,7 +769,7 @@ static int stellaris_write_block(struct flash_bank_s *bank, uint8_t *buffer, uin
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/* memory buffer */
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/* memory buffer */
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while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK)
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while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK)
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{
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{
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LOG_DEBUG("called target_alloc_working_area(target=%p buffer_size=%08X source=%p)",
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LOG_DEBUG("called target_alloc_working_area(target=%p buffer_size=%08" PRIx32 " source=%p)",
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target, buffer_size, source);
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target, buffer_size, source);
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buffer_size /= 2;
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buffer_size /= 2;
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if (buffer_size <= 256)
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if (buffer_size <= 256)
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@ -777,8 +799,8 @@ static int stellaris_write_block(struct flash_bank_s *bank, uint8_t *buffer, uin
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buf_set_u32(reg_params[0].value, 0, 32, source->address);
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buf_set_u32(reg_params[0].value, 0, 32, source->address);
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buf_set_u32(reg_params[1].value, 0, 32, address);
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buf_set_u32(reg_params[1].value, 0, 32, address);
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buf_set_u32(reg_params[2].value, 0, 32, 4*thisrun_count);
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buf_set_u32(reg_params[2].value, 0, 32, 4*thisrun_count);
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LOG_INFO("Algorithm flash write %i words to 0x%x, %i remaining", thisrun_count, address, wcount);
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LOG_INFO("Algorithm flash write %" PRIi32 " words to 0x%" PRIx32 ", %" PRIi32 " remaining", thisrun_count, address, wcount);
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LOG_DEBUG("Algorithm flash write %i words to 0x%x, %i remaining", thisrun_count, address, wcount);
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LOG_DEBUG("Algorithm flash write %" PRIi32 " words to 0x%" PRIx32 ", %" PRIi32 " remaining", thisrun_count, address, wcount);
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if ((retval = target_run_algorithm(target, 0, NULL, 3, reg_params, write_algorithm->address, write_algorithm->address + sizeof(stellaris_write_code)-10, 10000, &armv7m_info)) != ERROR_OK)
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if ((retval = target_run_algorithm(target, 0, NULL, 3, reg_params, write_algorithm->address, write_algorithm->address + sizeof(stellaris_write_code)-10, 10000, &armv7m_info)) != ERROR_OK)
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{
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{
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LOG_ERROR("error executing stellaris flash write algorithm");
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LOG_ERROR("error executing stellaris flash write algorithm");
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@ -818,7 +840,7 @@ static int stellaris_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t
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return ERROR_TARGET_NOT_HALTED;
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return ERROR_TARGET_NOT_HALTED;
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}
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}
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LOG_DEBUG("(bank=%p buffer=%p offset=%08X count=%08X)",
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LOG_DEBUG("(bank=%p buffer=%p offset=%08" PRIx32 " count=%08" PRIx32 "",
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bank, buffer, offset, count);
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bank, buffer, offset, count);
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if (stellaris_info->did1 == 0)
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if (stellaris_info->did1 == 0)
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@ -866,7 +888,7 @@ static int stellaris_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t
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/* if an error occured, we examine the reason, and quit */
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/* if an error occured, we examine the reason, and quit */
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target_read_u32(target, FLASH_CRIS, &flash_cris);
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target_read_u32(target, FLASH_CRIS, &flash_cris);
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LOG_ERROR("flash writing failed with CRIS: 0x%x", flash_cris);
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LOG_ERROR("flash writing failed with CRIS: 0x%" PRIx32 "", flash_cris);
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return ERROR_FLASH_OPERATION_FAILED;
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return ERROR_FLASH_OPERATION_FAILED;
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}
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}
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}
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}
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@ -881,7 +903,7 @@ static int stellaris_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t
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while (words_remaining > 0)
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while (words_remaining > 0)
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{
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{
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if (!(address & 0xff))
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if (!(address & 0xff))
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LOG_DEBUG("0x%x", address);
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LOG_DEBUG("0x%" PRIx32 "", address);
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/* Program one word */
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/* Program one word */
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target_write_u32(target, FLASH_FMA, address);
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target_write_u32(target, FLASH_FMA, address);
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@ -912,7 +934,7 @@ static int stellaris_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t
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}
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}
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if (!(address & 0xff))
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if (!(address & 0xff))
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LOG_DEBUG("0x%x", address);
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LOG_DEBUG("0x%" PRIx32 "", address);
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/* Program one word */
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/* Program one word */
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target_write_u32(target, FLASH_FMA, address);
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target_write_u32(target, FLASH_FMA, address);
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@ -930,7 +952,7 @@ static int stellaris_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t
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target_read_u32(target, FLASH_CRIS, &flash_cris);
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target_read_u32(target, FLASH_CRIS, &flash_cris);
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if (flash_cris & (AMASK))
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if (flash_cris & (AMASK))
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{
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{
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LOG_DEBUG("flash_cris 0x%x", flash_cris);
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LOG_DEBUG("flash_cris 0x%" PRIx32 "", flash_cris);
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return ERROR_FLASH_OPERATION_FAILED;
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return ERROR_FLASH_OPERATION_FAILED;
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}
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}
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return ERROR_OK;
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return ERROR_OK;
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