Added patch for Luminar Micors Fury class devices (Joe Kroesche)
Added support for NVGM bit 2 for AT91SAM7XC128/256 git-svn-id: svn://svn.berlios.de/openocd/trunk@172 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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mlu
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@ -0,0 +1,28 @@
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#daemon configuration
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telnet_port 4444
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gdb_port 3333
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#interface
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interface ft2232
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ft2232_device_desc "Stellaris Evaluation Board A"
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ft2232_layout evb_lm3s811
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ft2232_vid_pid 0x0403 0xbcd9
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jtag_speed 40
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#LM3S811 Evaluation Board has only srst
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reset_config srst_only separate
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#jtag scan chain
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#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
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jtag_device 4 0x1 0xf 0xe
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#target configuration
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daemon_startup attach
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#target <type> <startup mode>
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#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
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target cortex_m3 little run_and_halt 0
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# 4k working area at base of ram
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working_area 0 0x20000800 0x1200 nobackup
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#target_script 0 reset ../doc/scripts/evb_lm3s811_test.script
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#flash configuration
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flash bank stellaris 0 0 0 0 0
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@ -381,8 +381,8 @@ int at91sam7_read_part_info(struct flash_bank_s *bank)
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if (at91sam7_info->cidr_arch == 0x71 )
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{
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at91sam7_info->num_nvmbits = 2;
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at91sam7_info->nvmbits = (status>>8)&0x03;
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at91sam7_info->num_nvmbits = 3;
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at91sam7_info->nvmbits = (status>>8)&0x07;
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bank->base = 0x100000;
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bank->bus_width = 4;
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if (bank->size==0x40000) /* AT91SAM7XC256 */
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@ -74,7 +74,7 @@ flash_driver_t stellaris_flash =
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struct {
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u32 partno;
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char partname[];
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char *partname;
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} StellarisParts[] =
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{
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{0x01,"LM3S101"},
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@ -96,6 +96,33 @@ struct {
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{0x33,"LM3S812"},
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{0x34,"LM3S815"},
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{0x35,"LM3S828"},
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{0x51,"LM3S2110"},
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{0x84,"LM3S2139"},
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{0xa2,"LM3S2410"},
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{0x59,"LM3S2412"},
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{0x56,"LM3S2432"},
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{0x5a,"LM3S2533"},
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{0x57,"LM3S2620"},
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{0x85,"LM3S2637"},
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{0x53,"LM3S2651"},
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{0xa4,"LM3S2730"},
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{0x52,"LM3S2739"},
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{0x54,"LM3S2939"},
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{0x8f,"LM3S2948"},
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{0x58,"LM3S2950"},
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{0x55,"LM3S2965"},
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{0xa1,"LM3S6100"},
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{0x74,"LM3S6110"},
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{0xa5,"LM3S6420"},
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{0x82,"LM3S6422"},
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{0x75,"LM3S6432"},
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{0x71,"LM3S6610"},
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{0x83,"LM3S6633"},
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{0x8b,"LM3S6637"},
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{0xa3,"LM3S6730"},
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{0x89,"LM3S6938"},
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{0x78,"LM3S6952"},
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{0x73,"LM3S6965"},
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{0,"Unknown part"}
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};
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@ -157,7 +184,9 @@ int stellaris_info(struct flash_bank_s *bank, char *buf, int buf_size)
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return ERROR_FLASH_OPERATION_FAILED;
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}
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printed = snprintf(buf, buf_size, "\nLMI Stellaris information: Chip is %s v%i.%02i\n",stellaris_info->target_name, (stellaris_info->did0>>8)&0xFF, (stellaris_info->did0)&0xFF);
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printed = snprintf(buf, buf_size, "\nLMI Stellaris information: Chip is class %i %s v%c.%i\n",
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(stellaris_info->did0>>16)&0xff, stellaris_info->target_name,
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'A' + (stellaris_info->did0>>8)&0xFF, (stellaris_info->did0)&0xFF);
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buf += printed;
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buf_size -= printed;
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@ -295,7 +324,7 @@ int stellaris_read_part_info(struct flash_bank_s *bank)
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{
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stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
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target_t *target = stellaris_info->target;
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u32 did0,did1, status;
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u32 did0,did1, ver, fam, status;
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int i;
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/* Read and parse chip identification register */
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@ -305,16 +334,19 @@ int stellaris_read_part_info(struct flash_bank_s *bank)
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target_read_u32(target, SCB_BASE|DC1, &stellaris_info->dc1);
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DEBUG("did0 0x%x, did1 0x%x, dc0 0x%x, dc1 0x%x",did0, did1, stellaris_info->dc0,stellaris_info->dc1);
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if (((did0>>27)&0x7))
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ver = did0 >> 28;
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if((ver != 0) && (ver != 1))
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{
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WARNING("Unkown did0 version, cannot identify target");
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WARNING("Unknown did0 version, cannot identify target");
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return ERROR_FLASH_OPERATION_FAILED;
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}
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if (did1>>24)
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ver = did1 >> 28;
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fam = (did1 >> 24) & 0xF;
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if(((ver != 0) && (ver != 1)) || (fam != 0))
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{
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WARNING("Unkown did1 version/family, cannot positively identify target as a Stellaris");
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WARNING("Unknown did1 version/family, cannot positively identify target as a Stellaris");
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}
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if (did1 == 0)
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@ -409,7 +441,7 @@ int stellaris_erase(struct flash_bank_s *bank, int first, int last)
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if (stellaris_info->did1 == 0)
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{
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WARNING("Cannot identify target as an AT91SAM");
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WARNING("Cannot identify target as Stellaris");
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return ERROR_FLASH_OPERATION_FAILED;
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}
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@ -428,6 +460,7 @@ int stellaris_erase(struct flash_bank_s *bank, int first, int last)
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if ((first == 0) && (last == (stellaris_info->num_pages-1)))
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{
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target_write_u32(target, FLASH_FMA, 0);
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target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_MERASE);
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/* Wait until erase complete */
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do
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@ -436,6 +469,19 @@ int stellaris_erase(struct flash_bank_s *bank, int first, int last)
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}
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while(flash_fmc & FMC_MERASE);
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/* if device has > 128k, then second erase cycle is needed */
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if(stellaris_info->num_pages * stellaris_info->pagesize > 0x20000)
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{
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target_write_u32(target, FLASH_FMA, 0x20000);
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target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_MERASE);
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/* Wait until erase complete */
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do
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{
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target_read_u32(target, FLASH_FMC, &flash_fmc);
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}
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while(flash_fmc & FMC_MERASE);
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}
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return ERROR_OK;
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}
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@ -588,6 +634,8 @@ int stellaris_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32
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armv7m_algorithm_t armv7m_info;
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int retval;
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DEBUG("(bank=%08X buffer=%08X offset=%08X wcount=%08X)",
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bank, buffer, offset, wcount);
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/* flash write code */
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if (target_alloc_working_area(target, sizeof(stellaris_write_code), &write_algorithm) != ERROR_OK)
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@ -601,6 +649,8 @@ int stellaris_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32
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/* memory buffer */
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while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK)
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{
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DEBUG("called target_alloc_working_area(target=%08X buffer_size=%08X source=%08X)",
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target, buffer_size, source);
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buffer_size /= 2;
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if (buffer_size <= 256)
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{
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@ -677,6 +727,9 @@ int stellaris_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count
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u32 fcr,flash_cris,flash_fmc;
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u32 retval;
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DEBUG("(bank=%08X buffer=%08X offset=%08X count=%08X)",
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bank, buffer, offset, count);
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if (stellaris_info->target->state != TARGET_HALTED)
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{
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return ERROR_TARGET_NOT_HALTED;
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