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arm920t: -Wshadow warning fixes 

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
This commit is contained in:
Øyvind Harboe 2010-06-15 23:18:44 +02:00
parent da5979c38d
commit 97197c98eb
1 changed files with 12 additions and 11 deletions
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23
src/target/arm920t.c
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@ -1,3 +1,4 @@
/*************************************************************************** /***************************************************************************
* Copyright (C) 2005 by Dominic Rath * * Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de * * Dominic.Rath@gmx.de *
@ -841,7 +842,7 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command)
int i; int i;
FILE *output; FILE *output;
struct arm920t_cache_line d_cache[8][64], i_cache[8][64]; struct arm920t_cache_line d_cache[8][64], i_cache[8][64];
int segment, index; int segment, index_t;
struct reg *r; struct reg *r;
retval = arm920t_verify_pointer(CMD_CTX, arm920t); retval = arm920t_verify_pointer(CMD_CTX, arm920t);
@ -910,12 +911,12 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command)
arm920t_write_cp15_physical(target, arm920t_write_cp15_physical(target,
CP15PHYS_TESTSTATE, cp15c15); CP15PHYS_TESTSTATE, cp15c15);
for (index = 0; index < 64; index++) for (index_t = 0; index_t < 64; index_t++)
{ {
/* Ra: /* Ra:
* r0 = index(31:26):SBZ(25:8):segment(7:5):SBZ(4:0) * r0 = index(31:26):SBZ(25:8):segment(7:5):SBZ(4:0)
*/ */
regs[0] = 0x0 | (segment << 5) | (index << 26); regs[0] = 0x0 | (segment << 5) | (index_t << 26);
arm9tdmi_write_core_regs(target, 0x1, regs); arm9tdmi_write_core_regs(target, 0x1, regs);
/* set interpret mode */ /* set interpret mode */
@ -949,18 +950,18 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command)
return retval; return retval;
} }
d_cache[segment][index].cam = regs[9]; d_cache[segment][index_t].cam = regs[9];
/* mask LFSR[6] */ /* mask LFSR[6] */
regs[9] &= 0xfffffffe; regs[9] &= 0xfffffffe;
fprintf(output, "\nsegment: %i, index: %i, CAM: 0x%8.8" fprintf(output, "\nsegment: %i, index: %i, CAM: 0x%8.8"
PRIx32 ", content (%s):\n", PRIx32 ", content (%s):\n",
segment, index, regs[9], segment, index_t, regs[9],
(regs[9] & 0x10) ? "valid" : "invalid"); (regs[9] & 0x10) ? "valid" : "invalid");
for (i = 1; i < 9; i++) for (i = 1; i < 9; i++)
{ {
d_cache[segment][index].data[i] = regs[i]; d_cache[segment][index_t].data[i] = regs[i];
fprintf(output, "%i: 0x%8.8" PRIx32 "\n", fprintf(output, "%i: 0x%8.8" PRIx32 "\n",
i-1, regs[i]); i-1, regs[i]);
} }
@ -1018,12 +1019,12 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command)
arm920t_write_cp15_physical(target, arm920t_write_cp15_physical(target,
CP15PHYS_TESTSTATE, cp15c15); CP15PHYS_TESTSTATE, cp15c15);
for (index = 0; index < 64; index++) for (index_t = 0; index_t < 64; index_t++)
{ {
/* Ra: /* Ra:
* r0 = index(31:26):SBZ(25:8):segment(7:5):SBZ(4:0) * r0 = index(31:26):SBZ(25:8):segment(7:5):SBZ(4:0)
*/ */
regs[0] = 0x0 | (segment << 5) | (index << 26); regs[0] = 0x0 | (segment << 5) | (index_t << 26);
arm9tdmi_write_core_regs(target, 0x1, regs); arm9tdmi_write_core_regs(target, 0x1, regs);
/* set interpret mode */ /* set interpret mode */
@ -1057,18 +1058,18 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command)
return retval; return retval;
} }
i_cache[segment][index].cam = regs[9]; i_cache[segment][index_t].cam = regs[9];
/* mask LFSR[6] */ /* mask LFSR[6] */
regs[9] &= 0xfffffffe; regs[9] &= 0xfffffffe;
fprintf(output, "\nsegment: %i, index: %i, " fprintf(output, "\nsegment: %i, index: %i, "
"CAM: 0x%8.8" PRIx32 ", content (%s):\n", "CAM: 0x%8.8" PRIx32 ", content (%s):\n",
segment, index, regs[9], segment, index_t, regs[9],
(regs[9] & 0x10) ? "valid" : "invalid"); (regs[9] & 0x10) ? "valid" : "invalid");
for (i = 1; i < 9; i++) for (i = 1; i < 9; i++)
{ {
i_cache[segment][index].data[i] = regs[i]; i_cache[segment][index_t].data[i] = regs[i];
fprintf(output, "%i: 0x%8.8" PRIx32 "\n", fprintf(output, "%i: 0x%8.8" PRIx32 "\n",
i-1, regs[i]); i-1, regs[i]);
} }