- added svn props for newly added files
git-svn-id: svn://svn.berlios.de/openocd/trunk@610 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
parent
f8701ea700
commit
96f47822fd
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@ -1,8 +1,8 @@
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#interface
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interface ft2232
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ft2232_device_desc "Amontec JTAGkey A"
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ft2232_layout jtagkey
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ft2232_vid_pid 0x0403 0xcff8
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jtag_speed 0
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jtag_nsrst_delay 200
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jtag_ntrst_delay 200
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#interface
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interface ft2232
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ft2232_device_desc "Amontec JTAGkey A"
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ft2232_layout jtagkey
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ft2232_vid_pid 0x0403 0xcff8
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jtag_speed 0
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jtag_nsrst_delay 200
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jtag_ntrst_delay 200
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@ -1,11 +1,11 @@
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#
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# Calao Systems USB-A9260-C01
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#
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# http://www.calao-systems.com/
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#
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interface ft2232
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ft2232_layout jtagkey
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ft2232_device_desc "USB-A9260"
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ft2232_vid_pid 0x0403 0x6010
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script interface/calao-usb-a9260.cfg
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script target/at91sam9260minimal.cfg
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#
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# Calao Systems USB-A9260-C01
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#
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# http://www.calao-systems.com/
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#
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interface ft2232
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ft2232_layout jtagkey
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ft2232_device_desc "USB-A9260"
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ft2232_vid_pid 0x0403 0x6010
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script interface/calao-usb-a9260.cfg
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script target/at91sam9260minimal.cfg
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@ -1,11 +1,11 @@
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#
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# Calao Systems USB-A9260-C02
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#
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# http://www.calao-systems.com/
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#
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interface ft2232
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ft2232_layout jtagkey
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ft2232_device_desc "USB-A9260 A"
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ft2232_vid_pid 0x0403 0x6001
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script interface/calao-usb-a9260.cfg
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script target/at91sam9260minimal.cfg
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#
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# Calao Systems USB-A9260-C02
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#
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# http://www.calao-systems.com/
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#
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interface ft2232
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ft2232_layout jtagkey
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ft2232_device_desc "USB-A9260 A"
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ft2232_vid_pid 0x0403 0x6001
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script interface/calao-usb-a9260.cfg
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script target/at91sam9260minimal.cfg
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@ -1,15 +1,15 @@
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#
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# Calao Systems USB-A9260 common -C01 -C02 setup
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#
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# http://www.calao-systems.com/
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#
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# See calao-usb-a9260-c01.cfg and calao-usb-a9260-c02.cfg
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#
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# note: you must have an openocd version where jtag_speed sets two values
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# trunk ver 606 contains the fix for this particular issue which can
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# be seen if jtag_speed does not set two separate values
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#
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jtag_speed 1200 0
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jtag_nsrst_delay 200
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jtag_ntrst_delay 200
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#
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# Calao Systems USB-A9260 common -C01 -C02 setup
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#
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# http://www.calao-systems.com/
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#
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# See calao-usb-a9260-c01.cfg and calao-usb-a9260-c02.cfg
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#
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# note: you must have an openocd version where jtag_speed sets two values
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# trunk ver 606 contains the fix for this particular issue which can
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# be seen if jtag_speed does not set two separate values
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#
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jtag_speed 1200 0
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jtag_nsrst_delay 200
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jtag_ntrst_delay 200
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@ -1,3 +1,3 @@
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interface ft2232
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ft2232_device_desc "STR9-comStick A"
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ft2232_layout comstick
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interface ft2232
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ft2232_device_desc "STR9-comStick A"
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ft2232_layout comstick
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@ -1,20 +1,20 @@
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######################################
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# Target: Atmel AT91SAM9260
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######################################
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reset_config trst_and_srst
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#jtag_device <IR length> <IR capture> <IR mask> <IDCODE instruction>
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jtag_device 4 0x1 0xf 0xe
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jtag_nsrst_delay 200
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jtag_ntrst_delay 200
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######################
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# Target configuration
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######################
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#target <type> <endianess> <reset mode> <JTAG pos> <variant>
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target arm926ejs little reset_run 0 arm926ejs
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run_and_halt_time 0 30
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######################################
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# Target: Atmel AT91SAM9260
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######################################
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reset_config trst_and_srst
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#jtag_device <IR length> <IR capture> <IR mask> <IDCODE instruction>
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jtag_device 4 0x1 0xf 0xe
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jtag_nsrst_delay 200
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jtag_ntrst_delay 200
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######################
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# Target configuration
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######################
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#target <type> <endianess> <reset mode> <JTAG pos> <variant>
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target arm926ejs little reset_run 0 arm926ejs
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run_and_halt_time 0 30
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# Cirrus Logic EP9301 processor on an Olimex CS-E9301 board.
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jtag_device 4 0x1 0xf 0xe
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jtag_nsrst_delay 100
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jtag_ntrst_delay 100
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#target configuration
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daemon_startup attach
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#target <type> <endianess> <reset mode>
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target arm920t little reset_halt 0
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working_area 0 0x80014000 0x1000 backup
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#flash configuration
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#flash bank <driver> <base> <size> <chip_width> <bus_width> [driver_options ...]
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flash bank cfi 0x60000000 0x1000000 2 2 0
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# Cirrus Logic EP9301 processor on an Olimex CS-E9301 board.
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jtag_device 4 0x1 0xf 0xe
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jtag_nsrst_delay 100
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jtag_ntrst_delay 100
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#target configuration
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daemon_startup attach
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#target <type> <endianess> <reset mode>
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target arm920t little reset_halt 0
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working_area 0 0x80014000 0x1000 backup
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#flash configuration
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#flash bank <driver> <base> <size> <chip_width> <bus_width> [driver_options ...]
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flash bank cfi 0x60000000 0x1000000 2 2 0
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#xscale ixp42x CPU
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#use combined on interfaces or targets that can’t set TRST/SRST separately
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reset_config srst_only srst_pulls_trst
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#jtag scan chain
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#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
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jtag_device 7 0x1 0x7f 0x7e
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#target configuration
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daemon_startup reset
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#target <type> <startup mode>
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#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
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target xscale big run_and_halt 0 IXP42x
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run_and_halt_time 0 30
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#xscale ixp42x CPU
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#use combined on interfaces or targets that can’t set TRST/SRST separately
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reset_config srst_only srst_pulls_trst
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#jtag scan chain
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#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
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jtag_device 7 0x1 0x7f 0x7e
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#target configuration
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daemon_startup reset
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#target <type> <startup mode>
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#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
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target xscale big run_and_halt 0 IXP42x
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run_and_halt_time 0 30
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#LPC-2129 CPU
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#use combined on interfaces or targets that can’t set TRST/SRST separately
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reset_config trst_and_srst srst_pulls_trst
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#jtag scan chain
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#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
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jtag_device 4 0x1 0xf 0xe
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#target configuration
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daemon_startup reset
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#target <type> <startup mode>
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#target arm7tdmi <endianness> <reset mode> <chainpos> <variant>
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target arm7tdmi little run_and_halt 0 arm7tdmi-s_r4
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run_and_halt_time 0 30
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working_area 0 0x40000000 0x4000 nobackup
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#flash bank <driver> <base> <size> <chip_width> <bus_width>
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flash bank lpc2000 0x0 0x40000 0 0 0 lpc2000_v1 14765 calc_checksum
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#LPC-2129 CPU
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#use combined on interfaces or targets that can’t set TRST/SRST separately
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reset_config trst_and_srst srst_pulls_trst
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#jtag scan chain
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#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
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jtag_device 4 0x1 0xf 0xe
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#target configuration
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daemon_startup reset
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#target <type> <startup mode>
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#target arm7tdmi <endianness> <reset mode> <chainpos> <variant>
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target arm7tdmi little run_and_halt 0 arm7tdmi-s_r4
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run_and_halt_time 0 30
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working_area 0 0x40000000 0x4000 nobackup
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#flash bank <driver> <base> <size> <chip_width> <bus_width>
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flash bank lpc2000 0x0 0x40000 0 0 0 lpc2000_v1 14765 calc_checksum
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#Hilscher netX 500 CPU
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#use combined on interfaces or targets that can’t set TRST/SRST separately
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reset_config trst_and_srst
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#jtag scan chain
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#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
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jtag_device 4 0x1 0xf 0xe
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jtag_nsrst_delay 100
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jtag_ntrst_delay 100
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#target configuration
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daemon_startup reset
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#target <type> <endianness> <startup mode> <chainpos> <variant>
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target arm926ejs little run_and_halt 0 arm926ejs
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run_and_halt_time 0 500
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#Hilscher netX 500 CPU
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#use combined on interfaces or targets that can’t set TRST/SRST separately
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reset_config trst_and_srst
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#jtag scan chain
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#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
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jtag_device 4 0x1 0xf 0xe
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jtag_nsrst_delay 100
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jtag_ntrst_delay 100
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#target configuration
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daemon_startup reset
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#target <type> <endianness> <startup mode> <chainpos> <variant>
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target arm926ejs little run_and_halt 0 arm926ejs
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run_and_halt_time 0 500
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#TI OMAP5912 dual core processor - http://www.ti.com
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#on a OMAP5912 OSK board http://www.spectrumdigital.com.
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#use combined on interfaces or targets that can't set TRST/SRST separately
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reset_config trst_and_srst
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#jtag scan chain
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#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
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jtag_device 38 0x0 0x0 0x0
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jtag_device 4 0x1 0x0 0xe
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jtag_device 8 0x0 0x0 0x0
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#target configuration
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daemon_startup reset
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#target <type> <endianness> <reset mode> <chainpos> <variant>
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target arm926ejs little run_and_init 1 arm926ejs
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target_script 0 reset event/omap5912_reset.script
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run_and_halt_time 0 30
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# omap5912 lcd frame buffer as working area
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working_area 0 0x20000000 0x3e800 nobackup
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#flash bank <driver> <base> <size> <chip_width> <bus_width>
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flash bank cfi 0x00000000 0x1000000 2 2 0
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#TI OMAP5912 dual core processor - http://www.ti.com
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#on a OMAP5912 OSK board http://www.spectrumdigital.com.
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#use combined on interfaces or targets that can't set TRST/SRST separately
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reset_config trst_and_srst
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#jtag scan chain
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#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
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jtag_device 38 0x0 0x0 0x0
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jtag_device 4 0x1 0x0 0xe
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jtag_device 8 0x0 0x0 0x0
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#target configuration
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daemon_startup reset
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#target <type> <endianness> <reset mode> <chainpos> <variant>
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target arm926ejs little run_and_init 1 arm926ejs
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target_script 0 reset event/omap5912_reset.script
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run_and_halt_time 0 30
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# omap5912 lcd frame buffer as working area
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working_area 0 0x20000000 0x3e800 nobackup
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#flash bank <driver> <base> <size> <chip_width> <bus_width>
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flash bank cfi 0x00000000 0x1000000 2 2 0
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#Marvell/Intel PXA270 Script
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# set jtag_nsrst_delay to the delay introduced by your reset circuit
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# the rest of the needed delays are built into the openocd program
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jtag_nsrst_delay 260
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# set the jtag_ntrst_delay to the delay introduced by a reset circuit
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# the rest of the needed delays are built into the openocd program
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jtag_ntrst_delay 0
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#use combined on interfaces or targets that can’t set TRST/SRST separately
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reset_config trst_and_srst separate
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#jtag scan chain
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#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
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jtag_device 7 0x1 0x7f 0x7e
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#target configuration
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daemon_startup reset
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target xscale little reset_halt 0 pxa27x
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# maps to PXA internal RAM. If you are using a PXA255
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# you must initialize SDRAM or leave this option off
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working_area 0 0x5c000000 0x10000 nobackup
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run_and_halt_time 0 30
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#flash bank <driver> <base> <size> <chip_width> <bus_width>
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# works for P30 flash
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flash bank cfi 0x00000000 0x1000000 2 4 0
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#Marvell/Intel PXA270 Script
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# set jtag_nsrst_delay to the delay introduced by your reset circuit
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# the rest of the needed delays are built into the openocd program
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jtag_nsrst_delay 260
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# set the jtag_ntrst_delay to the delay introduced by a reset circuit
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# the rest of the needed delays are built into the openocd program
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jtag_ntrst_delay 0
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#use combined on interfaces or targets that can’t set TRST/SRST separately
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reset_config trst_and_srst separate
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#jtag scan chain
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#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
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jtag_device 7 0x1 0x7f 0x7e
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#target configuration
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daemon_startup reset
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target xscale little reset_halt 0 pxa27x
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# maps to PXA internal RAM. If you are using a PXA255
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# you must initialize SDRAM or leave this option off
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working_area 0 0x5c000000 0x10000 nobackup
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run_and_halt_time 0 30
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#flash bank <driver> <base> <size> <chip_width> <bus_width>
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# works for P30 flash
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flash bank cfi 0x00000000 0x1000000 2 4 0
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@ -1,25 +1,25 @@
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# Hitex stm32 performance stick
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jtag_nsrst_delay 100
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jtag_ntrst_delay 100
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#use combined on interfaces or targets that can't set TRST/SRST separately
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reset_config trst_and_srst
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#jtag scan chain
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#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
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jtag_device 4 0x1 0xf 0xe
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jtag_device 5 0x1 0x1 0x1e
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jtag_device 4 0x1 0xf 0xe
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#target <type> <startup mode>
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#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
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target cortex_m3 little reset_halt 0
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run_and_halt_time 0 30
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working_area 0 0x20000000 16384 nobackup
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#flash bank str7x <base> <size> 0 0 <target#> <variant>
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flash bank stm32x 0 0 0 0 0
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# For more information about the configuration files, take a look at:
|
||||
# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger
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# Hitex stm32 performance stick
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jtag_nsrst_delay 100
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jtag_ntrst_delay 100
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#use combined on interfaces or targets that can't set TRST/SRST separately
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reset_config trst_and_srst
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#jtag scan chain
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#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
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jtag_device 4 0x1 0xf 0xe
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jtag_device 5 0x1 0x1 0x1e
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jtag_device 4 0x1 0xf 0xe
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#target <type> <startup mode>
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#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
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target cortex_m3 little reset_halt 0
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run_and_halt_time 0 30
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working_area 0 0x20000000 16384 nobackup
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#flash bank str7x <base> <size> 0 0 <target#> <variant>
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flash bank stm32x 0 0 0 0 0
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# For more information about the configuration files, take a look at:
|
||||
# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger
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||||
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|
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@ -1,28 +1,28 @@
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#STR730 CPU
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#use combined on interfaces or targets that can’t set TRST/SRST separately
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#reset_config trst_and_srst srst_pulls_trst
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reset_config trst_and_srst srst_pulls_trst
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#jtag scan chain
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#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
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jtag_device 4 0x1 0xf 0xe
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#jtag nTRST and nSRST delay
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jtag_nsrst_delay 500
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||||
jtag_ntrst_delay 500
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#target configuration
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||||
daemon_startup reset
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||||
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#target <type> <startup mode>
|
||||
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
|
||||
target arm7tdmi little run_and_halt 0 arm7tdmi
|
||||
|
||||
run_and_halt_time 0 30
|
||||
|
||||
working_area 0 0x40000000 0x4000 nobackup
|
||||
|
||||
#flash bank <driver> <base> <size> <chip_width> <bus_width>
|
||||
flash bank str7x 0x20000000 0x00040000 0 0 0 STR3x
|
||||
|
||||
#STR730 CPU
|
||||
|
||||
#use combined on interfaces or targets that can’t set TRST/SRST separately
|
||||
#reset_config trst_and_srst srst_pulls_trst
|
||||
reset_config trst_and_srst srst_pulls_trst
|
||||
|
||||
#jtag scan chain
|
||||
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
|
||||
jtag_device 4 0x1 0xf 0xe
|
||||
|
||||
#jtag nTRST and nSRST delay
|
||||
jtag_nsrst_delay 500
|
||||
jtag_ntrst_delay 500
|
||||
|
||||
#target configuration
|
||||
daemon_startup reset
|
||||
|
||||
#target <type> <startup mode>
|
||||
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
|
||||
target arm7tdmi little run_and_halt 0 arm7tdmi
|
||||
|
||||
run_and_halt_time 0 30
|
||||
|
||||
working_area 0 0x40000000 0x4000 nobackup
|
||||
|
||||
#flash bank <driver> <base> <size> <chip_width> <bus_width>
|
||||
flash bank str7x 0x20000000 0x00040000 0 0 0 STR3x
|
||||
|
||||
|
|
|
@ -1,29 +1,29 @@
|
|||
#STR750 CPU
|
||||
|
||||
#use combined on interfaces or targets that can’t set TRST/SRST separately
|
||||
#reset_config trst_and_srst srst_pulls_trst
|
||||
reset_config trst_and_srst srst_pulls_trst
|
||||
|
||||
#jtag scan chain
|
||||
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
|
||||
jtag_device 4 0x1 0xf 0xe
|
||||
|
||||
#jtag nTRST and nSRST delay
|
||||
jtag_nsrst_delay 500
|
||||
jtag_ntrst_delay 500
|
||||
|
||||
#target configuration
|
||||
daemon_startup reset
|
||||
|
||||
#target <type> <startup mode>
|
||||
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
|
||||
target arm7tdmi little run_and_halt 0 arm7tdmi
|
||||
|
||||
run_and_halt_time 0 30
|
||||
|
||||
working_area 0 0x40000000 0x4000 nobackup
|
||||
|
||||
#flash bank <driver> <base> <size> <chip_width> <bus_width>
|
||||
flash bank str7x 0x20000000 0x00040000 0 0 0 STR75x
|
||||
flash bank str7x 0x200C0000 0x00004000 0 0 0 STR75x
|
||||
|
||||
#STR750 CPU
|
||||
|
||||
#use combined on interfaces or targets that can’t set TRST/SRST separately
|
||||
#reset_config trst_and_srst srst_pulls_trst
|
||||
reset_config trst_and_srst srst_pulls_trst
|
||||
|
||||
#jtag scan chain
|
||||
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
|
||||
jtag_device 4 0x1 0xf 0xe
|
||||
|
||||
#jtag nTRST and nSRST delay
|
||||
jtag_nsrst_delay 500
|
||||
jtag_ntrst_delay 500
|
||||
|
||||
#target configuration
|
||||
daemon_startup reset
|
||||
|
||||
#target <type> <startup mode>
|
||||
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
|
||||
target arm7tdmi little run_and_halt 0 arm7tdmi
|
||||
|
||||
run_and_halt_time 0 30
|
||||
|
||||
working_area 0 0x40000000 0x4000 nobackup
|
||||
|
||||
#flash bank <driver> <base> <size> <chip_width> <bus_width>
|
||||
flash bank str7x 0x20000000 0x00040000 0 0 0 STR75x
|
||||
flash bank str7x 0x200C0000 0x00004000 0 0 0 STR75x
|
||||
|
||||
|
|
|
@ -1,19 +1,19 @@
|
|||
#Hitex STR9 Comstick
|
||||
jtag_nsrst_delay 100
|
||||
jtag_ntrst_delay 100
|
||||
#use combined on interfaces or targets that can’t set TRST/SRST separately
|
||||
reset_config trst_and_srst
|
||||
#jtag scan chain
|
||||
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
|
||||
jtag_device 8 0x1 0x1 0xfe
|
||||
jtag_device 4 0x1 0xf 0xe
|
||||
jtag_device 5 0x1 0x1 0x1e
|
||||
#target configuration
|
||||
daemon_startup reset
|
||||
#target <type> <startup mode>
|
||||
#target arm966e <endianness> <reset mode> <chainpos> <variant>
|
||||
target arm966e little reset_halt 1 arm966e
|
||||
run_and_halt_time 0 30
|
||||
working_area 0 0x50000000 16384 nobackup
|
||||
#flash bank <driver> <base> <size> <chip_width> <bus_width>
|
||||
flash bank str9x 0x00000000 0x00080000 0 0 0
|
||||
#Hitex STR9 Comstick
|
||||
jtag_nsrst_delay 100
|
||||
jtag_ntrst_delay 100
|
||||
#use combined on interfaces or targets that can’t set TRST/SRST separately
|
||||
reset_config trst_and_srst
|
||||
#jtag scan chain
|
||||
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
|
||||
jtag_device 8 0x1 0x1 0xfe
|
||||
jtag_device 4 0x1 0xf 0xe
|
||||
jtag_device 5 0x1 0x1 0x1e
|
||||
#target configuration
|
||||
daemon_startup reset
|
||||
#target <type> <startup mode>
|
||||
#target arm966e <endianness> <reset mode> <chainpos> <variant>
|
||||
target arm966e little reset_halt 1 arm966e
|
||||
run_and_halt_time 0 30
|
||||
working_area 0 0x50000000 16384 nobackup
|
||||
#flash bank <driver> <base> <size> <chip_width> <bus_width>
|
||||
flash bank str9x 0x00000000 0x00080000 0 0 0
|
||||
|
|
Loading…
Reference in New Issue