From 95ee7975ea69191ac01bebbc853b07e9db87003a Mon Sep 17 00:00:00 2001
From: mwachs5 <megan@sifive.com>
Date: Tue, 27 Jun 2017 09:46:36 -0700
Subject: [PATCH] riscv: Add skeleton of RISC-V v013 compliance

---
 src/target/riscv/riscv-013.c | 19 ++++++++++++++++++-
 src/target/riscv/riscv.c     | 28 ++++++++++++++--------------
 src/target/riscv/riscv.h     |  1 +
 3 files changed, 33 insertions(+), 15 deletions(-)

diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c
index 60846debe..b50a5a4d1 100644
--- a/src/target/riscv/riscv-013.c
+++ b/src/target/riscv/riscv-013.c
@@ -64,6 +64,7 @@ static void riscv013_fill_dmi_read_u64(struct target *target, char *buf, int a);
 static int riscv013_dmi_write_u64_bits(struct target *target);
 static void riscv013_fill_dmi_nop_u64(struct target *target, char *buf);
 static void riscv013_reset_current_hart(struct target *target);
+static int  riscv013_test_compliance(struct target *target);
 
 /**
  * Since almost everything can be accomplish by scanning the dbus register, all
@@ -728,7 +729,8 @@ static int init_target(struct command_context *cmd_ctx,
 	generic_info->fill_dmi_nop_u64 = &riscv013_fill_dmi_nop_u64;
 	generic_info->dmi_write_u64_bits = &riscv013_dmi_write_u64_bits;
 	generic_info->reset_current_hart = &riscv013_reset_current_hart;
-
+	generic_info->test_compliance = &riscv013_test_compliance;
+	
 	generic_info->version_specific = calloc(1, sizeof(riscv013_info_t));
 	if (!generic_info->version_specific)
 		return ERROR_FAIL;
@@ -2108,3 +2110,18 @@ void riscv013_clear_abstract_error(struct target *target)
 	uint32_t acs = dmi_read(target, DMI_ABSTRACTCS);
 	dmi_write(target, DMI_ABSTRACTCS, acs);
 }
+
+int riscv013_test_compliance(struct target *target) {
+  LOG_INFO("Testing Compliance against RISC-V Debug Spec v0.13");
+
+  int total_tests = 0;
+  int passed_tests = 0;
+
+  LOG_INFO("PASSED %d of %d TESTS\n", passed_tests, total_tests);
+
+  if (total_tests == passed_tests) {
+    return ERROR_OK;
+  } else {
+    return ERROR_FAIL;
+  }
+}
diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c
index ca39d93f9..e5f4fe3e0 100644
--- a/src/target/riscv/riscv.c
+++ b/src/target/riscv/riscv.c
@@ -1246,30 +1246,30 @@ int riscv_dmi_write_u64_bits(struct target *target)
 
 COMMAND_HANDLER(riscv_test_compliance) {
 
-  //struct target *target = get_current_target(CMD_CTX);
-  //TODO: Create methods to check it's really RISC-V.
-  //struct riscv_target * riscv = (struct riscv_target*) target;
-  
+  struct target *target = get_current_target(CMD_CTX);
+
+  RISCV_INFO(r);
+
   if (CMD_ARGC > 0) {
-    if (strcmp(CMD_ARGV[0], "foo") == 0)
-      LOG_ERROR("FOO!");
-    if (strcmp(CMD_ARGV[0], "bar") == 0)
-      LOG_DEBUG("BAR!");
+      LOG_ERROR("Command does not take any parameters.");
+      return ERROR_FAIL;
+  }
+
+  if (r->test_compliance) {
+    return r->test_compliance(target);
   } else {
+    LOG_ERROR("This target does not support this command (may implement an older version of the spec).");
     return ERROR_FAIL;
   }
-  
-  return ERROR_OK;
-  
 }
 
 static const struct command_registration riscv_exec_command_handlers[] = {
   {
-    .name = "riscv_test_compliance",
+    .name = "test_compliance",
     .handler = riscv_test_compliance,
     .mode = COMMAND_EXEC,
-    .usage = "['foo'|'bar']",
-    .help = "foos and bars"
+    .usage = "",
+    .help = "Runs a basic compliance test suite against the RISC-V Debug Spec."
   },
   COMMAND_REGISTRATION_DONE
 };
diff --git a/src/target/riscv/riscv.h b/src/target/riscv/riscv.h
index e23d49d1f..1c4b7ed92 100644
--- a/src/target/riscv/riscv.h
+++ b/src/target/riscv/riscv.h
@@ -92,6 +92,7 @@ typedef struct {
 	void (*fill_dmi_read_u64)(struct target *target, char *buf, int a);
 	void (*fill_dmi_nop_u64)(struct target *target, char *buf);
 	void (*reset_current_hart)(struct target *target);
+        int (*test_compliance)(struct target *target);
 } riscv_info_t;
 
 /* Everything needs the RISC-V specific info structure, so here's a nice macro