From 9c45c9f4bed24c54ac736b15399f889b25e68fe6 Mon Sep 17 00:00:00 2001 From: Evgeniy Naydanov Date: Wed, 3 Apr 2024 16:42:14 +0300 Subject: [PATCH] target/riscv: read registers are not valid on a running target Change-Id: I2c5335bb6055b767d3c3ffb3f6910b71b9c2bb35 Signed-off-by: Evgeniy Naydanov --- src/target/riscv/riscv.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c index 60c26baeb..5b994ee0d 100644 --- a/src/target/riscv/riscv.c +++ b/src/target/riscv/riscv.c @@ -5260,7 +5260,8 @@ int riscv_get_register(struct target *target, riscv_reg_t *value, return ERROR_FAIL; buf_set_u64(reg->value, 0, reg->size, *value); - reg->valid = gdb_regno_cacheable(regid, /* is write? */ false); + reg->valid = gdb_regno_cacheable(regid, /* is write? */ false) && + target->state == TARGET_HALTED; reg->dirty = false; LOG_TARGET_DEBUG(target, "Read %s: 0x%" PRIx64, reg->name, *value);