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Merge pull request #899 from en-sc/en-sc/trig-handle-res-not-avlbl 

target/riscv: improve error handling in trigger setup
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Tim Newsome 2023-08-14 09:48:03 -07:00 committed by GitHub
parent 68ad364f27 9b558838b1
commit 9260101307
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1 changed files with 4 additions and 2 deletions
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6
src/target/riscv/riscv.c
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@ -897,7 +897,7 @@ static int maybe_add_trigger_t2_t6(struct target *target,
}; };
ret = try_setup_single_match_trigger(target, trigger, eq); ret = try_setup_single_match_trigger(target, trigger, eq);
if (ret != ERROR_OK) if (ret != ERROR_OK)
return ERROR_FAIL; return ret;
if (trigger->length > 1) { if (trigger->length > 1) {
LOG_TARGET_DEBUG(target, "Trigger will match accesses at address 0x%" TARGET_PRIxADDR LOG_TARGET_DEBUG(target, "Trigger will match accesses at address 0x%" TARGET_PRIxADDR
@ -1042,7 +1042,9 @@ static int add_trigger(struct target *target, struct trigger *trigger)
break; break;
} while (0); } while (0);
riscv_set_register(target, GDB_REGNO_TSELECT, tselect); if (riscv_set_register(target, GDB_REGNO_TSELECT, tselect) != ERROR_OK &&
ret == ERROR_OK)
return ERROR_FAIL;
return ret; return ret;
} }