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Mostly whitespace changes. (#511) 

Requested in http://openocd.zylin.com/#/c/5821/3

Change-Id: I75e6d551091396fc6e81b3642ae44bafe358eed7
This commit is contained in:
Tim Newsome 2020-08-21 12:56:04 -07:00 committed by GitHub
parent c116dc50b2
commit 920497c62f
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
4 changed files with 35 additions and 35 deletions
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2
src/target/riscv/riscv-011.c
View File

@ -2273,7 +2273,7 @@ static int init_target(struct command_context *cmd_ctx,
struct target *target)
{
LOG_DEBUG("init");
riscv_info_t *generic_info = (riscv_info_t *) target->arch_info;
riscv_info_t *generic_info = (riscv_info_t *)target->arch_info;
generic_info->get_register = get_register;
generic_info->set_register = set_register;
generic_info->read_memory = read_memory;

42
src/target/riscv/riscv-013.c
View File

@ -1290,7 +1290,7 @@ static bool has_sufficient_progbuf(struct target *target, unsigned size)
RISCV013_INFO(info);
RISCV_INFO(r);
return info->progbufsize + r->impebreak >= size ;
return info->progbufsize + r->impebreak >= size;
}
/**
@ -1539,7 +1539,7 @@ static int set_haltgroup(struct target *target, bool *supported)
uint32_t read;
if (dmi_read(target, &read, DMI_DMCS2) != ERROR_OK)
return ERROR_FAIL;
*supported = get_field(read, DMI_DMCS2_HALTGROUP) == (unsigned) target->smp;
*supported = get_field(read, DMI_DMCS2_HALTGROUP) == (unsigned)target->smp;
return ERROR_OK;
}
@ -2194,21 +2194,21 @@ static uint64_t read_from_buf(const uint8_t *buffer, unsigned size)
return buffer[0];
case 2:
return buffer[0]
| ((uint64_t) buffer[1] << 8);
| ((uint64_t)buffer[1] << 8);
case 4:
return buffer[0]
| ((uint64_t) buffer[1] << 8)
| ((uint64_t) buffer[2] << 16)
| ((uint64_t) buffer[3] << 24);
| ((uint64_t)buffer[1] << 8)
| ((uint64_t)buffer[2] << 16)
| ((uint64_t)buffer[3] << 24);
case 8:
return buffer[0]
| ((uint64_t) buffer[1] << 8)
| ((uint64_t) buffer[2] << 16)
| ((uint64_t) buffer[3] << 24)
| ((uint64_t) buffer[4] << 32)
| ((uint64_t) buffer[5] << 40)
| ((uint64_t) buffer[6] << 48)
| ((uint64_t) buffer[7] << 56);
| ((uint64_t)buffer[1] << 8)
| ((uint64_t)buffer[2] << 16)
| ((uint64_t)buffer[3] << 24)
| ((uint64_t)buffer[4] << 32)
| ((uint64_t)buffer[5] << 40)
| ((uint64_t)buffer[6] << 48)
| ((uint64_t)buffer[7] << 56);
default:
assert(false);
}
@ -2318,7 +2318,7 @@ static int read_memory_bus_word(struct target *target, target_addr_t address,
int result;
static int sbdata[4] = { DMI_SBDATA0, DMI_SBDATA1, DMI_SBDATA2, DMI_SBDATA3 };
assert(size <= 16);
for (int i = (size-1) / 4; i >= 0; i--) {
for (int i = (size - 1) / 4; i >= 0; i--) {
result = dmi_op(target, &value, NULL, DMI_OP_READ, sbdata[i], 0, false, true);
if (result != ERROR_OK)
return result;
@ -2675,7 +2675,7 @@ static int read_memory_abstract(struct target *target, target_addr_t address,
LOG_DEBUG("reading %d words of %d bytes from 0x%" TARGET_PRIxADDR, count,
size, address);
memset(buffer, 0, count*size);
memset(buffer, 0, count * size);
/* Convert the size (bytes) to width (bits) */
unsigned width = size << 3;
@ -2694,7 +2694,7 @@ static int read_memory_abstract(struct target *target, target_addr_t address,
bool updateaddr = true;
unsigned width32 = (width + 31) / 32 * 32;
for (uint32_t c = 0; c < count; c++) {
/* Only update the addres initially and let postincrement update it */
/* Only update the address initially and let postincrement update it */
if (updateaddr) {
/* Set arg1 to the address: address + c * size */
result = write_abstract_arg(target, 1, address, riscv_xlen(target));
@ -2759,7 +2759,7 @@ static int write_memory_abstract(struct target *target, target_addr_t address,
return result;
}
/* Only update the addres initially and let postincrement update it */
/* Only update the address initially and let postincrement update it */
if (updateaddr) {
/* Set arg1 to the address: address + c * size */
result = write_abstract_arg(target, 1, address, riscv_xlen(target));
@ -2913,7 +2913,7 @@ static int read_memory_progbuf_inner(struct target *target, target_addr_t addres
goto error;
}
uint64_t value64 = (((uint64_t) dmi_data1) << 32) | dmi_data0;
uint64_t value64 = (((uint64_t)dmi_data1) << 32) | dmi_data0;
write_to_buf(buffer + (next_index - 2) * size, value64, size);
log_memory_access(address + (next_index - 2) * size, value64, size, true);
@ -2998,9 +2998,9 @@ static int read_memory_progbuf_inner(struct target *target, target_addr_t addres
return ERROR_FAIL;
if (size > 4 && dmi_read(target, &dmi_data1, DMI_DATA1) != ERROR_OK)
return ERROR_FAIL;
uint64_t value64 = (((uint64_t) dmi_data1) << 32) | dmi_data0;
write_to_buf(buffer + size * (count-2), value64, size);
log_memory_access(address + size * (count-2), value64, size, true);
uint64_t value64 = (((uint64_t)dmi_data1) << 32) | dmi_data0;
write_to_buf(buffer + size * (count - 2), value64, size);
log_memory_access(address + size * (count - 2), value64, size, true);
}
/* Read the last word. */

22
src/target/riscv/riscv.c
View File

@ -356,7 +356,7 @@ uint32_t dtmcontrol_scan_via_bscan(struct target *target, uint32_t out)
tunneled_dr[0].num_bits = 3;
tunneled_dr[0].out_value = bscan_zero;
tunneled_dr[0].in_value = NULL;
tunneled_dr[1].num_bits = 32+1;
tunneled_dr[1].num_bits = 32 + 1;
tunneled_dr[1].out_value = out_value;
tunneled_dr[1].in_value = in_value;
tunneled_dr[2].num_bits = 7;
@ -365,7 +365,7 @@ uint32_t dtmcontrol_scan_via_bscan(struct target *target, uint32_t out)
tunneled_dr[3].num_bits = 1;
tunneled_dr[3].out_value = bscan_one;
tunneled_dr[3].in_value = NULL;
} else{
} else {
/* BSCAN_TUNNEL_NESTED_TAP */
tunneled_ir[3].num_bits = 3;
tunneled_ir[3].out_value = bscan_zero;
@ -383,7 +383,7 @@ uint32_t dtmcontrol_scan_via_bscan(struct target *target, uint32_t out)
tunneled_dr[3].num_bits = 3;
tunneled_dr[3].out_value = bscan_zero;
tunneled_dr[3].in_value = NULL;
tunneled_dr[2].num_bits = 32+1;
tunneled_dr[2].num_bits = 32 + 1;
tunneled_dr[2].out_value = out_value;
tunneled_dr[2].in_value = in_value;
tunneled_dr[1].num_bits = 7;
@ -1517,18 +1517,18 @@ static int riscv_address_translate(struct target *target,
break;
case SATP_MODE_OFF:
LOG_ERROR("No translation or protection." \
" (satp: 0x%" PRIx64")", satp_value);
" (satp: 0x%" PRIx64 ")", satp_value);
return ERROR_FAIL;
default:
LOG_ERROR("The translation mode is not supported." \
" (satp: 0x%" PRIx64")", satp_value);
" (satp: 0x%" PRIx64 ")", satp_value);
return ERROR_FAIL;
}
LOG_DEBUG("virtual=0x%" TARGET_PRIxADDR "; mode=%s", virtual, info->name);
/* verify bits xlen-1:va_bits-1 are all equal */
target_addr_t mask = ((target_addr_t) 1 << (xlen - (info->va_bits-1))) - 1;
target_addr_t masked_msbs = (virtual >> (info->va_bits-1)) & mask;
target_addr_t mask = ((target_addr_t)1 << (xlen - (info->va_bits - 1))) - 1;
target_addr_t masked_msbs = (virtual >> (info->va_bits - 1)) & mask;
if (masked_msbs != 0 && masked_msbs != mask) {
LOG_ERROR("Virtual address 0x%" TARGET_PRIxADDR " is not sign-extended "
"for %s mode.", virtual, info->name);
@ -1577,12 +1577,12 @@ static int riscv_address_translate(struct target *target,
}
/* Make sure to clear out the high bits that may be set. */
*physical = virtual & (((target_addr_t) 1 << info->va_bits) - 1);
*physical = virtual & (((target_addr_t)1 << info->va_bits) - 1);
while (i < info->level) {
ppn_value = pte >> info->pte_ppn_shift[i];
ppn_value &= info->pte_ppn_mask[i];
*physical &= ~(((target_addr_t) info->pa_ppn_mask[i]) <<
*physical &= ~(((target_addr_t)info->pa_ppn_mask[i]) <<
info->pa_ppn_shift[i]);
*physical |= (ppn_value << info->pa_ppn_shift[i]);
i++;
@ -4323,7 +4323,7 @@ void riscv_add_bscan_tunneled_scan(struct target *target, struct scan_field *fie
/* for BSCAN tunnel, there is a one-TCK skew between shift in and shift out, so
scanning num_bits + 1, and then will right shift the input field after executing the queues */
ctxt->tunneled_dr[1].num_bits = field->num_bits+1;
ctxt->tunneled_dr[1].num_bits = field->num_bits + 1;
ctxt->tunneled_dr[1].out_value = field->out_value;
ctxt->tunneled_dr[1].in_value = field->in_value;
@ -4338,7 +4338,7 @@ void riscv_add_bscan_tunneled_scan(struct target *target, struct scan_field *fie
ctxt->tunneled_dr[1].out_value = &ctxt->tunneled_dr_width;
/* for BSCAN tunnel, there is a one-TCK skew between shift in and shift out, so
scanning num_bits + 1, and then will right shift the input field after executing the queues */
ctxt->tunneled_dr[2].num_bits = field->num_bits+1;
ctxt->tunneled_dr[2].num_bits = field->num_bits + 1;
ctxt->tunneled_dr[2].out_value = field->out_value;
ctxt->tunneled_dr[2].in_value = field->in_value;
ctxt->tunneled_dr[3].num_bits = 3;

2
src/target/riscv/riscv.h
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@ -117,7 +117,7 @@ typedef struct {
int (*get_register_buf)(struct target *target, uint8_t *buf, int regno);
int (*set_register_buf)(struct target *target, int regno,
const uint8_t *buf);
int (*select_current_hart)(struct target *);
int (*select_current_hart)(struct target *target);
bool (*is_halted)(struct target *target);
/* Resume this target, as well as every other prepped target that can be
* resumed near-simultaneously. Clear the prepped flag on any target that