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cortex a8: add missing error handling 

cortex examine was missing error handling.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
This commit is contained in:
Øyvind Harboe 2010-06-21 09:02:02 +02:00
parent acee9d1c65
commit 8d1dcb9bcd
1 changed files with 11 additions and 3 deletions
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14
src/target/cortex_a8.c
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@ -1523,8 +1523,14 @@ static int cortex_a8_examine_first(struct target *target)
/* We do one extra read to ensure DAP is configured, /* We do one extra read to ensure DAP is configured,
* we call ahbap_debugport_init(swjdp) instead * we call ahbap_debugport_init(swjdp) instead
*/ */
ahbap_debugport_init(swjdp); retval = ahbap_debugport_init(swjdp);
mem_ap_read_atomic_u32(swjdp, armv7a->debug_base + CPUDBG_CPUID, &cpuid); if (retval != ERROR_OK)
return retval;
retval = mem_ap_read_atomic_u32(swjdp, armv7a->debug_base + CPUDBG_CPUID, &cpuid);
if (retval != ERROR_OK)
return retval;
if ((retval = mem_ap_read_atomic_u32(swjdp, if ((retval = mem_ap_read_atomic_u32(swjdp,
armv7a->debug_base + CPUDBG_CPUID, &cpuid)) != ERROR_OK) armv7a->debug_base + CPUDBG_CPUID, &cpuid)) != ERROR_OK)
{ {
@ -1559,7 +1565,9 @@ static int cortex_a8_examine_first(struct target *target)
LOG_DEBUG("didr = 0x%08" PRIx32, didr); LOG_DEBUG("didr = 0x%08" PRIx32, didr);
armv7a->armv4_5_common.core_type = ARM_MODE_MON; armv7a->armv4_5_common.core_type = ARM_MODE_MON;
cortex_a8_dpm_setup(cortex_a8, didr); retval = cortex_a8_dpm_setup(cortex_a8, didr);
if (retval != ERROR_OK)
return retval;
/* Setup Breakpoint Register Pairs */ /* Setup Breakpoint Register Pairs */
cortex_a8->brp_num = ((didr >> 24) & 0x0F) + 1; cortex_a8->brp_num = ((didr >> 24) & 0x0F) + 1;