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Upcast mask value to work with 64-bit physical (#436) 

Change-Id: I00f0d2a3c79a431e1aa49c7478fa6c17e2fa5256
This commit is contained in:
Tim Newsome 2020-01-06 16:57:15 -08:00 committed by GitHub
parent 2c3f099b73
commit 8b8db033ee
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GPG Key ID: 4AEE18F83AFDEB23
1 changed files with 7 additions and 3 deletions
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10
src/target/riscv/riscv.c
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@ -1453,6 +1453,9 @@ static int riscv_address_translate(struct target *target,
else
pte = buf_get_u64(buffer, 0, 64);
LOG_DEBUG("i=%d; PTE @0x%" TARGET_PRIxADDR " = 0x%" PRIx64, i,
pte_address, pte);
if (!(pte & PTE_V) || (!(pte & PTE_R) && (pte & PTE_W)))
return ERROR_FAIL;
@ -1476,12 +1479,13 @@ static int riscv_address_translate(struct target *target,
while (i < info->level) {
ppn_value = pte >> info->pte_ppn_shift[i];
ppn_value &= info->pte_ppn_mask[i];
*physical &= ~(info->pa_ppn_mask[i] << info->pa_ppn_shift[i]);
*physical &= ~(((target_addr_t) info->pa_ppn_mask[i]) <<
info->pa_ppn_shift[i]);
*physical |= (ppn_value << info->pa_ppn_shift[i]);
i++;
}
LOG_DEBUG("Virtual address: 0x%" TARGET_PRIxADDR, virtual);
LOG_DEBUG("Physical address: 0x%" TARGET_PRIxADDR, *physical);
LOG_DEBUG("0x%" TARGET_PRIxADDR " -> 0x%" TARGET_PRIxADDR, virtual,
*physical);
return ERROR_OK;
}