- updated cortex_m3 docs regarding luminary reset behaviour
git-svn-id: svn://svn.berlios.de/openocd/trunk@625 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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@ -596,6 +596,13 @@ ARM920t options are similar to ARM9TDMI options.
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@cindex arm966e options
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ARM966e options are similar to ARM9TDMI options.
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@subsection cortex_m3 options
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@cindex cortex_m3 options
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use variant <@var{variant}> @option{lm3s} when debugging luminary lm3s targets. This will cause
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openocd to use a software reset rather than asserting SRST to avoid a issue with clearing
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the debug registers. This is fixed in Fury Rev B, DustDevil Rev B, Tempest, these revisions will
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be detected and the normal reset behaviour used.
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@subsection xscale options
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@cindex xscale options
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Supported variants are @option{ixp42x}, @option{ixp45x}, @option{ixp46x},
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@ -710,7 +710,7 @@ int cortex_m3_assert_reset(target_t *target)
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* when srst is asserted the luminary device seesm to also clear the debug registers
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* which does not match the armv7 debug TRM */
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if (strcmp(cortex_m3->variant, "luminary") == 0)
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if (strcmp(cortex_m3->variant, "lm3s") == 0)
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{
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/* this causes the luminary device to reset using the watchdog */
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ahbap_write_system_atomic_u32(swjdp, NVIC_AIRCR, AIRCR_VECTKEY | AIRCR_SYSRESETREQ );
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@ -11,7 +11,7 @@ jtag_device 4 0x1 0xf 0xe
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# the luminary variant causes a software reset rather than asserting SRST
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# this stops the debug registers from being cleared
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# this will be fixed in later revisions of silicon
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target cortex_m3 little reset_halt 0 luminary
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target cortex_m3 little reset_halt 0 lm3s
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# 4k working area at base of ram
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working_area 0 0x20000000 0x4000 nobackup
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@ -11,7 +11,7 @@ jtag_device 4 0x1 0xf 0xe
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# the luminary variant causes a software reset rather than asserting SRST
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# this stops the debug registers from being cleared
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# this will be fixed in later revisions of silicon
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target cortex_m3 little reset_halt 0 luminary
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target cortex_m3 little reset_halt 0 lm3s
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# 2k working area at base of ram
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working_area 0 0x20000000 0x2000 nobackup
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