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Transform 'u8' to 'uint8_t' in src/target 

- Replace '\([^_]\)u8' with '\1uint8_t'.
- Replace '^u8' with 'uint8_t'.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2274 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
zwelch 2009-06-18 07:04:08 +00:00
parent 8f9f5c189b
commit 86173cdbdd
56 changed files with 664 additions and 664 deletions
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4
src/target/algorithm.h
View File

@ -33,7 +33,7 @@ typedef struct mem_param_s
{ {
u32 address; u32 address;
u32 size; u32 size;
u8 *value; uint8_t *value;
enum param_direction direction; enum param_direction direction;
} mem_param_t; } mem_param_t;
@ -41,7 +41,7 @@ typedef struct reg_param_s
{ {
char *reg_name; char *reg_name;
u32 size; u32 size;
u8 *value; uint8_t *value;
enum param_direction direction; enum param_direction direction;
} reg_param_t; } reg_param_t;

28
src/target/arm11.c
View File

@ -288,14 +288,14 @@ enum arm11_regcache_ids
#define ARM11_GDB_REGISTER_COUNT 26 #define ARM11_GDB_REGISTER_COUNT 26
u8 arm11_gdb_dummy_fp_value[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; uint8_t arm11_gdb_dummy_fp_value[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
reg_t arm11_gdb_dummy_fp_reg = reg_t arm11_gdb_dummy_fp_reg =
{ {
"GDB dummy floating-point register", arm11_gdb_dummy_fp_value, 0, 1, 96, NULL, 0, NULL, 0 "GDB dummy floating-point register", arm11_gdb_dummy_fp_value, 0, 1, 96, NULL, 0, NULL, 0
}; };
u8 arm11_gdb_dummy_fps_value[] = {0, 0, 0, 0}; uint8_t arm11_gdb_dummy_fps_value[] = {0, 0, 0, 0};
reg_t arm11_gdb_dummy_fps_reg = reg_t arm11_gdb_dummy_fps_reg =
{ {
@ -630,8 +630,8 @@ int arm11_leave_debug_state(arm11_common_t * arm11)
scan_field_t chain5_fields[3]; scan_field_t chain5_fields[3];
u8 Ready = 0; /* ignored */ uint8_t Ready = 0; /* ignored */
u8 Valid = 0; /* ignored */ uint8_t Valid = 0; /* ignored */
arm11_setup_field(arm11, 32, &R(RDTR), NULL, chain5_fields + 0); arm11_setup_field(arm11, 32, &R(RDTR), NULL, chain5_fields + 0);
arm11_setup_field(arm11, 1, &Ready, NULL, chain5_fields + 1); arm11_setup_field(arm11, 1, &Ready, NULL, chain5_fields + 1);
@ -717,7 +717,7 @@ int arm11_arch_state(struct target_s *target)
} }
/* target request support */ /* target request support */
int arm11_target_request_data(struct target_s *target, u32 size, u8 *buffer) int arm11_target_request_data(struct target_s *target, u32 size, uint8_t *buffer)
{ {
FNC_INFO_NOTIMPLEMENTED; FNC_INFO_NOTIMPLEMENTED;
@ -1090,7 +1090,7 @@ int arm11_get_gdb_reg_list(struct target_s *target, struct reg_s **reg_list[], i
* size: 1 = byte (8bit), 2 = half-word (16bit), 4 = word (32bit) * size: 1 = byte (8bit), 2 = half-word (16bit), 4 = word (32bit)
* count: number of items of <size> * count: number of items of <size>
*/ */
int arm11_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer) int arm11_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
{ {
/** \todo TODO: check if buffer cast to u32* and u16* might cause alignment problems */ /** \todo TODO: check if buffer cast to u32* and u16* might cause alignment problems */
@ -1173,7 +1173,7 @@ int arm11_read_memory(struct target_s *target, u32 address, u32 size, u32 count,
return ERROR_OK; return ERROR_OK;
} }
int arm11_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer) int arm11_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
{ {
FNC_INFO; FNC_INFO;
@ -1285,7 +1285,7 @@ int arm11_write_memory(struct target_s *target, u32 address, u32 size, u32 count
/* write target memory in multiples of 4 byte, optimized for writing large quantities of data */ /* write target memory in multiples of 4 byte, optimized for writing large quantities of data */
int arm11_bulk_write_memory(struct target_s *target, u32 address, u32 count, u8 *buffer) int arm11_bulk_write_memory(struct target_s *target, u32 address, u32 count, uint8_t *buffer)
{ {
FNC_INFO; FNC_INFO;
@ -1395,11 +1395,11 @@ int arm11_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t
// Save regs // Save regs
for (size_t i = 0; i < 16; i++) for (size_t i = 0; i < 16; i++)
{ {
context[i] = buf_get_u32((u8*)(&arm11->reg_values[i]),0,32); context[i] = buf_get_u32((uint8_t*)(&arm11->reg_values[i]),0,32);
LOG_DEBUG("Save %zi: 0x%x",i,context[i]); LOG_DEBUG("Save %zi: 0x%x",i,context[i]);
} }
cpsr = buf_get_u32((u8*)(arm11->reg_values+ARM11_RC_CPSR),0,32); cpsr = buf_get_u32((uint8_t*)(arm11->reg_values+ARM11_RC_CPSR),0,32);
LOG_DEBUG("Save CPSR: 0x%x", cpsr); LOG_DEBUG("Save CPSR: 0x%x", cpsr);
for (int i = 0; i < num_mem_params; i++) for (int i = 0; i < num_mem_params; i++)
@ -1521,10 +1521,10 @@ restore:
{ {
LOG_DEBUG("restoring register %s with value 0x%8.8x", LOG_DEBUG("restoring register %s with value 0x%8.8x",
arm11->reg_list[i].name, context[i]); arm11->reg_list[i].name, context[i]);
arm11_set_reg(&arm11->reg_list[i], (u8*)&context[i]); arm11_set_reg(&arm11->reg_list[i], (uint8_t*)&context[i]);
} }
LOG_DEBUG("restoring CPSR with value 0x%8.8x", cpsr); LOG_DEBUG("restoring CPSR with value 0x%8.8x", cpsr);
arm11_set_reg(&arm11->reg_list[ARM11_RC_CPSR], (u8*)&cpsr); arm11_set_reg(&arm11->reg_list[ARM11_RC_CPSR], (uint8_t*)&cpsr);
// arm11->core_state = core_state; // arm11->core_state = core_state;
// arm11->core_mode = core_mode; // arm11->core_mode = core_mode;
@ -1668,7 +1668,7 @@ int arm11_get_reg(reg_t *reg)
} }
/** Change a value in the register cache */ /** Change a value in the register cache */
int arm11_set_reg(reg_t *reg, u8 *buf) int arm11_set_reg(reg_t *reg, uint8_t *buf)
{ {
FNC_INFO; FNC_INFO;
@ -1730,7 +1730,7 @@ int arm11_build_reg_cache(target_t *target)
r->name = rd->name; r->name = rd->name;
r->size = 32; r->size = 32;
r->value = (u8 *)(arm11->reg_values + i); r->value = (uint8_t *)(arm11->reg_values + i);
r->dirty = 0; r->dirty = 0;
r->valid = 0; r->valid = 0;
r->bitfield_desc = NULL; r->bitfield_desc = NULL;

22
src/target/arm11.h
View File

@ -66,7 +66,7 @@ do { \
typedef struct arm11_register_history_s typedef struct arm11_register_history_s
{ {
u32 value; u32 value;
u8 valid; uint8_t valid;
}arm11_register_history_t; }arm11_register_history_t;
enum arm11_debug_version enum arm11_debug_version
@ -86,7 +86,7 @@ typedef struct arm11_common_s
u32 device_id; /**< IDCODE readout */ u32 device_id; /**< IDCODE readout */
u32 didr; /**< DIDR readout (debug capabilities) */ u32 didr; /**< DIDR readout (debug capabilities) */
u8 implementor; /**< DIDR Implementor readout */ uint8_t implementor; /**< DIDR Implementor readout */
size_t brp; /**< Number of Breakpoint Register Pairs from DIDR */ size_t brp; /**< Number of Breakpoint Register Pairs from DIDR */
size_t wrp; /**< Number of Watchpoint Register Pairs from DIDR */ size_t wrp; /**< Number of Watchpoint Register Pairs from DIDR */
@ -191,7 +191,7 @@ int arm11_poll(struct target_s *target);
int arm11_arch_state(struct target_s *target); int arm11_arch_state(struct target_s *target);
/* target request support */ /* target request support */
int arm11_target_request_data(struct target_s *target, u32 size, u8 *buffer); int arm11_target_request_data(struct target_s *target, u32 size, uint8_t *buffer);
/* target execution control */ /* target execution control */
int arm11_halt(struct target_s *target); int arm11_halt(struct target_s *target);
@ -211,11 +211,11 @@ int arm11_get_gdb_reg_list(struct target_s *target, struct reg_s **reg_list[], i
* size: 1 = byte (8bit), 2 = half-word (16bit), 4 = word (32bit) * size: 1 = byte (8bit), 2 = half-word (16bit), 4 = word (32bit)
* count: number of items of <size> * count: number of items of <size>
*/ */
int arm11_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer); int arm11_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
int arm11_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer); int arm11_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
/* write target memory in multiples of 4 byte, optimized for writing large quantities of data */ /* write target memory in multiples of 4 byte, optimized for writing large quantities of data */
int arm11_bulk_write_memory(struct target_s *target, u32 address, u32 count, u8 *buffer); int arm11_bulk_write_memory(struct target_s *target, u32 address, u32 count, uint8_t *buffer);
int arm11_checksum_memory(struct target_s *target, u32 address, u32 count, u32* checksum); int arm11_checksum_memory(struct target_s *target, u32 address, u32 count, u32* checksum);
@ -237,7 +237,7 @@ int arm11_quit(void);
/* helpers */ /* helpers */
int arm11_build_reg_cache(target_t *target); int arm11_build_reg_cache(target_t *target);
int arm11_set_reg(reg_t *reg, u8 *buf); int arm11_set_reg(reg_t *reg, uint8_t *buf);
int arm11_get_reg(reg_t *reg); int arm11_get_reg(reg_t *reg);
void arm11_record_register_history(arm11_common_t * arm11); void arm11_record_register_history(arm11_common_t * arm11);
@ -246,9 +246,9 @@ void arm11_dump_reg_changes(arm11_common_t * arm11);
/* internals */ /* internals */
void arm11_setup_field (arm11_common_t * arm11, int num_bits, void * in_data, void * out_data, scan_field_t * field); void arm11_setup_field (arm11_common_t * arm11, int num_bits, void * in_data, void * out_data, scan_field_t * field);
void arm11_add_IR (arm11_common_t * arm11, u8 instr, tap_state_t state); void arm11_add_IR (arm11_common_t * arm11, uint8_t instr, tap_state_t state);
void arm11_add_debug_SCAN_N (arm11_common_t * arm11, u8 chain, tap_state_t state); void arm11_add_debug_SCAN_N (arm11_common_t * arm11, uint8_t chain, tap_state_t state);
void arm11_add_debug_INST (arm11_common_t * arm11, u32 inst, u8 * flag, tap_state_t state); void arm11_add_debug_INST (arm11_common_t * arm11, u32 inst, uint8_t * flag, tap_state_t state);
int arm11_read_DSCR (arm11_common_t * arm11, u32 *dscr); int arm11_read_DSCR (arm11_common_t * arm11, u32 *dscr);
int arm11_write_DSCR (arm11_common_t * arm11, u32 dscr); int arm11_write_DSCR (arm11_common_t * arm11, u32 dscr);
@ -275,7 +275,7 @@ int arm11_add_ir_scan_vc(int num_fields, scan_field_t *fields, tap_state_t state
typedef struct arm11_sc7_action_s typedef struct arm11_sc7_action_s
{ {
bool write; /**< Access mode: true for write, false for read. */ bool write; /**< Access mode: true for write, false for read. */
u8 address; /**< Register address mode. Use enum #arm11_sc7 */ uint8_t address; /**< Register address mode. Use enum #arm11_sc7 */
u32 value; /**< If write then set this to value to be written. u32 value; /**< If write then set this to value to be written.
In read mode this receives the read value when the In read mode this receives the read value when the
function returns. */ function returns. */

34
src/target/arm11_dbgtap.c
View File

@ -97,7 +97,7 @@ void arm11_setup_field(arm11_common_t * arm11, int num_bits, void * out_data, vo
* *
* \remarks This adds to the JTAG command queue but does \em not execute it. * \remarks This adds to the JTAG command queue but does \em not execute it.
*/ */
void arm11_add_IR(arm11_common_t * arm11, u8 instr, tap_state_t state) void arm11_add_IR(arm11_common_t * arm11, uint8_t instr, tap_state_t state)
{ {
jtag_tap_t *tap; jtag_tap_t *tap;
tap = arm11->target->tap; tap = arm11->target->tap;
@ -122,10 +122,10 @@ void arm11_add_IR(arm11_common_t * arm11, u8 instr, tap_state_t state)
* arm11_add_debug_SCAN_N(). * arm11_add_debug_SCAN_N().
* *
*/ */
static void arm11_in_handler_SCAN_N(u8 *in_value) static void arm11_in_handler_SCAN_N(uint8_t *in_value)
{ {
/** \todo TODO: clarify why this isnt properly masked in core.c jtag_read_buffer() */ /** \todo TODO: clarify why this isnt properly masked in core.c jtag_read_buffer() */
u8 v = *in_value & 0x1F; uint8_t v = *in_value & 0x1F;
if (v != 0x10) if (v != 0x10)
{ {
@ -160,7 +160,7 @@ static void arm11_in_handler_SCAN_N(u8 *in_value)
* \remarks This adds to the JTAG command queue but does \em not execute it. * \remarks This adds to the JTAG command queue but does \em not execute it.
*/ */
void arm11_add_debug_SCAN_N(arm11_common_t * arm11, u8 chain, tap_state_t state) void arm11_add_debug_SCAN_N(arm11_common_t * arm11, uint8_t chain, tap_state_t state)
{ {
JTAG_DEBUG("SCREG <= 0x%02x", chain); JTAG_DEBUG("SCREG <= 0x%02x", chain);
@ -168,7 +168,7 @@ void arm11_add_debug_SCAN_N(arm11_common_t * arm11, u8 chain, tap_state_t state)
scan_field_t field; scan_field_t field;
u8 tmp[1]; uint8_t tmp[1];
arm11_setup_field(arm11, 5, &chain, &tmp, &field); arm11_setup_field(arm11, 5, &chain, &tmp, &field);
arm11_add_dr_scan_vc(1, &field, state == ARM11_TAP_DEFAULT ? TAP_DRPAUSE : state); arm11_add_dr_scan_vc(1, &field, state == ARM11_TAP_DEFAULT ? TAP_DRPAUSE : state);
@ -195,7 +195,7 @@ void arm11_add_debug_SCAN_N(arm11_common_t * arm11, u8 chain, tap_state_t state)
* *
* \remarks This adds to the JTAG command queue but does \em not execute it. * \remarks This adds to the JTAG command queue but does \em not execute it.
*/ */
void arm11_add_debug_INST(arm11_common_t * arm11, u32 inst, u8 * flag, tap_state_t state) void arm11_add_debug_INST(arm11_common_t * arm11, u32 inst, uint8_t * flag, tap_state_t state)
{ {
JTAG_DEBUG("INST <= 0x%08x", inst); JTAG_DEBUG("INST <= 0x%08x", inst);
@ -374,7 +374,7 @@ int arm11_run_instr_no_data(arm11_common_t * arm11, u32 * opcode, size_t count)
while (1) while (1)
{ {
u8 flag; uint8_t flag;
arm11_add_debug_INST(arm11, 0, &flag, count ? TAP_IDLE : TAP_DRPAUSE); arm11_add_debug_INST(arm11, 0, &flag, count ? TAP_IDLE : TAP_DRPAUSE);
@ -426,8 +426,8 @@ int arm11_run_instr_data_to_core(arm11_common_t * arm11, u32 opcode, u32 * data,
scan_field_t chain5_fields[3]; scan_field_t chain5_fields[3];
u32 Data; u32 Data;
u8 Ready; uint8_t Ready;
u8 nRetry; uint8_t nRetry;
arm11_setup_field(arm11, 32, &Data, NULL, chain5_fields + 0); arm11_setup_field(arm11, 32, &Data, NULL, chain5_fields + 0);
arm11_setup_field(arm11, 1, NULL, &Ready, chain5_fields + 1); arm11_setup_field(arm11, 1, NULL, &Ready, chain5_fields + 1);
@ -516,8 +516,8 @@ int arm11_run_instr_data_to_core_noack(arm11_common_t * arm11, u32 opcode, u32 *
arm11_setup_field(arm11, 1, NULL, NULL /*&Ready*/, chain5_fields + 1); arm11_setup_field(arm11, 1, NULL, NULL /*&Ready*/, chain5_fields + 1);
arm11_setup_field(arm11, 1, NULL, NULL, chain5_fields + 2); arm11_setup_field(arm11, 1, NULL, NULL, chain5_fields + 2);
u8 Readies[count + 1]; uint8_t Readies[count + 1];
u8 * ReadyPos = Readies; uint8_t * ReadyPos = Readies;
while (count--) while (count--)
{ {
@ -603,8 +603,8 @@ int arm11_run_instr_data_from_core(arm11_common_t * arm11, u32 opcode, u32 * dat
scan_field_t chain5_fields[3]; scan_field_t chain5_fields[3];
u32 Data; u32 Data;
u8 Ready; uint8_t Ready;
u8 nRetry; uint8_t nRetry;
arm11_setup_field(arm11, 32, NULL, &Data, chain5_fields + 0); arm11_setup_field(arm11, 32, NULL, &Data, chain5_fields + 0);
arm11_setup_field(arm11, 1, NULL, &Ready, chain5_fields + 1); arm11_setup_field(arm11, 1, NULL, &Ready, chain5_fields + 1);
@ -685,12 +685,12 @@ int arm11_sc7_run(arm11_common_t * arm11, arm11_sc7_action_t * actions, size_t c
scan_field_t chain7_fields[3]; scan_field_t chain7_fields[3];
u8 nRW; uint8_t nRW;
u32 DataOut; u32 DataOut;
u8 AddressOut; uint8_t AddressOut;
u8 Ready; uint8_t Ready;
u32 DataIn; u32 DataIn;
u8 AddressIn; uint8_t AddressIn;
arm11_setup_field(arm11, 1, &nRW, &Ready, chain7_fields + 0); arm11_setup_field(arm11, 1, &nRW, &Ready, chain7_fields + 0);
arm11_setup_field(arm11, 32, &DataOut, &DataIn, chain7_fields + 1); arm11_setup_field(arm11, 32, &DataOut, &DataIn, chain7_fields + 1);

16
src/target/arm720t.c
View File

@ -43,8 +43,8 @@ int arm720t_target_create(struct target_s *target,Jim_Interp *interp);
int arm720t_init_target(struct command_context_s *cmd_ctx, struct target_s *target); int arm720t_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
int arm720t_quit(void); int arm720t_quit(void);
int arm720t_arch_state(struct target_s *target); int arm720t_arch_state(struct target_s *target);
int arm720t_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer); int arm720t_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
int arm720t_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer); int arm720t_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
int arm720t_soft_reset_halt(struct target_s *target); int arm720t_soft_reset_halt(struct target_s *target);
target_type_t arm720t_target = target_type_t arm720t_target =
@ -91,8 +91,8 @@ int arm720t_scan_cp15(target_t *target, u32 out, u32 *in, int instruction, int c
arm7_9_common_t *arm7_9 = armv4_5->arch_info; arm7_9_common_t *arm7_9 = armv4_5->arch_info;
arm_jtag_t *jtag_info = &arm7_9->jtag_info; arm_jtag_t *jtag_info = &arm7_9->jtag_info;
scan_field_t fields[2]; scan_field_t fields[2];
u8 out_buf[4]; uint8_t out_buf[4];
u8 instruction_buf = instruction; uint8_t instruction_buf = instruction;
buf_set_u32(out_buf, 0, 32, flip_u32(out, 32)); buf_set_u32(out_buf, 0, 32, flip_u32(out, 32));
@ -118,9 +118,9 @@ int arm720t_scan_cp15(target_t *target, u32 out, u32 *in, int instruction, int c
if (in) if (in)
{ {
fields[1].in_value = (u8 *)in; fields[1].in_value = (uint8_t *)in;
jtag_add_dr_scan(2, fields, jtag_get_end_state()); jtag_add_dr_scan(2, fields, jtag_get_end_state());
jtag_add_callback(arm7flip32, (u8 *)in); jtag_add_callback(arm7flip32, (uint8_t *)in);
} else } else
{ {
jtag_add_dr_scan(2, fields, jtag_get_end_state()); jtag_add_dr_scan(2, fields, jtag_get_end_state());
@ -329,7 +329,7 @@ int arm720t_arch_state(struct target_s *target)
return ERROR_OK; return ERROR_OK;
} }
int arm720t_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer) int arm720t_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
{ {
int retval; int retval;
armv4_5_common_t *armv4_5 = target->arch_info; armv4_5_common_t *armv4_5 = target->arch_info;
@ -349,7 +349,7 @@ int arm720t_read_memory(struct target_s *target, u32 address, u32 size, u32 coun
return retval; return retval;
} }
int arm720t_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer) int arm720t_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
{ {
int retval; int retval;

22
src/target/arm7_9_common.c
View File

@ -373,7 +373,7 @@ int arm7_9_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
{ {
u32 current_instr; u32 current_instr;
/* check that user program as not modified breakpoint instruction */ /* check that user program as not modified breakpoint instruction */
if ((retval = target_read_memory(target, breakpoint->address, 4, 1, (u8*)&current_instr)) != ERROR_OK) if ((retval = target_read_memory(target, breakpoint->address, 4, 1, (uint8_t*)&current_instr)) != ERROR_OK)
{ {
return retval; return retval;
} }
@ -387,7 +387,7 @@ int arm7_9_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
{ {
u16 current_instr; u16 current_instr;
/* check that user program as not modified breakpoint instruction */ /* check that user program as not modified breakpoint instruction */
if ((retval = target_read_memory(target, breakpoint->address, 2, 1, (u8*)&current_instr)) != ERROR_OK) if ((retval = target_read_memory(target, breakpoint->address, 2, 1, (uint8_t*)&current_instr)) != ERROR_OK)
{ {
return retval; return retval;
} }
@ -739,7 +739,7 @@ int arm7_9_execute_sys_speed(struct target_s *target)
int arm7_9_execute_fast_sys_speed(struct target_s *target) int arm7_9_execute_fast_sys_speed(struct target_s *target)
{ {
static int set=0; static int set=0;
static u8 check_value[4], check_mask[4]; static uint8_t check_value[4], check_mask[4];
armv4_5_common_t *armv4_5 = target->arch_info; armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info; arm7_9_common_t *arm7_9 = armv4_5->arch_info;
@ -781,7 +781,7 @@ int arm7_9_execute_fast_sys_speed(struct target_s *target)
* @param buffer Pointer to the buffer that will hold the data * @param buffer Pointer to the buffer that will hold the data
* @return The result of receiving data from the Embedded ICE unit * @return The result of receiving data from the Embedded ICE unit
*/ */
int arm7_9_target_request_data(target_t *target, u32 size, u8 *buffer) int arm7_9_target_request_data(target_t *target, u32 size, uint8_t *buffer)
{ {
armv4_5_common_t *armv4_5 = target->arch_info; armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info; arm7_9_common_t *arm7_9 = armv4_5->arch_info;
@ -2208,7 +2208,7 @@ int arm7_9_write_core_reg(struct target_s *target, int num, enum armv4_5_mode mo
return jtag_execute_queue(); return jtag_execute_queue();
} }
int arm7_9_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer) int arm7_9_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
{ {
armv4_5_common_t *armv4_5 = target->arch_info; armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info; arm7_9_common_t *arm7_9 = armv4_5->arch_info;
@ -2384,7 +2384,7 @@ int arm7_9_read_memory(struct target_s *target, u32 address, u32 size, u32 count
return ERROR_OK; return ERROR_OK;
} }
int arm7_9_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer) int arm7_9_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
{ {
armv4_5_common_t *armv4_5 = target->arch_info; armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info; arm7_9_common_t *arm7_9 = armv4_5->arch_info;
@ -2568,7 +2568,7 @@ int arm7_9_write_memory(struct target_s *target, u32 address, u32 size, u32 coun
} }
static int dcc_count; static int dcc_count;
static u8 *dcc_buffer; static uint8_t *dcc_buffer;
static int arm7_9_dcc_completion(struct target_s *target, u32 exit_point, int timeout_ms, void *arch_info) static int arm7_9_dcc_completion(struct target_s *target, u32 exit_point, int timeout_ms, void *arch_info)
{ {
@ -2581,7 +2581,7 @@ static int arm7_9_dcc_completion(struct target_s *target, u32 exit_point, int ti
int little=target->endianness==TARGET_LITTLE_ENDIAN; int little=target->endianness==TARGET_LITTLE_ENDIAN;
int count=dcc_count; int count=dcc_count;
u8 *buffer=dcc_buffer; uint8_t *buffer=dcc_buffer;
if (count>2) if (count>2)
{ {
/* Handle first & last using standard embeddedice_write_reg and the middle ones w/the /* Handle first & last using standard embeddedice_write_reg and the middle ones w/the
@ -2590,7 +2590,7 @@ static int arm7_9_dcc_completion(struct target_s *target, u32 exit_point, int ti
buffer+=4; buffer+=4;
embeddedice_reg_t *ice_reg = arm7_9->eice_cache->reg_list[EICE_COMMS_DATA].arch_info; embeddedice_reg_t *ice_reg = arm7_9->eice_cache->reg_list[EICE_COMMS_DATA].arch_info;
u8 reg_addr = ice_reg->addr & 0x1f; uint8_t reg_addr = ice_reg->addr & 0x1f;
jtag_tap_t *tap; jtag_tap_t *tap;
tap = ice_reg->jtag_info->tap; tap = ice_reg->jtag_info->tap;
@ -2623,7 +2623,7 @@ static const u32 dcc_code[] =
int armv4_5_run_algorithm_inner(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_params, reg_param_t *reg_params, u32 entry_point, u32 exit_point, int timeout_ms, void *arch_info, int (*run_it)(struct target_s *target, u32 exit_point, int timeout_ms, void *arch_info)); int armv4_5_run_algorithm_inner(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_params, reg_param_t *reg_params, u32 entry_point, u32 exit_point, int timeout_ms, void *arch_info, int (*run_it)(struct target_s *target, u32 exit_point, int timeout_ms, void *arch_info));
int arm7_9_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffer) int arm7_9_bulk_write_memory(target_t *target, u32 address, u32 count, uint8_t *buffer)
{ {
int retval; int retval;
armv4_5_common_t *armv4_5 = target->arch_info; armv4_5_common_t *armv4_5 = target->arch_info;
@ -2636,7 +2636,7 @@ int arm7_9_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffe
/* regrab previously allocated working_area, or allocate a new one */ /* regrab previously allocated working_area, or allocate a new one */
if (!arm7_9->dcc_working_area) if (!arm7_9->dcc_working_area)
{ {
u8 dcc_code_buf[6 * 4]; uint8_t dcc_code_buf[6 * 4];
/* make sure we have a working area */ /* make sure we have a working area */
if (target_alloc_working_area(target, 24, &arm7_9->dcc_working_area) != ERROR_OK) if (target_alloc_working_area(target, 24, &arm7_9->dcc_working_area) != ERROR_OK)

10
src/target/arm7_9_common.h
View File

@ -80,7 +80,7 @@ typedef struct arm7_9_common_s
void (*read_xpsr)(target_t *target, u32 *xpsr, int spsr); /**< Function for reading CPSR or SPSR */ void (*read_xpsr)(target_t *target, u32 *xpsr, int spsr); /**< Function for reading CPSR or SPSR */
void (*write_xpsr)(target_t *target, u32 xpsr, int spsr); /**< Function for writing to CPSR or SPSR */ void (*write_xpsr)(target_t *target, u32 xpsr, int spsr); /**< Function for writing to CPSR or SPSR */
void (*write_xpsr_im8)(target_t *target, u8 xpsr_im, int rot, int spsr); /**< Function for writing an immediate value to CPSR or SPSR */ void (*write_xpsr_im8)(target_t *target, uint8_t xpsr_im, int rot, int spsr); /**< Function for writing an immediate value to CPSR or SPSR */
void (*write_core_regs)(target_t *target, u32 mask, u32 core_regs[16]); void (*write_core_regs)(target_t *target, u32 mask, u32 core_regs[16]);
void (*load_word_regs)(target_t *target, u32 mask); void (*load_word_regs)(target_t *target, u32 mask);
@ -115,7 +115,7 @@ int arm7_9_register_commands(struct command_context_s *cmd_ctx);
int arm7_9_poll(target_t *target); int arm7_9_poll(target_t *target);
int arm7_9_target_request_data(target_t *target, u32 size, u8 *buffer); int arm7_9_target_request_data(target_t *target, u32 size, uint8_t *buffer);
int arm7_9_setup(target_t *target); int arm7_9_setup(target_t *target);
int arm7_9_assert_reset(target_t *target); int arm7_9_assert_reset(target_t *target);
@ -131,9 +131,9 @@ int arm7_9_restore_context(target_t *target);
int arm7_9_resume(struct target_s *target, int current, u32 address, int handle_breakpoints, int debug_execution); int arm7_9_resume(struct target_s *target, int current, u32 address, int handle_breakpoints, int debug_execution);
int arm7_9_step(struct target_s *target, int current, u32 address, int handle_breakpoints); int arm7_9_step(struct target_s *target, int current, u32 address, int handle_breakpoints);
int arm7_9_read_core_reg(struct target_s *target, int num, enum armv4_5_mode mode); int arm7_9_read_core_reg(struct target_s *target, int num, enum armv4_5_mode mode);
int arm7_9_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer); int arm7_9_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
int arm7_9_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer); int arm7_9_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
int arm7_9_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffer); int arm7_9_bulk_write_memory(target_t *target, u32 address, u32 count, uint8_t *buffer);
int arm7_9_checksum_memory(struct target_s *target, u32 address, u32 count, u32* checksum); int arm7_9_checksum_memory(struct target_s *target, u32 address, u32 count, u32* checksum);
int arm7_9_blank_check_memory(struct target_s *target, u32 address, u32 count, u32* blank); int arm7_9_blank_check_memory(struct target_s *target, u32 address, u32 count, u32* blank);

28
src/target/arm7tdmi.c
View File

@ -95,8 +95,8 @@ int arm7tdmi_examine_debug_reason(target_t *target)
&& (target->debug_reason != DBG_REASON_SINGLESTEP)) && (target->debug_reason != DBG_REASON_SINGLESTEP))
{ {
scan_field_t fields[2]; scan_field_t fields[2];
u8 databus[4]; uint8_t databus[4];
u8 breakpoint; uint8_t breakpoint;
jtag_set_end_state(TAP_DRPAUSE); jtag_set_end_state(TAP_DRPAUSE);
@ -185,11 +185,11 @@ int arm7tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
fields[1].tap = jtag_info->tap; fields[1].tap = jtag_info->tap;
fields[1].num_bits = 32; fields[1].num_bits = 32;
fields[1].out_value = NULL; fields[1].out_value = NULL;
fields[1].in_value = (u8 *)in; fields[1].in_value = (uint8_t *)in;
jtag_add_dr_scan(2, fields, jtag_get_end_state()); jtag_add_dr_scan(2, fields, jtag_get_end_state());
jtag_add_callback(arm7flip32, (u8 *)in); jtag_add_callback(arm7flip32, (uint8_t *)in);
jtag_add_runtest(0, jtag_get_end_state()); jtag_add_runtest(0, jtag_get_end_state());
@ -214,7 +214,7 @@ int arm7tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
return ERROR_OK; return ERROR_OK;
} }
void arm_endianness(u8 *tmp, void *in, int size, int be, int flip) void arm_endianness(uint8_t *tmp, void *in, int size, int be, int flip)
{ {
u32 readback=le_to_h_u32(tmp); u32 readback=le_to_h_u32(tmp);
if (flip) if (flip)
@ -224,30 +224,30 @@ void arm_endianness(u8 *tmp, void *in, int size, int be, int flip)
case 4: case 4:
if (be) if (be)
{ {
h_u32_to_be(((u8*)in), readback); h_u32_to_be(((uint8_t*)in), readback);
} else } else
{ {
h_u32_to_le(((u8*)in), readback); h_u32_to_le(((uint8_t*)in), readback);
} }
break; break;
case 2: case 2:
if (be) if (be)
{ {
h_u16_to_be(((u8*)in), readback & 0xffff); h_u16_to_be(((uint8_t*)in), readback & 0xffff);
} else } else
{ {
h_u16_to_le(((u8*)in), readback & 0xffff); h_u16_to_le(((uint8_t*)in), readback & 0xffff);
} }
break; break;
case 1: case 1:
*((u8 *)in)= readback & 0xff; *((uint8_t *)in)= readback & 0xff;
break; break;
} }
} }
static int arm7endianness(u8 *in, jtag_callback_data_t size, jtag_callback_data_t be, jtag_callback_data_t captured) static int arm7endianness(uint8_t *in, jtag_callback_data_t size, jtag_callback_data_t be, jtag_callback_data_t captured)
{ {
arm_endianness((u8 *)captured, in, (int)size, (int)be, 1); arm_endianness((uint8_t *)captured, in, (int)size, (int)be, 1);
return ERROR_OK; return ERROR_OK;
} }
@ -397,7 +397,7 @@ void arm7tdmi_read_core_regs_target_buffer(target_t *target, u32 mask, void* buf
int be = (target->endianness == TARGET_BIG_ENDIAN) ? 1 : 0; int be = (target->endianness == TARGET_BIG_ENDIAN) ? 1 : 0;
u32 *buf_u32 = buffer; u32 *buf_u32 = buffer;
u16 *buf_u16 = buffer; u16 *buf_u16 = buffer;
u8 *buf_u8 = buffer; uint8_t *buf_u8 = buffer;
/* STMIA r0-15, [r0] at debug speed /* STMIA r0-15, [r0] at debug speed
* register values will start to appear on 4th DCLK * register values will start to appear on 4th DCLK
@ -481,7 +481,7 @@ void arm7tdmi_write_xpsr(target_t *target, u32 xpsr, int spsr)
arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0); arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0);
} }
void arm7tdmi_write_xpsr_im8(target_t *target, u8 xpsr_im, int rot, int spsr) void arm7tdmi_write_xpsr_im8(target_t *target, uint8_t xpsr_im, int rot, int spsr)
{ {
/* get pointers to arch-specific information */ /* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info; armv4_5_common_t *armv4_5 = target->arch_info;

34
src/target/arm920t.c
View File

@ -48,8 +48,8 @@ int arm920t_target_create(struct target_s *target, Jim_Interp *interp);
int arm920t_init_target(struct command_context_s *cmd_ctx, struct target_s *target); int arm920t_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
int arm920t_quit(void); int arm920t_quit(void);
int arm920t_arch_state(struct target_s *target); int arm920t_arch_state(struct target_s *target);
int arm920t_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer); int arm920t_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
int arm920t_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer); int arm920t_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
int arm920t_soft_reset_halt(struct target_s *target); int arm920t_soft_reset_halt(struct target_s *target);
#define ARM920T_CP15_PHYS_ADDR(x, y, z) ((x << 5) | (y << 1) << (z)) #define ARM920T_CP15_PHYS_ADDR(x, y, z) ((x << 5) | (y << 1) << (z))
@ -99,9 +99,9 @@ int arm920t_read_cp15_physical(target_t *target, int reg_addr, u32 *value)
arm7_9_common_t *arm7_9 = armv4_5->arch_info; arm7_9_common_t *arm7_9 = armv4_5->arch_info;
arm_jtag_t *jtag_info = &arm7_9->jtag_info; arm_jtag_t *jtag_info = &arm7_9->jtag_info;
scan_field_t fields[4]; scan_field_t fields[4];
u8 access_type_buf = 1; uint8_t access_type_buf = 1;
u8 reg_addr_buf = reg_addr & 0x3f; uint8_t reg_addr_buf = reg_addr & 0x3f;
u8 nr_w_buf = 0; uint8_t nr_w_buf = 0;
jtag_set_end_state(TAP_IDLE); jtag_set_end_state(TAP_IDLE);
arm_jtag_scann(jtag_info, 0xf); arm_jtag_scann(jtag_info, 0xf);
@ -129,11 +129,11 @@ int arm920t_read_cp15_physical(target_t *target, int reg_addr, u32 *value)
jtag_add_dr_scan(4, fields, jtag_get_end_state()); jtag_add_dr_scan(4, fields, jtag_get_end_state());
fields[1].in_value = (u8 *)value; fields[1].in_value = (uint8_t *)value;
jtag_add_dr_scan(4, fields, jtag_get_end_state()); jtag_add_dr_scan(4, fields, jtag_get_end_state());
jtag_add_callback(arm_le_to_h_u32, (u8 *)value); jtag_add_callback(arm_le_to_h_u32, (uint8_t *)value);
#ifdef _DEBUG_INSTRUCTION_EXECUTION_ #ifdef _DEBUG_INSTRUCTION_EXECUTION_
jtag_execute_queue(); jtag_execute_queue();
@ -149,10 +149,10 @@ int arm920t_write_cp15_physical(target_t *target, int reg_addr, u32 value)
arm7_9_common_t *arm7_9 = armv4_5->arch_info; arm7_9_common_t *arm7_9 = armv4_5->arch_info;
arm_jtag_t *jtag_info = &arm7_9->jtag_info; arm_jtag_t *jtag_info = &arm7_9->jtag_info;
scan_field_t fields[4]; scan_field_t fields[4];
u8 access_type_buf = 1; uint8_t access_type_buf = 1;
u8 reg_addr_buf = reg_addr & 0x3f; uint8_t reg_addr_buf = reg_addr & 0x3f;
u8 nr_w_buf = 1; uint8_t nr_w_buf = 1;
u8 value_buf[4]; uint8_t value_buf[4];
buf_set_u32(value_buf, 0, 32, value); buf_set_u32(value_buf, 0, 32, value);
@ -196,10 +196,10 @@ int arm920t_execute_cp15(target_t *target, u32 cp15_opcode, u32 arm_opcode)
arm7_9_common_t *arm7_9 = armv4_5->arch_info; arm7_9_common_t *arm7_9 = armv4_5->arch_info;
arm_jtag_t *jtag_info = &arm7_9->jtag_info; arm_jtag_t *jtag_info = &arm7_9->jtag_info;
scan_field_t fields[4]; scan_field_t fields[4];
u8 access_type_buf = 0; /* interpreted access */ uint8_t access_type_buf = 0; /* interpreted access */
u8 reg_addr_buf = 0x0; uint8_t reg_addr_buf = 0x0;
u8 nr_w_buf = 0; uint8_t nr_w_buf = 0;
u8 cp15_opcode_buf[4]; uint8_t cp15_opcode_buf[4];
jtag_set_end_state(TAP_IDLE); jtag_set_end_state(TAP_IDLE);
arm_jtag_scann(jtag_info, 0xf); arm_jtag_scann(jtag_info, 0xf);
@ -518,7 +518,7 @@ int arm920t_arch_state(struct target_s *target)
return ERROR_OK; return ERROR_OK;
} }
int arm920t_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer) int arm920t_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
{ {
int retval; int retval;
@ -527,7 +527,7 @@ int arm920t_read_memory(struct target_s *target, u32 address, u32 size, u32 coun
return retval; return retval;
} }
int arm920t_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer) int arm920t_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
{ {
int retval; int retval;
armv4_5_common_t *armv4_5 = target->arch_info; armv4_5_common_t *armv4_5 = target->arch_info;

28
src/target/arm926ejs.c
View File

@ -45,7 +45,7 @@ int arm926ejs_handle_read_mmu_command(struct command_context_s *cmd_ctx, char *c
int arm926ejs_target_create(struct target_s *target, Jim_Interp *interp); int arm926ejs_target_create(struct target_s *target, Jim_Interp *interp);
int arm926ejs_init_target(struct command_context_s *cmd_ctx, struct target_s *target); int arm926ejs_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
int arm926ejs_quit(void); int arm926ejs_quit(void);
int arm926ejs_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer); int arm926ejs_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
static int arm926ejs_virt2phys(struct target_s *target, u32 virtual, u32 *physical); static int arm926ejs_virt2phys(struct target_s *target, u32 virtual, u32 *physical);
static int arm926ejs_mmu(struct target_s *target, int *enabled); static int arm926ejs_mmu(struct target_s *target, int *enabled);
@ -91,15 +91,15 @@ target_type_t arm926ejs_target =
.mmu = arm926ejs_mmu .mmu = arm926ejs_mmu
}; };
int arm926ejs_catch_broken_irscan(u8 *captured, void *priv, scan_field_t *field) int arm926ejs_catch_broken_irscan(uint8_t *captured, void *priv, scan_field_t *field)
{ {
/* FIX!!!! this code should be reenabled. For now it does not check /* FIX!!!! this code should be reenabled. For now it does not check
* the queue...*/ * the queue...*/
return 0; return 0;
#if 0 #if 0
/* The ARM926EJ-S' instruction register is 4 bits wide */ /* The ARM926EJ-S' instruction register is 4 bits wide */
u8 t = *captured & 0xf; uint8_t t = *captured & 0xf;
u8 t2 = *field->in_check_value & 0xf; uint8_t t2 = *field->in_check_value & 0xf;
if (t == t2) if (t == t2)
{ {
return ERROR_OK; return ERROR_OK;
@ -123,9 +123,9 @@ int arm926ejs_cp15_read(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u3
arm_jtag_t *jtag_info = &arm7_9->jtag_info; arm_jtag_t *jtag_info = &arm7_9->jtag_info;
u32 address = ARM926EJS_CP15_ADDR(op1, op2, CRn, CRm); u32 address = ARM926EJS_CP15_ADDR(op1, op2, CRn, CRm);
scan_field_t fields[4]; scan_field_t fields[4];
u8 address_buf[2]; uint8_t address_buf[2];
u8 nr_w_buf = 0; uint8_t nr_w_buf = 0;
u8 access = 1; uint8_t access = 1;
buf_set_u32(address_buf, 0, 14, address); buf_set_u32(address_buf, 0, 14, address);
@ -139,7 +139,7 @@ int arm926ejs_cp15_read(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u3
fields[0].tap = jtag_info->tap; fields[0].tap = jtag_info->tap;
fields[0].num_bits = 32; fields[0].num_bits = 32;
fields[0].out_value = NULL; fields[0].out_value = NULL;
fields[0].in_value = (u8 *)value; fields[0].in_value = (uint8_t *)value;
fields[1].tap = jtag_info->tap; fields[1].tap = jtag_info->tap;
@ -167,7 +167,7 @@ int arm926ejs_cp15_read(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u3
nr_w_buf = 0; nr_w_buf = 0;
jtag_add_dr_scan(4, fields, jtag_get_end_state()); jtag_add_dr_scan(4, fields, jtag_get_end_state());
jtag_add_callback(arm_le_to_h_u32, (u8 *)value); jtag_add_callback(arm_le_to_h_u32, (uint8_t *)value);
if ((retval = jtag_execute_queue()) != ERROR_OK) if ((retval = jtag_execute_queue()) != ERROR_OK)
{ {
@ -192,10 +192,10 @@ int arm926ejs_cp15_write(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u
arm_jtag_t *jtag_info = &arm7_9->jtag_info; arm_jtag_t *jtag_info = &arm7_9->jtag_info;
u32 address = ARM926EJS_CP15_ADDR(op1, op2, CRn, CRm); u32 address = ARM926EJS_CP15_ADDR(op1, op2, CRn, CRm);
scan_field_t fields[4]; scan_field_t fields[4];
u8 value_buf[4]; uint8_t value_buf[4];
u8 address_buf[2]; uint8_t address_buf[2];
u8 nr_w_buf = 1; uint8_t nr_w_buf = 1;
u8 access = 1; uint8_t access = 1;
buf_set_u32(address_buf, 0, 14, address); buf_set_u32(address_buf, 0, 14, address);
buf_set_u32(value_buf, 0, 32, value); buf_set_u32(value_buf, 0, 32, value);
@ -625,7 +625,7 @@ int arm926ejs_soft_reset_halt(struct target_s *target)
return target_call_event_callbacks(target, TARGET_EVENT_HALTED); return target_call_event_callbacks(target, TARGET_EVENT_HALTED);
} }
int arm926ejs_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer) int arm926ejs_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
{ {
int retval; int retval;
armv4_5_common_t *armv4_5 = target->arch_info; armv4_5_common_t *armv4_5 = target->arch_info;

2
src/target/arm926ejs.h
View File

@ -41,7 +41,7 @@ typedef struct arm926ejs_common_s
extern int arm926ejs_init_arch_info(target_t *target, arm926ejs_common_t *arm926ejs, jtag_tap_t *tap); extern int arm926ejs_init_arch_info(target_t *target, arm926ejs_common_t *arm926ejs, jtag_tap_t *tap);
extern int arm926ejs_register_commands(struct command_context_s *cmd_ctx); extern int arm926ejs_register_commands(struct command_context_s *cmd_ctx);
extern int arm926ejs_arch_state(struct target_s *target); extern int arm926ejs_arch_state(struct target_s *target);
extern int arm926ejs_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer); extern int arm926ejs_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
extern int arm926ejs_soft_reset_halt(struct target_s *target); extern int arm926ejs_soft_reset_halt(struct target_s *target);
#endif /* ARM926EJS_H */ #endif /* ARM926EJS_H */

14
src/target/arm966e.c
View File

@ -164,8 +164,8 @@ int arm966e_read_cp15(target_t *target, int reg_addr, u32 *value)
arm7_9_common_t *arm7_9 = armv4_5->arch_info; arm7_9_common_t *arm7_9 = armv4_5->arch_info;
arm_jtag_t *jtag_info = &arm7_9->jtag_info; arm_jtag_t *jtag_info = &arm7_9->jtag_info;
scan_field_t fields[3]; scan_field_t fields[3];
u8 reg_addr_buf = reg_addr & 0x3f; uint8_t reg_addr_buf = reg_addr & 0x3f;
u8 nr_w_buf = 0; uint8_t nr_w_buf = 0;
jtag_set_end_state(TAP_IDLE); jtag_set_end_state(TAP_IDLE);
if ((retval = arm_jtag_scann(jtag_info, 0xf)) != ERROR_OK) if ((retval = arm_jtag_scann(jtag_info, 0xf)) != ERROR_OK)
@ -191,11 +191,11 @@ int arm966e_read_cp15(target_t *target, int reg_addr, u32 *value)
jtag_add_dr_scan(3, fields, jtag_get_end_state()); jtag_add_dr_scan(3, fields, jtag_get_end_state());
fields[1].in_value = (u8 *)value; fields[1].in_value = (uint8_t *)value;
jtag_add_dr_scan(3, fields, jtag_get_end_state()); jtag_add_dr_scan(3, fields, jtag_get_end_state());
jtag_add_callback(arm_le_to_h_u32, (u8 *)value); jtag_add_callback(arm_le_to_h_u32, (uint8_t *)value);
#ifdef _DEBUG_INSTRUCTION_EXECUTION_ #ifdef _DEBUG_INSTRUCTION_EXECUTION_
@ -216,9 +216,9 @@ int arm966e_write_cp15(target_t *target, int reg_addr, u32 value)
arm7_9_common_t *arm7_9 = armv4_5->arch_info; arm7_9_common_t *arm7_9 = armv4_5->arch_info;
arm_jtag_t *jtag_info = &arm7_9->jtag_info; arm_jtag_t *jtag_info = &arm7_9->jtag_info;
scan_field_t fields[3]; scan_field_t fields[3];
u8 reg_addr_buf = reg_addr & 0x3f; uint8_t reg_addr_buf = reg_addr & 0x3f;
u8 nr_w_buf = 1; uint8_t nr_w_buf = 1;
u8 value_buf[4]; uint8_t value_buf[4];
buf_set_u32(value_buf, 0, 32, value); buf_set_u32(value_buf, 0, 32, value);

30
src/target/arm9tdmi.c
View File

@ -107,9 +107,9 @@ int arm9tdmi_examine_debug_reason(target_t *target)
&& (target->debug_reason != DBG_REASON_SINGLESTEP)) && (target->debug_reason != DBG_REASON_SINGLESTEP))
{ {
scan_field_t fields[3]; scan_field_t fields[3];
u8 databus[4]; uint8_t databus[4];
u8 instructionbus[4]; uint8_t instructionbus[4];
u8 debug_reason; uint8_t debug_reason;
jtag_set_end_state(TAP_DRPAUSE); jtag_set_end_state(TAP_DRPAUSE);
@ -166,9 +166,9 @@ int arm9tdmi_clock_out(arm_jtag_t *jtag_info, u32 instr, u32 out, u32 *in, int s
{ {
int retval = ERROR_OK; int retval = ERROR_OK;
scan_field_t fields[3]; scan_field_t fields[3];
u8 out_buf[4]; uint8_t out_buf[4];
u8 instr_buf[4]; uint8_t instr_buf[4];
u8 sysspeed_buf = 0x0; uint8_t sysspeed_buf = 0x0;
/* prepare buffer */ /* prepare buffer */
buf_set_u32(out_buf, 0, 32, out); buf_set_u32(out_buf, 0, 32, out);
@ -203,10 +203,10 @@ int arm9tdmi_clock_out(arm_jtag_t *jtag_info, u32 instr, u32 out, u32 *in, int s
if (in) if (in)
{ {
fields[0].in_value=(u8 *)in; fields[0].in_value=(uint8_t *)in;
jtag_add_dr_scan(3, fields, jtag_get_end_state()); jtag_add_dr_scan(3, fields, jtag_get_end_state());
jtag_add_callback(arm_le_to_h_u32, (u8 *)in); jtag_add_callback(arm_le_to_h_u32, (uint8_t *)in);
} }
else else
{ {
@ -251,7 +251,7 @@ int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
fields[0].tap = jtag_info->tap; fields[0].tap = jtag_info->tap;
fields[0].num_bits = 32; fields[0].num_bits = 32;
fields[0].out_value = NULL; fields[0].out_value = NULL;
fields[0].in_value = (u8 *)in; fields[0].in_value = (uint8_t *)in;
fields[1].tap = jtag_info->tap; fields[1].tap = jtag_info->tap;
fields[1].num_bits = 3; fields[1].num_bits = 3;
@ -265,7 +265,7 @@ int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
jtag_add_dr_scan(3, fields, jtag_get_end_state()); jtag_add_dr_scan(3, fields, jtag_get_end_state());
jtag_add_callback(arm_le_to_h_u32, (u8 *)in); jtag_add_callback(arm_le_to_h_u32, (uint8_t *)in);
jtag_add_runtest(0, jtag_get_end_state()); jtag_add_runtest(0, jtag_get_end_state());
@ -290,11 +290,11 @@ int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
return ERROR_OK; return ERROR_OK;
} }
extern void arm_endianness(u8 *tmp, void *in, int size, int be, int flip); extern void arm_endianness(uint8_t *tmp, void *in, int size, int be, int flip);
static int arm9endianness(u8 *in, jtag_callback_data_t size, jtag_callback_data_t be, jtag_callback_data_t captured) static int arm9endianness(uint8_t *in, jtag_callback_data_t size, jtag_callback_data_t be, jtag_callback_data_t captured)
{ {
arm_endianness((u8 *)captured, in, (int)size, (int)be, 0); arm_endianness((uint8_t *)captured, in, (int)size, (int)be, 0);
return ERROR_OK; return ERROR_OK;
} }
@ -448,7 +448,7 @@ void arm9tdmi_read_core_regs_target_buffer(target_t *target, u32 mask, void* buf
int be = (target->endianness == TARGET_BIG_ENDIAN) ? 1 : 0; int be = (target->endianness == TARGET_BIG_ENDIAN) ? 1 : 0;
u32 *buf_u32 = buffer; u32 *buf_u32 = buffer;
u16 *buf_u16 = buffer; u16 *buf_u16 = buffer;
u8 *buf_u8 = buffer; uint8_t *buf_u8 = buffer;
/* STMIA r0-15, [r0] at debug speed /* STMIA r0-15, [r0] at debug speed
* register values will start to appear on 4th DCLK * register values will start to appear on 4th DCLK
@ -539,7 +539,7 @@ void arm9tdmi_write_xpsr(target_t *target, u32 xpsr, int spsr)
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0); arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
} }
void arm9tdmi_write_xpsr_im8(target_t *target, u8 xpsr_im, int rot, int spsr) void arm9tdmi_write_xpsr_im8(target_t *target, uint8_t xpsr_im, int rot, int spsr)
{ {
/* get pointers to arch-specific information */ /* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info; armv4_5_common_t *armv4_5 = target->arch_info;

78
src/target/arm_adi_v5.c
View File

@ -70,12 +70,12 @@ static u32 max_tar_block_size(u32 tar_autoincr_block, u32 address)
* * * *
***************************************************************************/ ***************************************************************************/
/* Scan out and in from target ordered u8 buffers */ /* Scan out and in from target ordered uint8_t buffers */
int adi_jtag_dp_scan(swjdp_common_t *swjdp, u8 instr, u8 reg_addr, u8 RnW, u8 *outvalue, u8 *invalue, u8 *ack) int adi_jtag_dp_scan(swjdp_common_t *swjdp, uint8_t instr, uint8_t reg_addr, uint8_t RnW, uint8_t *outvalue, uint8_t *invalue, uint8_t *ack)
{ {
arm_jtag_t *jtag_info = swjdp->jtag_info; arm_jtag_t *jtag_info = swjdp->jtag_info;
scan_field_t fields[2]; scan_field_t fields[2];
u8 out_addr_buf; uint8_t out_addr_buf;
jtag_set_end_state(TAP_IDLE); jtag_set_end_state(TAP_IDLE);
arm_jtag_set_instr(jtag_info, instr, NULL); arm_jtag_set_instr(jtag_info, instr, NULL);
@ -101,12 +101,12 @@ int adi_jtag_dp_scan(swjdp_common_t *swjdp, u8 instr, u8 reg_addr, u8 RnW, u8 *o
} }
/* Scan out and in from host ordered u32 variables */ /* Scan out and in from host ordered u32 variables */
int adi_jtag_dp_scan_u32(swjdp_common_t *swjdp, u8 instr, u8 reg_addr, u8 RnW, u32 outvalue, u32 *invalue, u8 *ack) int adi_jtag_dp_scan_u32(swjdp_common_t *swjdp, uint8_t instr, uint8_t reg_addr, uint8_t RnW, u32 outvalue, u32 *invalue, uint8_t *ack)
{ {
arm_jtag_t *jtag_info = swjdp->jtag_info; arm_jtag_t *jtag_info = swjdp->jtag_info;
scan_field_t fields[2]; scan_field_t fields[2];
u8 out_value_buf[4]; uint8_t out_value_buf[4];
u8 out_addr_buf; uint8_t out_addr_buf;
jtag_set_end_state(TAP_IDLE); jtag_set_end_state(TAP_IDLE);
arm_jtag_set_instr(jtag_info, instr, NULL); arm_jtag_set_instr(jtag_info, instr, NULL);
@ -129,10 +129,10 @@ int adi_jtag_dp_scan_u32(swjdp_common_t *swjdp, u8 instr, u8 reg_addr, u8 RnW, u
if (invalue) if (invalue)
{ {
fields[1].in_value = (u8 *)invalue; fields[1].in_value = (uint8_t *)invalue;
jtag_add_dr_scan(2, fields, jtag_get_end_state()); jtag_add_dr_scan(2, fields, jtag_get_end_state());
jtag_add_callback(arm_le_to_h_u32, (u8 *)invalue); jtag_add_callback(arm_le_to_h_u32, (uint8_t *)invalue);
} else } else
{ {
@ -143,7 +143,7 @@ int adi_jtag_dp_scan_u32(swjdp_common_t *swjdp, u8 instr, u8 reg_addr, u8 RnW, u
} }
/* scan_inout_check adds one extra inscan for DPAP_READ commands to read variables */ /* scan_inout_check adds one extra inscan for DPAP_READ commands to read variables */
int scan_inout_check(swjdp_common_t *swjdp, u8 instr, u8 reg_addr, u8 RnW, u8 *outvalue, u8 *invalue) int scan_inout_check(swjdp_common_t *swjdp, uint8_t instr, uint8_t reg_addr, uint8_t RnW, uint8_t *outvalue, uint8_t *invalue)
{ {
adi_jtag_dp_scan(swjdp, instr, reg_addr, RnW, outvalue, NULL, NULL); adi_jtag_dp_scan(swjdp, instr, reg_addr, RnW, outvalue, NULL, NULL);
@ -161,7 +161,7 @@ int scan_inout_check(swjdp_common_t *swjdp, u8 instr, u8 reg_addr, u8 RnW, u8 *o
return ERROR_OK; return ERROR_OK;
} }
int scan_inout_check_u32(swjdp_common_t *swjdp, u8 instr, u8 reg_addr, u8 RnW, u32 outvalue, u32 *invalue) int scan_inout_check_u32(swjdp_common_t *swjdp, uint8_t instr, uint8_t reg_addr, uint8_t RnW, u32 outvalue, u32 *invalue)
{ {
adi_jtag_dp_scan_u32(swjdp, instr, reg_addr, RnW, outvalue, NULL, NULL); adi_jtag_dp_scan_u32(swjdp, instr, reg_addr, RnW, outvalue, NULL, NULL);
@ -287,17 +287,17 @@ int swjdp_transaction_endcheck(swjdp_common_t *swjdp)
* * * *
***************************************************************************/ ***************************************************************************/
int dap_dp_write_reg(swjdp_common_t *swjdp, u32 value, u8 reg_addr) int dap_dp_write_reg(swjdp_common_t *swjdp, u32 value, uint8_t reg_addr)
{ {
return scan_inout_check_u32(swjdp, DAP_IR_DPACC, reg_addr, DPAP_WRITE, value, NULL); return scan_inout_check_u32(swjdp, DAP_IR_DPACC, reg_addr, DPAP_WRITE, value, NULL);
} }
int dap_dp_read_reg(swjdp_common_t *swjdp, u32 *value, u8 reg_addr) int dap_dp_read_reg(swjdp_common_t *swjdp, u32 *value, uint8_t reg_addr)
{ {
return scan_inout_check_u32(swjdp, DAP_IR_DPACC, reg_addr, DPAP_READ, 0, value); return scan_inout_check_u32(swjdp, DAP_IR_DPACC, reg_addr, DPAP_READ, 0, value);
} }
int dap_ap_select(swjdp_common_t *swjdp,u8 apsel) int dap_ap_select(swjdp_common_t *swjdp,uint8_t apsel)
{ {
u32 select; u32 select;
select = (apsel<<24) & 0xFF000000; select = (apsel<<24) & 0xFF000000;
@ -328,7 +328,7 @@ int dap_dp_bankselect(swjdp_common_t *swjdp,u32 ap_reg)
return ERROR_OK; return ERROR_OK;
} }
int dap_ap_write_reg(swjdp_common_t *swjdp, u32 reg_addr, u8* out_value_buf) int dap_ap_write_reg(swjdp_common_t *swjdp, u32 reg_addr, uint8_t* out_value_buf)
{ {
dap_dp_bankselect(swjdp, reg_addr); dap_dp_bankselect(swjdp, reg_addr);
scan_inout_check(swjdp, DAP_IR_APACC, reg_addr, DPAP_WRITE, out_value_buf, NULL); scan_inout_check(swjdp, DAP_IR_APACC, reg_addr, DPAP_WRITE, out_value_buf, NULL);
@ -336,7 +336,7 @@ int dap_ap_write_reg(swjdp_common_t *swjdp, u32 reg_addr, u8* out_value_buf)
return ERROR_OK; return ERROR_OK;
} }
int dap_ap_read_reg(swjdp_common_t *swjdp, u32 reg_addr, u8 *in_value_buf) int dap_ap_read_reg(swjdp_common_t *swjdp, u32 reg_addr, uint8_t *in_value_buf)
{ {
dap_dp_bankselect(swjdp, reg_addr); dap_dp_bankselect(swjdp, reg_addr);
scan_inout_check(swjdp, DAP_IR_APACC, reg_addr, DPAP_READ, 0, in_value_buf); scan_inout_check(swjdp, DAP_IR_APACC, reg_addr, DPAP_READ, 0, in_value_buf);
@ -345,7 +345,7 @@ int dap_ap_read_reg(swjdp_common_t *swjdp, u32 reg_addr, u8 *in_value_buf)
} }
int dap_ap_write_reg_u32(swjdp_common_t *swjdp, u32 reg_addr, u32 value) int dap_ap_write_reg_u32(swjdp_common_t *swjdp, u32 reg_addr, u32 value)
{ {
u8 out_value_buf[4]; uint8_t out_value_buf[4];
buf_set_u32(out_value_buf, 0, 32, value); buf_set_u32(out_value_buf, 0, 32, value);
dap_dp_bankselect(swjdp, reg_addr); dap_dp_bankselect(swjdp, reg_addr);
@ -442,16 +442,16 @@ int mem_ap_write_atomic_u32(swjdp_common_t *swjdp, u32 address, u32 value)
/***************************************************************************** /*****************************************************************************
* * * *
* mem_ap_write_buf(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address) * * mem_ap_write_buf(swjdp_common_t *swjdp, uint8_t *buffer, int count, u32 address) *
* * * *
* Write a buffer in target order (little endian) * * Write a buffer in target order (little endian) *
* * * *
*****************************************************************************/ *****************************************************************************/
int mem_ap_write_buf_u32(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address) int mem_ap_write_buf_u32(swjdp_common_t *swjdp, uint8_t *buffer, int count, u32 address)
{ {
int wcount, blocksize, writecount, errorcount = 0, retval = ERROR_OK; int wcount, blocksize, writecount, errorcount = 0, retval = ERROR_OK;
u32 adr = address; u32 adr = address;
u8* pBuffer = buffer; uint8_t* pBuffer = buffer;
swjdp->trans_mode = TRANS_MODE_COMPOSITE; swjdp->trans_mode = TRANS_MODE_COMPOSITE;
@ -469,7 +469,7 @@ int mem_ap_write_buf_u32(swjdp_common_t *swjdp, u8 *buffer, int count, u32 addre
for (i = 0; i < 4; i++ ) for (i = 0; i < 4; i++ )
{ {
*((u8*)pBuffer + (adr & 0x3)) = outvalue; *((uint8_t*)pBuffer + (adr & 0x3)) = outvalue;
outvalue >>= 8; outvalue >>= 8;
adr++; adr++;
} }
@ -516,7 +516,7 @@ int mem_ap_write_buf_u32(swjdp_common_t *swjdp, u8 *buffer, int count, u32 addre
return retval; return retval;
} }
int mem_ap_write_buf_packed_u16(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address) int mem_ap_write_buf_packed_u16(swjdp_common_t *swjdp, uint8_t *buffer, int count, u32 address)
{ {
int retval = ERROR_OK; int retval = ERROR_OK;
int wcount, blocksize, writecount, i; int wcount, blocksize, writecount, i;
@ -563,7 +563,7 @@ int mem_ap_write_buf_packed_u16(swjdp_common_t *swjdp, u8 *buffer, int count, u3
for (i = 0; i < nbytes; i++ ) for (i = 0; i < nbytes; i++ )
{ {
*((u8*)buffer + (address & 0x3)) = outvalue; *((uint8_t*)buffer + (address & 0x3)) = outvalue;
outvalue >>= 8; outvalue >>= 8;
address++; address++;
} }
@ -587,7 +587,7 @@ int mem_ap_write_buf_packed_u16(swjdp_common_t *swjdp, u8 *buffer, int count, u3
return retval; return retval;
} }
int mem_ap_write_buf_u16(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address) int mem_ap_write_buf_u16(swjdp_common_t *swjdp, uint8_t *buffer, int count, u32 address)
{ {
int retval = ERROR_OK; int retval = ERROR_OK;
@ -612,7 +612,7 @@ int mem_ap_write_buf_u16(swjdp_common_t *swjdp, u8 *buffer, int count, u32 addre
return retval; return retval;
} }
int mem_ap_write_buf_packed_u8(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address) int mem_ap_write_buf_packed_u8(swjdp_common_t *swjdp, uint8_t *buffer, int count, u32 address)
{ {
int retval = ERROR_OK; int retval = ERROR_OK;
int wcount, blocksize, writecount, i; int wcount, blocksize, writecount, i;
@ -655,7 +655,7 @@ int mem_ap_write_buf_packed_u8(swjdp_common_t *swjdp, u8 *buffer, int count, u32
for (i = 0; i < nbytes; i++ ) for (i = 0; i < nbytes; i++ )
{ {
*((u8*)buffer + (address & 0x3)) = outvalue; *((uint8_t*)buffer + (address & 0x3)) = outvalue;
outvalue >>= 8; outvalue >>= 8;
address++; address++;
} }
@ -679,7 +679,7 @@ int mem_ap_write_buf_packed_u8(swjdp_common_t *swjdp, u8 *buffer, int count, u32
return retval; return retval;
} }
int mem_ap_write_buf_u8(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address) int mem_ap_write_buf_u8(swjdp_common_t *swjdp, uint8_t *buffer, int count, u32 address)
{ {
int retval = ERROR_OK; int retval = ERROR_OK;
@ -704,16 +704,16 @@ int mem_ap_write_buf_u8(swjdp_common_t *swjdp, u8 *buffer, int count, u32 addres
/********************************************************************************* /*********************************************************************************
* * * *
* mem_ap_read_buf_u32(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address) * * mem_ap_read_buf_u32(swjdp_common_t *swjdp, uint8_t *buffer, int count, u32 address) *
* * * *
* Read block fast in target order (little endian) into a buffer * * Read block fast in target order (little endian) into a buffer *
* * * *
**********************************************************************************/ **********************************************************************************/
int mem_ap_read_buf_u32(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address) int mem_ap_read_buf_u32(swjdp_common_t *swjdp, uint8_t *buffer, int count, u32 address)
{ {
int wcount, blocksize, readcount, errorcount = 0, retval = ERROR_OK; int wcount, blocksize, readcount, errorcount = 0, retval = ERROR_OK;
u32 adr = address; u32 adr = address;
u8* pBuffer = buffer; uint8_t* pBuffer = buffer;
swjdp->trans_mode = TRANS_MODE_COMPOSITE; swjdp->trans_mode = TRANS_MODE_COMPOSITE;
@ -772,7 +772,7 @@ int mem_ap_read_buf_u32(swjdp_common_t *swjdp, u8 *buffer, int count, u32 addres
for (i = 0; i < 4; i++ ) for (i = 0; i < 4; i++ )
{ {
*((u8*)pBuffer) = (data >> 8 * (adr & 0x3)); *((uint8_t*)pBuffer) = (data >> 8 * (adr & 0x3));
pBuffer++; pBuffer++;
adr++; adr++;
} }
@ -782,7 +782,7 @@ int mem_ap_read_buf_u32(swjdp_common_t *swjdp, u8 *buffer, int count, u32 addres
return retval; return retval;
} }
int mem_ap_read_buf_packed_u16(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address) int mem_ap_read_buf_packed_u16(swjdp_common_t *swjdp, uint8_t *buffer, int count, u32 address)
{ {
u32 invalue; u32 invalue;
int retval = ERROR_OK; int retval = ERROR_OK;
@ -821,7 +821,7 @@ int mem_ap_read_buf_packed_u16(swjdp_common_t *swjdp, u8 *buffer, int count, u32
for (i = 0; i < nbytes; i++ ) for (i = 0; i < nbytes; i++ )
{ {
*((u8*)buffer) = (invalue >> 8 * (address & 0x3)); *((uint8_t*)buffer) = (invalue >> 8 * (address & 0x3));
buffer++; buffer++;
address++; address++;
} }
@ -834,7 +834,7 @@ int mem_ap_read_buf_packed_u16(swjdp_common_t *swjdp, u8 *buffer, int count, u32
return retval; return retval;
} }
int mem_ap_read_buf_u16(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address) int mem_ap_read_buf_u16(swjdp_common_t *swjdp, uint8_t *buffer, int count, u32 address)
{ {
u32 invalue, i; u32 invalue, i;
int retval = ERROR_OK; int retval = ERROR_OK;
@ -853,7 +853,7 @@ int mem_ap_read_buf_u16(swjdp_common_t *swjdp, u8 *buffer, int count, u32 addres
{ {
for (i = 0; i < 2; i++ ) for (i = 0; i < 2; i++ )
{ {
*((u8*)buffer) = (invalue >> 8 * (address & 0x3)); *((uint8_t*)buffer) = (invalue >> 8 * (address & 0x3));
buffer++; buffer++;
address++; address++;
} }
@ -877,7 +877,7 @@ int mem_ap_read_buf_u16(swjdp_common_t *swjdp, u8 *buffer, int count, u32 addres
* The solution is to arrange for a large out/in scan in this loop and * The solution is to arrange for a large out/in scan in this loop and
* and convert data afterwards. * and convert data afterwards.
*/ */
int mem_ap_read_buf_packed_u8(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address) int mem_ap_read_buf_packed_u8(swjdp_common_t *swjdp, uint8_t *buffer, int count, u32 address)
{ {
u32 invalue; u32 invalue;
int retval = ERROR_OK; int retval = ERROR_OK;
@ -913,7 +913,7 @@ int mem_ap_read_buf_packed_u8(swjdp_common_t *swjdp, u8 *buffer, int count, u32
for (i = 0; i < nbytes; i++ ) for (i = 0; i < nbytes; i++ )
{ {
*((u8*)buffer) = (invalue >> 8 * (address & 0x3)); *((uint8_t*)buffer) = (invalue >> 8 * (address & 0x3));
buffer++; buffer++;
address++; address++;
} }
@ -926,7 +926,7 @@ int mem_ap_read_buf_packed_u8(swjdp_common_t *swjdp, u8 *buffer, int count, u32
return retval; return retval;
} }
int mem_ap_read_buf_u8(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address) int mem_ap_read_buf_u8(swjdp_common_t *swjdp, uint8_t *buffer, int count, u32 address)
{ {
u32 invalue; u32 invalue;
int retval = ERROR_OK; int retval = ERROR_OK;
@ -941,7 +941,7 @@ int mem_ap_read_buf_u8(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address
dap_setup_accessport(swjdp, CSW_8BIT | CSW_ADDRINC_SINGLE, address); dap_setup_accessport(swjdp, CSW_8BIT | CSW_ADDRINC_SINGLE, address);
dap_ap_read_reg_u32(swjdp, AP_REG_DRW, &invalue ); dap_ap_read_reg_u32(swjdp, AP_REG_DRW, &invalue );
retval = swjdp_transaction_endcheck(swjdp); retval = swjdp_transaction_endcheck(swjdp);
*((u8*)buffer) = (invalue >> 8 * (address & 0x3)); *((uint8_t*)buffer) = (invalue >> 8 * (address & 0x3));
count--; count--;
address++; address++;
buffer++; buffer++;
@ -1018,7 +1018,7 @@ int dap_info_command(struct command_context_s *cmd_ctx, swjdp_common_t *swjdp, i
u32 dbgbase,apid; u32 dbgbase,apid;
int romtable_present = 0; int romtable_present = 0;
u8 mem_ap; uint8_t mem_ap;
u32 apselold; u32 apselold;
apselold = swjdp->apsel; apselold = swjdp->apsel;

36
src/target/arm_adi_v5.h
View File

@ -94,9 +94,9 @@ typedef struct swjdp_common_s
u32 ap_csw_value; u32 ap_csw_value;
u32 ap_tar_value; u32 ap_tar_value;
/* information about current pending SWjDP-AHBAP transaction */ /* information about current pending SWjDP-AHBAP transaction */
u8 trans_mode; uint8_t trans_mode;
u8 trans_rw; uint8_t trans_rw;
u8 ack; uint8_t ack;
/* extra tck clocks for memory bus access */ /* extra tck clocks for memory bus access */
u32 memaccess_tck; u32 memaccess_tck;
/* Size of TAR autoincrement block, ARM ADI Specification requires at least 10 bits */ /* Size of TAR autoincrement block, ARM ADI Specification requires at least 10 bits */
@ -105,22 +105,22 @@ typedef struct swjdp_common_s
} swjdp_common_t; } swjdp_common_t;
/* Accessor function for currently selected DAP-AP number */ /* Accessor function for currently selected DAP-AP number */
static inline u8 dap_ap_get_select(swjdp_common_t *swjdp) static inline uint8_t dap_ap_get_select(swjdp_common_t *swjdp)
{ {
return (u8)( swjdp ->apsel >> 24); return (uint8_t)( swjdp ->apsel >> 24);
} }
/* Internal functions used in the module, partial transactions, use with caution */ /* Internal functions used in the module, partial transactions, use with caution */
extern int dap_dp_write_reg(swjdp_common_t *swjdp, u32 value, u8 reg_addr); extern int dap_dp_write_reg(swjdp_common_t *swjdp, u32 value, uint8_t reg_addr);
/* extern int swjdp_write_apacc(swjdp_common_t *swjdp, u32 value, u8 reg_addr); */ /* extern int swjdp_write_apacc(swjdp_common_t *swjdp, u32 value, uint8_t reg_addr); */
extern int dap_dp_read_reg(swjdp_common_t *swjdp, u32 *value, u8 reg_addr); extern int dap_dp_read_reg(swjdp_common_t *swjdp, u32 *value, uint8_t reg_addr);
/* extern int swjdp_read_apacc(swjdp_common_t *swjdp, u32 *value, u8 reg_addr); */ /* extern int swjdp_read_apacc(swjdp_common_t *swjdp, u32 *value, uint8_t reg_addr); */
extern int dap_setup_accessport(swjdp_common_t *swjdp, u32 csw, u32 tar); extern int dap_setup_accessport(swjdp_common_t *swjdp, u32 csw, u32 tar);
extern int dap_ap_select(swjdp_common_t *swjdp,u8 apsel); extern int dap_ap_select(swjdp_common_t *swjdp,uint8_t apsel);
extern int dap_ap_write_reg(swjdp_common_t *swjdp, u32 reg_addr, u8* out_value_buf); extern int dap_ap_write_reg(swjdp_common_t *swjdp, u32 reg_addr, uint8_t* out_value_buf);
extern int dap_ap_write_reg_u32(swjdp_common_t *swjdp, u32 reg_addr, u32 value); extern int dap_ap_write_reg_u32(swjdp_common_t *swjdp, u32 reg_addr, u32 value);
extern int dap_ap_read_reg(swjdp_common_t *swjdp, u32 reg_addr, u8 *in_value_buf); extern int dap_ap_read_reg(swjdp_common_t *swjdp, u32 reg_addr, uint8_t *in_value_buf);
extern int dap_ap_read_reg_u32(swjdp_common_t *swjdp, u32 reg_addr, u32 *value); extern int dap_ap_read_reg_u32(swjdp_common_t *swjdp, u32 reg_addr, u32 *value);
/* External interface, partial operations must be completed with swjdp_transaction_endcheck() */ /* External interface, partial operations must be completed with swjdp_transaction_endcheck() */
@ -135,12 +135,12 @@ extern int mem_ap_read_atomic_u32(swjdp_common_t *swjdp, u32 address, u32 *value
extern int mem_ap_write_atomic_u32(swjdp_common_t *swjdp, u32 address, u32 value); extern int mem_ap_write_atomic_u32(swjdp_common_t *swjdp, u32 address, u32 value);
/* MEM-AP memory mapped bus block transfers */ /* MEM-AP memory mapped bus block transfers */
extern int mem_ap_read_buf_u8(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address); extern int mem_ap_read_buf_u8(swjdp_common_t *swjdp, uint8_t *buffer, int count, u32 address);
extern int mem_ap_read_buf_u16(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address); extern int mem_ap_read_buf_u16(swjdp_common_t *swjdp, uint8_t *buffer, int count, u32 address);
extern int mem_ap_read_buf_u32(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address); extern int mem_ap_read_buf_u32(swjdp_common_t *swjdp, uint8_t *buffer, int count, u32 address);
extern int mem_ap_write_buf_u8(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address); extern int mem_ap_write_buf_u8(swjdp_common_t *swjdp, uint8_t *buffer, int count, u32 address);
extern int mem_ap_write_buf_u16(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address); extern int mem_ap_write_buf_u16(swjdp_common_t *swjdp, uint8_t *buffer, int count, u32 address);
extern int mem_ap_write_buf_u32(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address); extern int mem_ap_write_buf_u32(swjdp_common_t *swjdp, uint8_t *buffer, int count, u32 address);
/* Initialisation of the debug system, power domains and registers */ /* Initialisation of the debug system, power domains and registers */
extern int ahbap_debugport_init(swjdp_common_t *swjdp); extern int ahbap_debugport_init(swjdp_common_t *swjdp);

120
src/target/arm_disassembler.c
View File

@ -102,7 +102,7 @@ int evaluate_blx_imm(u32 opcode, u32 address, arm_instruction_t *instruction)
int evaluate_b_bl(u32 opcode, u32 address, arm_instruction_t *instruction) int evaluate_b_bl(u32 opcode, u32 address, arm_instruction_t *instruction)
{ {
u8 L; uint8_t L;
u32 immediate; u32 immediate;
int offset; int offset;
u32 target_address; u32 target_address;
@ -139,12 +139,12 @@ int evaluate_b_bl(u32 opcode, u32 address, arm_instruction_t *instruction)
/* both normal and extended instruction space (condition field b1111) */ /* both normal and extended instruction space (condition field b1111) */
int evaluate_ldc_stc_mcrr_mrrc(u32 opcode, u32 address, arm_instruction_t *instruction) int evaluate_ldc_stc_mcrr_mrrc(u32 opcode, u32 address, arm_instruction_t *instruction)
{ {
u8 cp_num = (opcode & 0xf00) >> 8; uint8_t cp_num = (opcode & 0xf00) >> 8;
/* MCRR or MRRC */ /* MCRR or MRRC */
if (((opcode & 0x0ff00000) == 0x0c400000) || ((opcode & 0x0ff00000) == 0x0c400000)) if (((opcode & 0x0ff00000) == 0x0c400000) || ((opcode & 0x0ff00000) == 0x0c400000))
{ {
u8 cp_opcode, Rd, Rn, CRm; uint8_t cp_opcode, Rd, Rn, CRm;
char *mnemonic; char *mnemonic;
cp_opcode = (opcode & 0xf0) >> 4; cp_opcode = (opcode & 0xf0) >> 4;
@ -171,8 +171,8 @@ int evaluate_ldc_stc_mcrr_mrrc(u32 opcode, u32 address, arm_instruction_t *instr
} }
else /* LDC or STC */ else /* LDC or STC */
{ {
u8 CRd, Rn, offset; uint8_t CRd, Rn, offset;
u8 U, N; uint8_t U, N;
char *mnemonic; char *mnemonic;
char addressing_mode[32]; char addressing_mode[32];
@ -221,7 +221,7 @@ int evaluate_cdp_mcr_mrc(u32 opcode, u32 address, arm_instruction_t *instruction
{ {
char* cond; char* cond;
char* mnemonic; char* mnemonic;
u8 cp_num, opcode_1, CRd_Rd, CRn, CRm, opcode_2; uint8_t cp_num, opcode_1, CRd_Rd, CRn, CRm, opcode_2;
cond = ((opcode & 0xf0000000) == 0xf0000000) ? "2" : COND(opcode); cond = ((opcode & 0xf0000000) == 0xf0000000) ? "2" : COND(opcode);
cp_num = (opcode & 0xf00) >> 8; cp_num = (opcode & 0xf00) >> 8;
@ -268,8 +268,8 @@ int evaluate_cdp_mcr_mrc(u32 opcode, u32 address, arm_instruction_t *instruction
/* Load/store instructions */ /* Load/store instructions */
int evaluate_load_store(u32 opcode, u32 address, arm_instruction_t *instruction) int evaluate_load_store(u32 opcode, u32 address, arm_instruction_t *instruction)
{ {
u8 I, P, U, B, W, L; uint8_t I, P, U, B, W, L;
u8 Rn, Rd; uint8_t Rn, Rd;
char *operation; /* "LDR" or "STR" */ char *operation; /* "LDR" or "STR" */
char *suffix; /* "", "B", "T", "BT" */ char *suffix; /* "", "B", "T", "BT" */
char offset[32]; char offset[32];
@ -351,8 +351,8 @@ int evaluate_load_store(u32 opcode, u32 address, arm_instruction_t *instruction)
} }
else /* either +-<Rm> or +-<Rm>, <shift>, #<shift_imm> */ else /* either +-<Rm> or +-<Rm>, <shift>, #<shift_imm> */
{ {
u8 shift_imm, shift; uint8_t shift_imm, shift;
u8 Rm; uint8_t Rm;
shift_imm = (opcode & 0xf80) >> 7; shift_imm = (opcode & 0xf80) >> 7;
shift = (opcode & 0x60) >> 5; shift = (opcode & 0x60) >> 5;
@ -436,8 +436,8 @@ int evaluate_load_store(u32 opcode, u32 address, arm_instruction_t *instruction)
/* Miscellaneous load/store instructions */ /* Miscellaneous load/store instructions */
int evaluate_misc_load_store(u32 opcode, u32 address, arm_instruction_t *instruction) int evaluate_misc_load_store(u32 opcode, u32 address, arm_instruction_t *instruction)
{ {
u8 P, U, I, W, L, S, H; uint8_t P, U, I, W, L, S, H;
u8 Rn, Rd; uint8_t Rn, Rd;
char *operation; /* "LDR" or "STR" */ char *operation; /* "LDR" or "STR" */
char *suffix; /* "H", "SB", "SH", "D" */ char *suffix; /* "H", "SB", "SH", "D" */
char offset[32]; char offset[32];
@ -519,7 +519,7 @@ int evaluate_misc_load_store(u32 opcode, u32 address, arm_instruction_t *instruc
} }
else /* Register offset/index (+-<Rm>) */ else /* Register offset/index (+-<Rm>) */
{ {
u8 Rm; uint8_t Rm;
Rm = (opcode & 0xf); Rm = (opcode & 0xf);
snprintf(offset, 32, "%sr%i", (U) ? "" : "-", Rm); snprintf(offset, 32, "%sr%i", (U) ? "" : "-", Rm);
@ -563,7 +563,7 @@ int evaluate_misc_load_store(u32 opcode, u32 address, arm_instruction_t *instruc
/* Load/store multiples instructions */ /* Load/store multiples instructions */
int evaluate_ldm_stm(u32 opcode, u32 address, arm_instruction_t *instruction) int evaluate_ldm_stm(u32 opcode, u32 address, arm_instruction_t *instruction)
{ {
u8 P, U, S, W, L, Rn; uint8_t P, U, S, W, L, Rn;
u32 register_list; u32 register_list;
char *addressing_mode; char *addressing_mode;
char *mnemonic; char *mnemonic;
@ -656,7 +656,7 @@ int evaluate_mul_and_extra_ld_st(u32 opcode, u32 address, arm_instruction_t *ins
/* Multiply (accumulate) */ /* Multiply (accumulate) */
if ((opcode & 0x0f800000) == 0x00000000) if ((opcode & 0x0f800000) == 0x00000000)
{ {
u8 Rm, Rs, Rn, Rd, S; uint8_t Rm, Rs, Rn, Rd, S;
Rm = opcode & 0xf; Rm = opcode & 0xf;
Rs = (opcode & 0xf00) >> 8; Rs = (opcode & 0xf00) >> 8;
Rn = (opcode & 0xf000) >> 12; Rn = (opcode & 0xf000) >> 12;
@ -684,7 +684,7 @@ int evaluate_mul_and_extra_ld_st(u32 opcode, u32 address, arm_instruction_t *ins
if ((opcode & 0x0f800000) == 0x00800000) if ((opcode & 0x0f800000) == 0x00800000)
{ {
char* mnemonic = NULL; char* mnemonic = NULL;
u8 Rm, Rs, RdHi, RdLow, S; uint8_t Rm, Rs, RdHi, RdLow, S;
Rm = opcode & 0xf; Rm = opcode & 0xf;
Rs = (opcode & 0xf00) >> 8; Rs = (opcode & 0xf00) >> 8;
RdHi = (opcode & 0xf000) >> 12; RdHi = (opcode & 0xf000) >> 12;
@ -721,7 +721,7 @@ int evaluate_mul_and_extra_ld_st(u32 opcode, u32 address, arm_instruction_t *ins
/* Swap/swap byte */ /* Swap/swap byte */
if ((opcode & 0x0f800000) == 0x01000000) if ((opcode & 0x0f800000) == 0x01000000)
{ {
u8 Rm, Rd, Rn; uint8_t Rm, Rd, Rn;
Rm = opcode & 0xf; Rm = opcode & 0xf;
Rd = (opcode & 0xf000) >> 12; Rd = (opcode & 0xf000) >> 12;
Rn = (opcode & 0xf0000) >> 16; Rn = (opcode & 0xf0000) >> 16;
@ -752,8 +752,8 @@ int evaluate_mrs_msr(u32 opcode, u32 address, arm_instruction_t *instruction)
/* immediate variant */ /* immediate variant */
if (opcode & 0x02000000) if (opcode & 0x02000000)
{ {
u8 immediate = (opcode & 0xff); uint8_t immediate = (opcode & 0xff);
u8 rotate = (opcode & 0xf00); uint8_t rotate = (opcode & 0xf00);
snprintf(instruction->text, 128, "0x%8.8x\t0x%8.8x\tMSR%s %s_%s%s%s%s, 0x%8.8x", snprintf(instruction->text, 128, "0x%8.8x\t0x%8.8x\tMSR%s %s_%s%s%s%s, 0x%8.8x",
address, opcode, COND(opcode), PSR, address, opcode, COND(opcode), PSR,
@ -766,7 +766,7 @@ int evaluate_mrs_msr(u32 opcode, u32 address, arm_instruction_t *instruction)
} }
else /* register variant */ else /* register variant */
{ {
u8 Rm = opcode & 0xf; uint8_t Rm = opcode & 0xf;
snprintf(instruction->text, 128, "0x%8.8x\t0x%8.8x\tMSR%s %s_%s%s%s%s, r%i", snprintf(instruction->text, 128, "0x%8.8x\t0x%8.8x\tMSR%s %s_%s%s%s%s, r%i",
address, opcode, COND(opcode), PSR, address, opcode, COND(opcode), PSR,
(opcode & 0x10000) ? "c" : "", (opcode & 0x10000) ? "c" : "",
@ -780,7 +780,7 @@ int evaluate_mrs_msr(u32 opcode, u32 address, arm_instruction_t *instruction)
} }
else /* Move status register to register (MRS) */ else /* Move status register to register (MRS) */
{ {
u8 Rd; uint8_t Rd;
instruction->type = ARM_MRS; instruction->type = ARM_MRS;
Rd = (opcode & 0x0000f000) >> 12; Rd = (opcode & 0x0000f000) >> 12;
@ -804,7 +804,7 @@ int evaluate_misc_instr(u32 opcode, u32 address, arm_instruction_t *instruction)
/* BX */ /* BX */
if ((opcode & 0x006000f0) == 0x00200010) if ((opcode & 0x006000f0) == 0x00200010)
{ {
u8 Rm; uint8_t Rm;
instruction->type = ARM_BX; instruction->type = ARM_BX;
Rm = opcode & 0xf; Rm = opcode & 0xf;
@ -818,7 +818,7 @@ int evaluate_misc_instr(u32 opcode, u32 address, arm_instruction_t *instruction)
/* CLZ */ /* CLZ */
if ((opcode & 0x006000f0) == 0x00600010) if ((opcode & 0x006000f0) == 0x00600010)
{ {
u8 Rm, Rd; uint8_t Rm, Rd;
instruction->type = ARM_CLZ; instruction->type = ARM_CLZ;
Rm = opcode & 0xf; Rm = opcode & 0xf;
Rd = (opcode & 0xf000) >> 12; Rd = (opcode & 0xf000) >> 12;
@ -830,7 +830,7 @@ int evaluate_misc_instr(u32 opcode, u32 address, arm_instruction_t *instruction)
/* BLX(2) */ /* BLX(2) */
if ((opcode & 0x006000f0) == 0x00200030) if ((opcode & 0x006000f0) == 0x00200030)
{ {
u8 Rm; uint8_t Rm;
instruction->type = ARM_BLX; instruction->type = ARM_BLX;
Rm = opcode & 0xf; Rm = opcode & 0xf;
@ -844,7 +844,7 @@ int evaluate_misc_instr(u32 opcode, u32 address, arm_instruction_t *instruction)
/* Enhanced DSP add/subtracts */ /* Enhanced DSP add/subtracts */
if ((opcode & 0x0000000f0) == 0x00000050) if ((opcode & 0x0000000f0) == 0x00000050)
{ {
u8 Rm, Rd, Rn; uint8_t Rm, Rd, Rn;
char *mnemonic = NULL; char *mnemonic = NULL;
Rm = opcode & 0xf; Rm = opcode & 0xf;
Rd = (opcode & 0xf000) >> 12; Rd = (opcode & 0xf000) >> 12;
@ -894,7 +894,7 @@ int evaluate_misc_instr(u32 opcode, u32 address, arm_instruction_t *instruction)
/* SMLA<x><y> */ /* SMLA<x><y> */
if ((opcode & 0x00600000) == 0x00000000) if ((opcode & 0x00600000) == 0x00000000)
{ {
u8 Rd, Rm, Rs, Rn; uint8_t Rd, Rm, Rs, Rn;
instruction->type = ARM_SMLAxy; instruction->type = ARM_SMLAxy;
Rd = (opcode & 0xf0000) >> 16; Rd = (opcode & 0xf0000) >> 16;
Rm = (opcode & 0xf); Rm = (opcode & 0xf);
@ -909,7 +909,7 @@ int evaluate_misc_instr(u32 opcode, u32 address, arm_instruction_t *instruction)
/* SMLAL<x><y> */ /* SMLAL<x><y> */
if ((opcode & 0x00600000) == 0x00400000) if ((opcode & 0x00600000) == 0x00400000)
{ {
u8 RdLow, RdHi, Rm, Rs; uint8_t RdLow, RdHi, Rm, Rs;
instruction->type = ARM_SMLAxy; instruction->type = ARM_SMLAxy;
RdHi = (opcode & 0xf0000) >> 16; RdHi = (opcode & 0xf0000) >> 16;
RdLow = (opcode & 0xf000) >> 12; RdLow = (opcode & 0xf000) >> 12;
@ -924,7 +924,7 @@ int evaluate_misc_instr(u32 opcode, u32 address, arm_instruction_t *instruction)
/* SMLAW<y> */ /* SMLAW<y> */
if (((opcode & 0x00600000) == 0x00100000) && (x == 0)) if (((opcode & 0x00600000) == 0x00100000) && (x == 0))
{ {
u8 Rd, Rm, Rs, Rn; uint8_t Rd, Rm, Rs, Rn;
instruction->type = ARM_SMLAWy; instruction->type = ARM_SMLAWy;
Rd = (opcode & 0xf0000) >> 16; Rd = (opcode & 0xf0000) >> 16;
Rm = (opcode & 0xf); Rm = (opcode & 0xf);
@ -939,7 +939,7 @@ int evaluate_misc_instr(u32 opcode, u32 address, arm_instruction_t *instruction)
/* SMUL<x><y> */ /* SMUL<x><y> */
if ((opcode & 0x00600000) == 0x00300000) if ((opcode & 0x00600000) == 0x00300000)
{ {
u8 Rd, Rm, Rs; uint8_t Rd, Rm, Rs;
instruction->type = ARM_SMULxy; instruction->type = ARM_SMULxy;
Rd = (opcode & 0xf0000) >> 16; Rd = (opcode & 0xf0000) >> 16;
Rm = (opcode & 0xf); Rm = (opcode & 0xf);
@ -953,7 +953,7 @@ int evaluate_misc_instr(u32 opcode, u32 address, arm_instruction_t *instruction)
/* SMULW<y> */ /* SMULW<y> */
if (((opcode & 0x00600000) == 0x00100000) && (x == 1)) if (((opcode & 0x00600000) == 0x00100000) && (x == 1))
{ {
u8 Rd, Rm, Rs; uint8_t Rd, Rm, Rs;
instruction->type = ARM_SMULWy; instruction->type = ARM_SMULWy;
Rd = (opcode & 0xf0000) >> 16; Rd = (opcode & 0xf0000) >> 16;
Rm = (opcode & 0xf); Rm = (opcode & 0xf);
@ -970,7 +970,7 @@ int evaluate_misc_instr(u32 opcode, u32 address, arm_instruction_t *instruction)
int evaluate_data_proc(u32 opcode, u32 address, arm_instruction_t *instruction) int evaluate_data_proc(u32 opcode, u32 address, arm_instruction_t *instruction)
{ {
u8 I, op, S, Rn, Rd; uint8_t I, op, S, Rn, Rd;
char *mnemonic = NULL; char *mnemonic = NULL;
char shifter_operand[32]; char shifter_operand[32];
@ -1055,8 +1055,8 @@ int evaluate_data_proc(u32 opcode, u32 address, arm_instruction_t *instruction)
if (I) /* immediate shifter operand (#<immediate>)*/ if (I) /* immediate shifter operand (#<immediate>)*/
{ {
u8 immed_8 = opcode & 0xff; uint8_t immed_8 = opcode & 0xff;
u8 rotate_imm = (opcode & 0xf00) >> 8; uint8_t rotate_imm = (opcode & 0xf00) >> 8;
u32 immediate; u32 immediate;
immediate = ror(immed_8, rotate_imm * 2); immediate = ror(immed_8, rotate_imm * 2);
@ -1068,13 +1068,13 @@ int evaluate_data_proc(u32 opcode, u32 address, arm_instruction_t *instruction)
} }
else /* register-based shifter operand */ else /* register-based shifter operand */
{ {
u8 shift, Rm; uint8_t shift, Rm;
shift = (opcode & 0x60) >> 5; shift = (opcode & 0x60) >> 5;
Rm = (opcode & 0xf); Rm = (opcode & 0xf);
if ((opcode & 0x10) != 0x10) /* Immediate shifts ("<Rm>" or "<Rm>, <shift> #<shift_immediate>") */ if ((opcode & 0x10) != 0x10) /* Immediate shifts ("<Rm>" or "<Rm>, <shift> #<shift_immediate>") */
{ {
u8 shift_imm; uint8_t shift_imm;
shift_imm = (opcode & 0xf80) >> 7; shift_imm = (opcode & 0xf80) >> 7;
instruction->info.data_proc.variant = 1; instruction->info.data_proc.variant = 1;
@ -1124,7 +1124,7 @@ int evaluate_data_proc(u32 opcode, u32 address, arm_instruction_t *instruction)
} }
else /* Register shifts ("<Rm>, <shift> <Rs>") */ else /* Register shifts ("<Rm>, <shift> <Rs>") */
{ {
u8 Rs = (opcode & 0xf00) >> 8; uint8_t Rs = (opcode & 0xf00) >> 8;
instruction->info.data_proc.variant = 2; instruction->info.data_proc.variant = 2;
instruction->info.data_proc.shifter_operand.register_shift.Rm = Rm; instruction->info.data_proc.shifter_operand.register_shift.Rm = Rm;
@ -1368,9 +1368,9 @@ int evaluate_b_bl_blx_thumb(u16 opcode, u32 address, arm_instruction_t *instruct
int evaluate_add_sub_thumb(u16 opcode, u32 address, arm_instruction_t *instruction) int evaluate_add_sub_thumb(u16 opcode, u32 address, arm_instruction_t *instruction)
{ {
u8 Rd = (opcode >> 0) & 0x7; uint8_t Rd = (opcode >> 0) & 0x7;
u8 Rn = (opcode >> 3) & 0x7; uint8_t Rn = (opcode >> 3) & 0x7;
u8 Rm_imm = (opcode >> 6) & 0x7; uint8_t Rm_imm = (opcode >> 6) & 0x7;
u32 opc = opcode & (1<<9); u32 opc = opcode & (1<<9);
u32 reg_imm = opcode & (1<<10); u32 reg_imm = opcode & (1<<10);
char *mnemonic; char *mnemonic;
@ -1410,10 +1410,10 @@ int evaluate_add_sub_thumb(u16 opcode, u32 address, arm_instruction_t *instructi
int evaluate_shift_imm_thumb(u16 opcode, u32 address, arm_instruction_t *instruction) int evaluate_shift_imm_thumb(u16 opcode, u32 address, arm_instruction_t *instruction)
{ {
u8 Rd = (opcode >> 0) & 0x7; uint8_t Rd = (opcode >> 0) & 0x7;
u8 Rm = (opcode >> 3) & 0x7; uint8_t Rm = (opcode >> 3) & 0x7;
u8 imm = (opcode >> 6) & 0x1f; uint8_t imm = (opcode >> 6) & 0x1f;
u8 opc = (opcode >> 11) & 0x3; uint8_t opc = (opcode >> 11) & 0x3;
char *mnemonic = NULL; char *mnemonic = NULL;
switch(opc) switch(opc)
@ -1454,8 +1454,8 @@ int evaluate_shift_imm_thumb(u16 opcode, u32 address, arm_instruction_t *instruc
int evaluate_data_proc_imm_thumb(u16 opcode, u32 address, arm_instruction_t *instruction) int evaluate_data_proc_imm_thumb(u16 opcode, u32 address, arm_instruction_t *instruction)
{ {
u8 imm = opcode & 0xff; uint8_t imm = opcode & 0xff;
u8 Rd = (opcode >> 8) & 0x7; uint8_t Rd = (opcode >> 8) & 0x7;
u32 opc = (opcode >> 11) & 0x3; u32 opc = (opcode >> 11) & 0x3;
char *mnemonic = NULL; char *mnemonic = NULL;
@ -1495,7 +1495,7 @@ int evaluate_data_proc_imm_thumb(u16 opcode, u32 address, arm_instruction_t *ins
int evaluate_data_proc_thumb(u16 opcode, u32 address, arm_instruction_t *instruction) int evaluate_data_proc_thumb(u16 opcode, u32 address, arm_instruction_t *instruction)
{ {
u8 high_reg, op, Rm, Rd,H1,H2; uint8_t high_reg, op, Rm, Rd,H1,H2;
char *mnemonic = NULL; char *mnemonic = NULL;
high_reg = (opcode & 0x0400) >> 10; high_reg = (opcode & 0x0400) >> 10;
@ -1655,7 +1655,7 @@ int evaluate_data_proc_thumb(u16 opcode, u32 address, arm_instruction_t *instruc
int evaluate_load_literal_thumb(u16 opcode, u32 address, arm_instruction_t *instruction) int evaluate_load_literal_thumb(u16 opcode, u32 address, arm_instruction_t *instruction)
{ {
u32 immediate; u32 immediate;
u8 Rd = (opcode >> 8) & 0x7; uint8_t Rd = (opcode >> 8) & 0x7;
instruction->type = ARM_LDR; instruction->type = ARM_LDR;
immediate = opcode & 0x000000ff; immediate = opcode & 0x000000ff;
@ -1673,10 +1673,10 @@ int evaluate_load_literal_thumb(u16 opcode, u32 address, arm_instruction_t *inst
int evaluate_load_store_reg_thumb(u16 opcode, u32 address, arm_instruction_t *instruction) int evaluate_load_store_reg_thumb(u16 opcode, u32 address, arm_instruction_t *instruction)
{ {
u8 Rd = (opcode >> 0) & 0x7; uint8_t Rd = (opcode >> 0) & 0x7;
u8 Rn = (opcode >> 3) & 0x7; uint8_t Rn = (opcode >> 3) & 0x7;
u8 Rm = (opcode >> 6) & 0x7; uint8_t Rm = (opcode >> 6) & 0x7;
u8 opc = (opcode >> 9) & 0x7; uint8_t opc = (opcode >> 9) & 0x7;
char *mnemonic = NULL; char *mnemonic = NULL;
switch(opc) switch(opc)
@ -1729,8 +1729,8 @@ int evaluate_load_store_reg_thumb(u16 opcode, u32 address, arm_instruction_t *in
int evaluate_load_store_imm_thumb(u16 opcode, u32 address, arm_instruction_t *instruction) int evaluate_load_store_imm_thumb(u16 opcode, u32 address, arm_instruction_t *instruction)
{ {
u32 offset = (opcode >> 6) & 0x1f; u32 offset = (opcode >> 6) & 0x1f;
u8 Rd = (opcode >> 0) & 0x7; uint8_t Rd = (opcode >> 0) & 0x7;
u8 Rn = (opcode >> 3) & 0x7; uint8_t Rn = (opcode >> 3) & 0x7;
u32 L = opcode & (1<<11); u32 L = opcode & (1<<11);
u32 B = opcode & (1<<12); u32 B = opcode & (1<<12);
char *mnemonic; char *mnemonic;
@ -1773,7 +1773,7 @@ int evaluate_load_store_imm_thumb(u16 opcode, u32 address, arm_instruction_t *in
int evaluate_load_store_stack_thumb(u16 opcode, u32 address, arm_instruction_t *instruction) int evaluate_load_store_stack_thumb(u16 opcode, u32 address, arm_instruction_t *instruction)
{ {
u32 offset = opcode & 0xff; u32 offset = opcode & 0xff;
u8 Rd = (opcode >> 8) & 0x7; uint8_t Rd = (opcode >> 8) & 0x7;
u32 L = opcode & (1<<11); u32 L = opcode & (1<<11);
char *mnemonic; char *mnemonic;
@ -1802,8 +1802,8 @@ int evaluate_load_store_stack_thumb(u16 opcode, u32 address, arm_instruction_t *
int evaluate_add_sp_pc_thumb(u16 opcode, u32 address, arm_instruction_t *instruction) int evaluate_add_sp_pc_thumb(u16 opcode, u32 address, arm_instruction_t *instruction)
{ {
u32 imm = opcode & 0xff; u32 imm = opcode & 0xff;
u8 Rd = (opcode >> 8) & 0x7; uint8_t Rd = (opcode >> 8) & 0x7;
u8 Rn; uint8_t Rn;
u32 SP = opcode & (1<<11); u32 SP = opcode & (1<<11);
char *reg_name; char *reg_name;
@ -1833,7 +1833,7 @@ int evaluate_add_sp_pc_thumb(u16 opcode, u32 address, arm_instruction_t *instruc
int evaluate_adjust_stack_thumb(u16 opcode, u32 address, arm_instruction_t *instruction) int evaluate_adjust_stack_thumb(u16 opcode, u32 address, arm_instruction_t *instruction)
{ {
u32 imm = opcode & 0x7f; u32 imm = opcode & 0x7f;
u8 opc = opcode & (1<<7); uint8_t opc = opcode & (1<<7);
char *mnemonic; char *mnemonic;
@ -1874,8 +1874,8 @@ int evaluate_load_store_multiple_thumb(u16 opcode, u32 address, arm_instruction_
u32 reg_list = opcode & 0xff; u32 reg_list = opcode & 0xff;
u32 L = opcode & (1<<11); u32 L = opcode & (1<<11);
u32 R = opcode & (1<<8); u32 R = opcode & (1<<8);
u8 Rn = (opcode >> 8) & 7; uint8_t Rn = (opcode >> 8) & 7;
u8 addr_mode = 0 /* IA */; uint8_t addr_mode = 0 /* IA */;
char reg_names[40]; char reg_names[40];
char *reg_names_p; char *reg_names_p;
char *mnemonic; char *mnemonic;
@ -1939,7 +1939,7 @@ int evaluate_load_store_multiple_thumb(u16 opcode, u32 address, arm_instruction_
int evaluate_cond_branch_thumb(u16 opcode, u32 address, arm_instruction_t *instruction) int evaluate_cond_branch_thumb(u16 opcode, u32 address, arm_instruction_t *instruction)
{ {
u32 offset = opcode & 0xff; u32 offset = opcode & 0xff;
u8 cond = (opcode >> 8) & 0xf; uint8_t cond = (opcode >> 8) & 0xf;
u32 target_address; u32 target_address;
if (cond == 0xf) if (cond == 0xf)

38
src/target/arm_disassembler.h
View File

@ -132,51 +132,51 @@ union arm_shifter_operand
u32 immediate; u32 immediate;
} immediate; } immediate;
struct { struct {
u8 Rm; uint8_t Rm;
u8 shift; /* 0: LSL, 1: LSR, 2: ASR, 3: ROR, 4: RRX */ uint8_t shift; /* 0: LSL, 1: LSR, 2: ASR, 3: ROR, 4: RRX */
u8 shift_imm; uint8_t shift_imm;
} immediate_shift; } immediate_shift;
struct { struct {
u8 Rm; uint8_t Rm;
u8 shift; uint8_t shift;
u8 Rs; uint8_t Rs;
} register_shift; } register_shift;
}; };
typedef struct arm_data_proc_instr_s typedef struct arm_data_proc_instr_s
{ {
int variant; /* 0: immediate, 1: immediate_shift, 2: register_shift */ int variant; /* 0: immediate, 1: immediate_shift, 2: register_shift */
u8 S; uint8_t S;
u8 Rn; uint8_t Rn;
u8 Rd; uint8_t Rd;
union arm_shifter_operand shifter_operand; union arm_shifter_operand shifter_operand;
} arm_data_proc_instr_t; } arm_data_proc_instr_t;
typedef struct arm_load_store_instr_s typedef struct arm_load_store_instr_s
{ {
u8 Rd; uint8_t Rd;
u8 Rn; uint8_t Rn;
u8 U; uint8_t U;
int index_mode; /* 0: offset, 1: pre-indexed, 2: post-indexed */ int index_mode; /* 0: offset, 1: pre-indexed, 2: post-indexed */
int offset_mode; /* 0: immediate, 1: (scaled) register */ int offset_mode; /* 0: immediate, 1: (scaled) register */
union union
{ {
u32 offset; u32 offset;
struct { struct {
u8 Rm; uint8_t Rm;
u8 shift; /* 0: LSL, 1: LSR, 2: ASR, 3: ROR, 4: RRX */ uint8_t shift; /* 0: LSL, 1: LSR, 2: ASR, 3: ROR, 4: RRX */
u8 shift_imm; uint8_t shift_imm;
} reg; } reg;
} offset; } offset;
} arm_load_store_instr_t; } arm_load_store_instr_t;
typedef struct arm_load_store_multiple_instr_s typedef struct arm_load_store_multiple_instr_s
{ {
u8 Rn; uint8_t Rn;
u32 register_list; u32 register_list;
u8 addressing_mode; /* 0: IA, 1: IB, 2: DA, 3: DB */ uint8_t addressing_mode; /* 0: IA, 1: IB, 2: DA, 3: DB */
u8 S; uint8_t S;
u8 W; uint8_t W;
} arm_load_store_multiple_instr_t; } arm_load_store_multiple_instr_t;
typedef struct arm_instruction_s typedef struct arm_instruction_s

50
src/target/arm_jtag.c
View File

@ -41,7 +41,7 @@ int arm_jtag_set_instr(arm_jtag_t *jtag_info, u32 new_instr, void *no_verify_ca
if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != new_instr) if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != new_instr)
{ {
scan_field_t field; scan_field_t field;
u8 t[4]; uint8_t t[4];
field.tap = tap; field.tap = tap;
field.num_bits = tap->ir_length; field.num_bits = tap->ir_length;
@ -116,7 +116,7 @@ int arm_jtag_setup_connection(arm_jtag_t *jtag_info)
} }
/* read JTAG buffer into host-endian u32, flipping bit-order */ /* read JTAG buffer into host-endian u32, flipping bit-order */
int arm_jtag_buf_to_u32_flip(u8 *in_buf, void *priv, struct scan_field_s *field) int arm_jtag_buf_to_u32_flip(uint8_t *in_buf, void *priv, struct scan_field_s *field)
{ {
u32 *dest = priv; u32 *dest = priv;
*dest = flip_u32(le_to_h_u32(in_buf), 32); *dest = flip_u32(le_to_h_u32(in_buf), 32);
@ -124,44 +124,44 @@ int arm_jtag_buf_to_u32_flip(u8 *in_buf, void *priv, struct scan_field_s *field)
} }
/* read JTAG buffer into little-endian u32, flipping bit-order */ /* read JTAG buffer into little-endian u32, flipping bit-order */
int arm_jtag_buf_to_le32_flip(u8 *in_buf, void *priv, struct scan_field_s *field) int arm_jtag_buf_to_le32_flip(uint8_t *in_buf, void *priv, struct scan_field_s *field)
{ {
h_u32_to_le(((u8*)priv), flip_u32(le_to_h_u32(in_buf), 32)); h_u32_to_le(((uint8_t*)priv), flip_u32(le_to_h_u32(in_buf), 32));
return ERROR_OK; return ERROR_OK;
} }
/* read JTAG buffer into little-endian u16, flipping bit-order */ /* read JTAG buffer into little-endian u16, flipping bit-order */
int arm_jtag_buf_to_le16_flip(u8 *in_buf, void *priv, struct scan_field_s *field) int arm_jtag_buf_to_le16_flip(uint8_t *in_buf, void *priv, struct scan_field_s *field)
{ {
h_u16_to_le(((u8*)priv), flip_u32(le_to_h_u32(in_buf), 32) & 0xffff); h_u16_to_le(((uint8_t*)priv), flip_u32(le_to_h_u32(in_buf), 32) & 0xffff);
return ERROR_OK; return ERROR_OK;
} }
/* read JTAG buffer into big-endian u32, flipping bit-order */ /* read JTAG buffer into big-endian u32, flipping bit-order */
int arm_jtag_buf_to_be32_flip(u8 *in_buf, void *priv, struct scan_field_s *field) int arm_jtag_buf_to_be32_flip(uint8_t *in_buf, void *priv, struct scan_field_s *field)
{ {
h_u32_to_be(((u8*)priv), flip_u32(le_to_h_u32(in_buf), 32)); h_u32_to_be(((uint8_t*)priv), flip_u32(le_to_h_u32(in_buf), 32));
return ERROR_OK; return ERROR_OK;
} }
/* read JTAG buffer into big-endian u16, flipping bit-order */ /* read JTAG buffer into big-endian u16, flipping bit-order */
int arm_jtag_buf_to_be16_flip(u8 *in_buf, void *priv, struct scan_field_s *field) int arm_jtag_buf_to_be16_flip(uint8_t *in_buf, void *priv, struct scan_field_s *field)
{ {
h_u16_to_be(((u8*)priv), flip_u32(le_to_h_u32(in_buf), 32) & 0xffff); h_u16_to_be(((uint8_t*)priv), flip_u32(le_to_h_u32(in_buf), 32) & 0xffff);
return ERROR_OK; return ERROR_OK;
} }
/* read JTAG buffer into u8, flipping bit-order */ /* read JTAG buffer into uint8_t, flipping bit-order */
int arm_jtag_buf_to_8_flip(u8 *in_buf, void *priv, struct scan_field_s *field) int arm_jtag_buf_to_8_flip(uint8_t *in_buf, void *priv, struct scan_field_s *field)
{ {
u8 *dest = priv; uint8_t *dest = priv;
*dest = flip_u32(le_to_h_u32(in_buf), 32) & 0xff; *dest = flip_u32(le_to_h_u32(in_buf), 32) & 0xff;
return ERROR_OK; return ERROR_OK;
} }
/* not-flipping variants */ /* not-flipping variants */
/* read JTAG buffer into host-endian u32 */ /* read JTAG buffer into host-endian u32 */
int arm_jtag_buf_to_u32(u8 *in_buf, void *priv, struct scan_field_s *field) int arm_jtag_buf_to_u32(uint8_t *in_buf, void *priv, struct scan_field_s *field)
{ {
u32 *dest = priv; u32 *dest = priv;
*dest = le_to_h_u32(in_buf); *dest = le_to_h_u32(in_buf);
@ -169,37 +169,37 @@ int arm_jtag_buf_to_u32(u8 *in_buf, void *priv, struct scan_field_s *field)
} }
/* read JTAG buffer into little-endian u32 */ /* read JTAG buffer into little-endian u32 */
int arm_jtag_buf_to_le32(u8 *in_buf, void *priv, struct scan_field_s *field) int arm_jtag_buf_to_le32(uint8_t *in_buf, void *priv, struct scan_field_s *field)
{ {
h_u32_to_le(((u8*)priv), le_to_h_u32(in_buf)); h_u32_to_le(((uint8_t*)priv), le_to_h_u32(in_buf));
return ERROR_OK; return ERROR_OK;
} }
/* read JTAG buffer into little-endian u16 */ /* read JTAG buffer into little-endian u16 */
int arm_jtag_buf_to_le16(u8 *in_buf, void *priv, struct scan_field_s *field) int arm_jtag_buf_to_le16(uint8_t *in_buf, void *priv, struct scan_field_s *field)
{ {
h_u16_to_le(((u8*)priv), le_to_h_u32(in_buf) & 0xffff); h_u16_to_le(((uint8_t*)priv), le_to_h_u32(in_buf) & 0xffff);
return ERROR_OK; return ERROR_OK;
} }
/* read JTAG buffer into big-endian u32 */ /* read JTAG buffer into big-endian u32 */
int arm_jtag_buf_to_be32(u8 *in_buf, void *priv, struct scan_field_s *field) int arm_jtag_buf_to_be32(uint8_t *in_buf, void *priv, struct scan_field_s *field)
{ {
h_u32_to_be(((u8*)priv), le_to_h_u32(in_buf)); h_u32_to_be(((uint8_t*)priv), le_to_h_u32(in_buf));
return ERROR_OK; return ERROR_OK;
} }
/* read JTAG buffer into big-endian u16 */ /* read JTAG buffer into big-endian u16 */
int arm_jtag_buf_to_be16(u8 *in_buf, void *priv, struct scan_field_s *field) int arm_jtag_buf_to_be16(uint8_t *in_buf, void *priv, struct scan_field_s *field)
{ {
h_u16_to_be(((u8*)priv), le_to_h_u32(in_buf) & 0xffff); h_u16_to_be(((uint8_t*)priv), le_to_h_u32(in_buf) & 0xffff);
return ERROR_OK; return ERROR_OK;
} }
/* read JTAG buffer into u8 */ /* read JTAG buffer into uint8_t */
int arm_jtag_buf_to_8(u8 *in_buf, void *priv, struct scan_field_s *field) int arm_jtag_buf_to_8(uint8_t *in_buf, void *priv, struct scan_field_s *field)
{ {
u8 *dest = priv; uint8_t *dest = priv;
*dest = le_to_h_u32(in_buf) & 0xff; *dest = le_to_h_u32(in_buf) & 0xff;
return ERROR_OK; return ERROR_OK;
} }

28
src/target/arm_jtag.h
View File

@ -41,29 +41,29 @@ extern int arm_jtag_scann(arm_jtag_t *jtag_info, u32 new_scan_chain);
extern int arm_jtag_setup_connection(arm_jtag_t *jtag_info); extern int arm_jtag_setup_connection(arm_jtag_t *jtag_info);
/* JTAG buffers to host, be and le buffers, flipping variants */ /* JTAG buffers to host, be and le buffers, flipping variants */
int arm_jtag_buf_to_u32_flip(u8 *in_buf, void *priv, struct scan_field_s *field); int arm_jtag_buf_to_u32_flip(uint8_t *in_buf, void *priv, struct scan_field_s *field);
int arm_jtag_buf_to_le32_flip(u8 *in_buf, void *priv, struct scan_field_s *field); int arm_jtag_buf_to_le32_flip(uint8_t *in_buf, void *priv, struct scan_field_s *field);
int arm_jtag_buf_to_le16_flip(u8 *in_buf, void *priv, struct scan_field_s *field); int arm_jtag_buf_to_le16_flip(uint8_t *in_buf, void *priv, struct scan_field_s *field);
int arm_jtag_buf_to_be32_flip(u8 *in_buf, void *priv, struct scan_field_s *field); int arm_jtag_buf_to_be32_flip(uint8_t *in_buf, void *priv, struct scan_field_s *field);
int arm_jtag_buf_to_be16_flip(u8 *in_buf, void *priv, struct scan_field_s *field); int arm_jtag_buf_to_be16_flip(uint8_t *in_buf, void *priv, struct scan_field_s *field);
int arm_jtag_buf_to_8_flip(u8 *in_buf, void *priv, struct scan_field_s *field); int arm_jtag_buf_to_8_flip(uint8_t *in_buf, void *priv, struct scan_field_s *field);
/* JTAG buffers to host, be and le buffers */ /* JTAG buffers to host, be and le buffers */
int arm_jtag_buf_to_u32(u8 *in_buf, void *priv, struct scan_field_s *field); int arm_jtag_buf_to_u32(uint8_t *in_buf, void *priv, struct scan_field_s *field);
int arm_jtag_buf_to_le32(u8 *in_buf, void *priv, struct scan_field_s *field); int arm_jtag_buf_to_le32(uint8_t *in_buf, void *priv, struct scan_field_s *field);
int arm_jtag_buf_to_le16(u8 *in_buf, void *priv, struct scan_field_s *field); int arm_jtag_buf_to_le16(uint8_t *in_buf, void *priv, struct scan_field_s *field);
int arm_jtag_buf_to_be32(u8 *in_buf, void *priv, struct scan_field_s *field); int arm_jtag_buf_to_be32(uint8_t *in_buf, void *priv, struct scan_field_s *field);
int arm_jtag_buf_to_be16(u8 *in_buf, void *priv, struct scan_field_s *field); int arm_jtag_buf_to_be16(uint8_t *in_buf, void *priv, struct scan_field_s *field);
int arm_jtag_buf_to_8(u8 *in_buf, void *priv, struct scan_field_s *field); int arm_jtag_buf_to_8(uint8_t *in_buf, void *priv, struct scan_field_s *field);
/* use this as a static so we can inline it in -O3 and refer to it via a pointer */ /* use this as a static so we can inline it in -O3 and refer to it via a pointer */
static __inline__ void arm7flip32(u8 *in) static __inline__ void arm7flip32(uint8_t *in)
{ {
*((u32 *)in)=flip_u32(le_to_h_u32(in), 32); *((u32 *)in)=flip_u32(le_to_h_u32(in), 32);
} }
static __inline__ void arm_le_to_h_u32(u8 *in) static __inline__ void arm_le_to_h_u32(uint8_t *in)
{ {
*((u32 *)in)=le_to_h_u32(in); *((u32 *)in)=le_to_h_u32(in);
} }

14
src/target/arm_simulator.c
View File

@ -31,7 +31,7 @@
#include "binarybuffer.h" #include "binarybuffer.h"
u32 arm_shift(u8 shift, u32 Rm, u32 shift_amount, u8 *carry) u32 arm_shift(uint8_t shift, u32 Rm, u32 shift_amount, uint8_t *carry)
{ {
u32 return_value = 0; u32 return_value = 0;
shift_amount &= 0xff; shift_amount &= 0xff;
@ -122,7 +122,7 @@ u32 arm_shift(u8 shift, u32 Rm, u32 shift_amount, u8 *carry)
return return_value; return return_value;
} }
u32 arm_shifter_operand(armv4_5_common_t *armv4_5, int variant, union arm_shifter_operand shifter_operand, u8 *shifter_carry_out) u32 arm_shifter_operand(armv4_5_common_t *armv4_5, int variant, union arm_shifter_operand shifter_operand, uint8_t *shifter_carry_out)
{ {
u32 return_value; u32 return_value;
int instruction_size; int instruction_size;
@ -409,8 +409,8 @@ int arm_simulate_step(target_t *target, u32 *dry_run_pc)
|| ((instruction.type >= ARM_ORR) && (instruction.type <= ARM_MVN))) || ((instruction.type >= ARM_ORR) && (instruction.type <= ARM_MVN)))
{ {
u32 Rd, Rn, shifter_operand; u32 Rd, Rn, shifter_operand;
u8 C = buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 29, 1); uint8_t C = buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 29, 1);
u8 carry_out; uint8_t carry_out;
Rd = 0x0; Rd = 0x0;
/* ARM_MOV and ARM_MVN does not use Rn */ /* ARM_MOV and ARM_MVN does not use Rn */
@ -509,9 +509,9 @@ int arm_simulate_step(target_t *target, u32 *dry_run_pc)
{ {
u32 offset; u32 offset;
u32 Rm = buf_get_u32(ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, instruction.info.load_store.offset.reg.Rm).value, 0, 32); u32 Rm = buf_get_u32(ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, instruction.info.load_store.offset.reg.Rm).value, 0, 32);
u8 shift = instruction.info.load_store.offset.reg.shift; uint8_t shift = instruction.info.load_store.offset.reg.shift;
u8 shift_imm = instruction.info.load_store.offset.reg.shift_imm; uint8_t shift_imm = instruction.info.load_store.offset.reg.shift_imm;
u8 carry = buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 29, 1); uint8_t carry = buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 29, 1);
offset = arm_shift(shift, Rm, shift_imm, &carry); offset = arm_shift(shift, Rm, shift_imm, &carry);

6
src/target/armv4_5.c
View File

@ -153,14 +153,14 @@ int armv4_5_core_reg_map[7][17] =
} }
}; };
u8 armv4_5_gdb_dummy_fp_value[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; uint8_t armv4_5_gdb_dummy_fp_value[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
reg_t armv4_5_gdb_dummy_fp_reg = reg_t armv4_5_gdb_dummy_fp_reg =
{ {
"GDB dummy floating-point register", armv4_5_gdb_dummy_fp_value, 0, 1, 96, NULL, 0, NULL, 0 "GDB dummy floating-point register", armv4_5_gdb_dummy_fp_value, 0, 1, 96, NULL, 0, NULL, 0
}; };
u8 armv4_5_gdb_dummy_fps_value[] = {0, 0, 0, 0}; uint8_t armv4_5_gdb_dummy_fps_value[] = {0, 0, 0, 0};
reg_t armv4_5_gdb_dummy_fps_reg = reg_t armv4_5_gdb_dummy_fps_reg =
{ {
@ -185,7 +185,7 @@ int armv4_5_get_core_reg(reg_t *reg)
return retval; return retval;
} }
int armv4_5_set_core_reg(reg_t *reg, u8 *buf) int armv4_5_set_core_reg(reg_t *reg, uint8_t *buf)
{ {
armv4_5_core_reg_t *armv4_5 = reg->arch_info; armv4_5_core_reg_t *armv4_5 = reg->arch_info;
target_t *target = armv4_5->target; target_t *target = armv4_5->target;

18
src/target/armv4_5_mmu.c
View File

@ -40,8 +40,8 @@ u32 armv4_5_mmu_translate_va(target_t *target, armv4_5_mmu_common_t *armv4_5_mmu
armv4_5_mmu_read_physical(target, armv4_5_mmu, armv4_5_mmu_read_physical(target, armv4_5_mmu,
(ttb & 0xffffc000) | ((va & 0xfff00000) >> 18), (ttb & 0xffffc000) | ((va & 0xfff00000) >> 18),
4, 1, (u8*)&first_lvl_descriptor); 4, 1, (uint8_t*)&first_lvl_descriptor);
first_lvl_descriptor = target_buffer_get_u32(target, (u8*)&first_lvl_descriptor); first_lvl_descriptor = target_buffer_get_u32(target, (uint8_t*)&first_lvl_descriptor);
LOG_DEBUG("1st lvl desc: %8.8x", first_lvl_descriptor); LOG_DEBUG("1st lvl desc: %8.8x", first_lvl_descriptor);
@ -76,17 +76,17 @@ u32 armv4_5_mmu_translate_va(target_t *target, armv4_5_mmu_common_t *armv4_5_mmu
/* coarse page table */ /* coarse page table */
armv4_5_mmu_read_physical(target, armv4_5_mmu, armv4_5_mmu_read_physical(target, armv4_5_mmu,
(first_lvl_descriptor & 0xfffffc00) | ((va & 0x000ff000) >> 10), (first_lvl_descriptor & 0xfffffc00) | ((va & 0x000ff000) >> 10),
4, 1, (u8*)&second_lvl_descriptor); 4, 1, (uint8_t*)&second_lvl_descriptor);
} }
else if ((first_lvl_descriptor & 0x3) == 3) else if ((first_lvl_descriptor & 0x3) == 3)
{ {
/* fine page table */ /* fine page table */
armv4_5_mmu_read_physical(target, armv4_5_mmu, armv4_5_mmu_read_physical(target, armv4_5_mmu,
(first_lvl_descriptor & 0xfffff000) | ((va & 0x000ffc00) >> 8), (first_lvl_descriptor & 0xfffff000) | ((va & 0x000ffc00) >> 8),
4, 1, (u8*)&second_lvl_descriptor); 4, 1, (uint8_t*)&second_lvl_descriptor);
} }
second_lvl_descriptor = target_buffer_get_u32(target, (u8*)&second_lvl_descriptor); second_lvl_descriptor = target_buffer_get_u32(target, (uint8_t*)&second_lvl_descriptor);
LOG_DEBUG("2nd lvl desc: %8.8x", second_lvl_descriptor); LOG_DEBUG("2nd lvl desc: %8.8x", second_lvl_descriptor);
@ -130,7 +130,7 @@ u32 armv4_5_mmu_translate_va(target_t *target, armv4_5_mmu_common_t *armv4_5_mmu
return ERROR_TARGET_TRANSLATION_FAULT; return ERROR_TARGET_TRANSLATION_FAULT;
} }
int armv4_5_mmu_read_physical(target_t *target, armv4_5_mmu_common_t *armv4_5_mmu, u32 address, u32 size, u32 count, u8 *buffer) int armv4_5_mmu_read_physical(target_t *target, armv4_5_mmu_common_t *armv4_5_mmu, u32 address, u32 size, u32 count, uint8_t *buffer)
{ {
int retval; int retval;
@ -150,7 +150,7 @@ int armv4_5_mmu_read_physical(target_t *target, armv4_5_mmu_common_t *armv4_5_mm
return retval; return retval;
} }
int armv4_5_mmu_write_physical(target_t *target, armv4_5_mmu_common_t *armv4_5_mmu, u32 address, u32 size, u32 count, u8 *buffer) int armv4_5_mmu_write_physical(target_t *target, armv4_5_mmu_common_t *armv4_5_mmu, u32 address, u32 size, u32 count, uint8_t *buffer)
{ {
int retval; int retval;
@ -227,7 +227,7 @@ int armv4_5_mmu_handle_md_phys_command(command_context_t *cmd_ctx, char *cmd, ch
int retval; int retval;
u8 *buffer; uint8_t *buffer;
if (target->state != TARGET_HALTED) if (target->state != TARGET_HALTED)
{ {
@ -314,7 +314,7 @@ int armv4_5_mmu_handle_mw_phys_command(command_context_t *cmd_ctx, char *cmd, ch
u32 address = 0; u32 address = 0;
u32 value = 0; u32 value = 0;
int retval; int retval;
u8 value_buf[4]; uint8_t value_buf[4];
if (target->state != TARGET_HALTED) if (target->state != TARGET_HALTED)
{ {

8
src/target/armv4_5_mmu.h
View File

@ -26,8 +26,8 @@
typedef struct armv4_5_mmu_common_s typedef struct armv4_5_mmu_common_s
{ {
u32 (*get_ttb)(target_t *target); u32 (*get_ttb)(target_t *target);
int (*read_memory)(target_t *target, u32 address, u32 size, u32 count, u8 *buffer); int (*read_memory)(target_t *target, u32 address, u32 size, u32 count, uint8_t *buffer);
int (*write_memory)(target_t *target, u32 address, u32 size, u32 count, u8 *buffer); int (*write_memory)(target_t *target, u32 address, u32 size, u32 count, uint8_t *buffer);
void (*disable_mmu_caches)(target_t *target, int mmu, int d_u_cache, int i_cache); void (*disable_mmu_caches)(target_t *target, int mmu, int d_u_cache, int i_cache);
void (*enable_mmu_caches)(target_t *target, int mmu, int d_u_cache, int i_cache); void (*enable_mmu_caches)(target_t *target, int mmu, int d_u_cache, int i_cache);
armv4_5_cache_common_t armv4_5_cache; armv4_5_cache_common_t armv4_5_cache;
@ -43,8 +43,8 @@ enum
extern char* armv4_5_page_type_names[]; extern char* armv4_5_page_type_names[];
extern u32 armv4_5_mmu_translate_va(target_t *target, armv4_5_mmu_common_t *armv4_5_mmu, u32 va, int *type, u32 *cb, int *domain, u32 *ap); extern u32 armv4_5_mmu_translate_va(target_t *target, armv4_5_mmu_common_t *armv4_5_mmu, u32 va, int *type, u32 *cb, int *domain, u32 *ap);
extern int armv4_5_mmu_read_physical(target_t *target, armv4_5_mmu_common_t *armv4_5_mmu, u32 address, u32 size, u32 count, u8 *buffer); extern int armv4_5_mmu_read_physical(target_t *target, armv4_5_mmu_common_t *armv4_5_mmu, u32 address, u32 size, u32 count, uint8_t *buffer);
extern int armv4_5_mmu_write_physical(target_t *target, armv4_5_mmu_common_t *armv4_5_mmu, u32 address, u32 size, u32 count, u8 *buffer); extern int armv4_5_mmu_write_physical(target_t *target, armv4_5_mmu_common_t *armv4_5_mmu, u32 address, u32 size, u32 count, uint8_t *buffer);
extern int armv4_5_mmu_handle_virt2phys_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, target_t *target, armv4_5_mmu_common_t *armv4_5_mmu); extern int armv4_5_mmu_handle_virt2phys_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, target_t *target, armv4_5_mmu_common_t *armv4_5_mmu);
extern int armv4_5_mmu_handle_md_phys_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, target_t *target, armv4_5_mmu_common_t *armv4_5_mmu); extern int armv4_5_mmu_handle_md_phys_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, target_t *target, armv4_5_mmu_common_t *armv4_5_mmu);

8
src/target/armv7m.c
View File

@ -58,14 +58,14 @@ char* armv7m_core_reg_list[] =
"primask", "basepri", "faultmask", "control" "primask", "basepri", "faultmask", "control"
}; };
u8 armv7m_gdb_dummy_fp_value[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; uint8_t armv7m_gdb_dummy_fp_value[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
reg_t armv7m_gdb_dummy_fp_reg = reg_t armv7m_gdb_dummy_fp_reg =
{ {
"GDB dummy floating-point register", armv7m_gdb_dummy_fp_value, 0, 1, 96, NULL, 0, NULL, 0 "GDB dummy floating-point register", armv7m_gdb_dummy_fp_value, 0, 1, 96, NULL, 0, NULL, 0
}; };
u8 armv7m_gdb_dummy_fps_value[] = {0, 0, 0, 0}; uint8_t armv7m_gdb_dummy_fps_value[] = {0, 0, 0, 0};
reg_t armv7m_gdb_dummy_fps_reg = reg_t armv7m_gdb_dummy_fps_reg =
{ {
@ -73,7 +73,7 @@ reg_t armv7m_gdb_dummy_fps_reg =
}; };
#ifdef ARMV7_GDB_HACKS #ifdef ARMV7_GDB_HACKS
u8 armv7m_gdb_dummy_cpsr_value[] = {0, 0, 0, 0}; uint8_t armv7m_gdb_dummy_cpsr_value[] = {0, 0, 0, 0};
reg_t armv7m_gdb_dummy_cpsr_reg = reg_t armv7m_gdb_dummy_cpsr_reg =
{ {
@ -171,7 +171,7 @@ int armv7m_get_core_reg(reg_t *reg)
return retval; return retval;
} }
int armv7m_set_core_reg(reg_t *reg, u8 *buf) int armv7m_set_core_reg(reg_t *reg, uint8_t *buf)
{ {
armv7m_core_reg_t *armv7m_reg = reg->arch_info; armv7m_core_reg_t *armv7m_reg = reg->arch_info;
target_t *target = armv7m_reg->target; target_t *target = armv7m_reg->target;

28
src/target/avrt.c
View File

@ -47,13 +47,13 @@ int avr_deassert_reset(target_t *target);
int avr_soft_reset_halt(struct target_s *target); int avr_soft_reset_halt(struct target_s *target);
/* IR and DR functions */ /* IR and DR functions */
int avr_jtag_sendinstr(jtag_tap_t *tap, u8 *ir_in, u8 ir_out); int avr_jtag_sendinstr(jtag_tap_t *tap, uint8_t *ir_in, uint8_t ir_out);
int avr_jtag_senddat(jtag_tap_t *tap, u32 *dr_in, u32 dr_out, int len); int avr_jtag_senddat(jtag_tap_t *tap, u32 *dr_in, u32 dr_out, int len);
int mcu_write_ir(jtag_tap_t *tap, u8 *ir_in, u8 *ir_out, int ir_len, int rti); int mcu_write_ir(jtag_tap_t *tap, uint8_t *ir_in, uint8_t *ir_out, int ir_len, int rti);
int mcu_write_dr(jtag_tap_t *tap, u8 *dr_in, u8 *dr_out, int dr_len, int rti); int mcu_write_dr(jtag_tap_t *tap, uint8_t *dr_in, uint8_t *dr_out, int dr_len, int rti);
int mcu_write_ir_u8(jtag_tap_t *tap, u8 *ir_in, u8 ir_out, int ir_len, int rti); int mcu_write_ir_u8(jtag_tap_t *tap, uint8_t *ir_in, uint8_t ir_out, int ir_len, int rti);
int mcu_write_dr_u8(jtag_tap_t *tap, u8 *ir_in, u8 ir_out, int dr_len, int rti); int mcu_write_dr_u8(jtag_tap_t *tap, uint8_t *ir_in, uint8_t ir_out, int dr_len, int rti);
int mcu_write_ir_u16(jtag_tap_t *tap, u16 *ir_in, u16 ir_out, int ir_len, int rti); int mcu_write_ir_u16(jtag_tap_t *tap, u16 *ir_in, u16 ir_out, int ir_len, int rti);
int mcu_write_dr_u16(jtag_tap_t *tap, u16 *ir_in, u16 ir_out, int dr_len, int rti); int mcu_write_dr_u16(jtag_tap_t *tap, u16 *ir_in, u16 ir_out, int dr_len, int rti);
int mcu_write_ir_u32(jtag_tap_t *tap, u32 *ir_in, u32 ir_out, int ir_len, int rti); int mcu_write_ir_u32(jtag_tap_t *tap, u32 *ir_in, u32 ir_out, int ir_len, int rti);
@ -192,13 +192,13 @@ int avr_jtag_senddat(jtag_tap_t *tap, u32* dr_in, u32 dr_out, int len)
return mcu_write_dr_u32(tap, dr_in, dr_out, len, 1); return mcu_write_dr_u32(tap, dr_in, dr_out, len, 1);
} }
int avr_jtag_sendinstr(jtag_tap_t *tap, u8 *ir_in, u8 ir_out) int avr_jtag_sendinstr(jtag_tap_t *tap, uint8_t *ir_in, uint8_t ir_out)
{ {
return mcu_write_ir_u8(tap, ir_in, ir_out, AVR_JTAG_INS_LEN, 1); return mcu_write_ir_u8(tap, ir_in, ir_out, AVR_JTAG_INS_LEN, 1);
} }
/* IR and DR functions */ /* IR and DR functions */
int mcu_write_ir(jtag_tap_t *tap, u8 *ir_in, u8 *ir_out, int ir_len, int rti) int mcu_write_ir(jtag_tap_t *tap, uint8_t *ir_in, uint8_t *ir_out, int ir_len, int rti)
{ {
if (NULL == tap) if (NULL == tap)
{ {
@ -224,7 +224,7 @@ int mcu_write_ir(jtag_tap_t *tap, u8 *ir_in, u8 *ir_out, int ir_len, int rti)
return ERROR_OK; return ERROR_OK;
} }
int mcu_write_dr(jtag_tap_t *tap, u8 *dr_in, u8 *dr_out, int dr_len, int rti) int mcu_write_dr(jtag_tap_t *tap, uint8_t *dr_in, uint8_t *dr_out, int dr_len, int rti)
{ {
if (NULL == tap) if (NULL == tap)
{ {
@ -245,7 +245,7 @@ int mcu_write_dr(jtag_tap_t *tap, u8 *dr_in, u8 *dr_out, int dr_len, int rti)
return ERROR_OK; return ERROR_OK;
} }
int mcu_write_ir_u8(jtag_tap_t *tap, u8 *ir_in, u8 ir_out, int ir_len, int rti) int mcu_write_ir_u8(jtag_tap_t *tap, uint8_t *ir_in, uint8_t ir_out, int ir_len, int rti)
{ {
if (ir_len > 8) if (ir_len > 8)
{ {
@ -258,7 +258,7 @@ int mcu_write_ir_u8(jtag_tap_t *tap, u8 *ir_in, u8 ir_out, int ir_len, int rti)
return ERROR_OK; return ERROR_OK;
} }
int mcu_write_dr_u8(jtag_tap_t *tap, u8 *dr_in, u8 dr_out, int dr_len, int rti) int mcu_write_dr_u8(jtag_tap_t *tap, uint8_t *dr_in, uint8_t dr_out, int dr_len, int rti)
{ {
if (dr_len > 8) if (dr_len > 8)
{ {
@ -279,7 +279,7 @@ int mcu_write_ir_u16(jtag_tap_t *tap, u16 *ir_in, u16 ir_out, int ir_len, int rt
return ERROR_FAIL; return ERROR_FAIL;
} }
mcu_write_ir(tap, (u8*)ir_in, (u8*)&ir_out, ir_len, rti); mcu_write_ir(tap, (uint8_t*)ir_in, (uint8_t*)&ir_out, ir_len, rti);
return ERROR_OK; return ERROR_OK;
} }
@ -292,7 +292,7 @@ int mcu_write_dr_u16(jtag_tap_t *tap, u16 *dr_in, u16 dr_out, int dr_len, int rt
return ERROR_FAIL; return ERROR_FAIL;
} }
mcu_write_dr(tap, (u8*)dr_in, (u8*)&dr_out, dr_len, rti); mcu_write_dr(tap, (uint8_t*)dr_in, (uint8_t*)&dr_out, dr_len, rti);
return ERROR_OK; return ERROR_OK;
} }
@ -305,7 +305,7 @@ int mcu_write_ir_u32(jtag_tap_t *tap, u32 *ir_in, u32 ir_out, int ir_len, int rt
return ERROR_FAIL; return ERROR_FAIL;
} }
mcu_write_ir(tap, (u8*)ir_in, (u8*)&ir_out, ir_len, rti); mcu_write_ir(tap, (uint8_t*)ir_in, (uint8_t*)&ir_out, ir_len, rti);
return ERROR_OK; return ERROR_OK;
} }
@ -318,7 +318,7 @@ int mcu_write_dr_u32(jtag_tap_t *tap, u32 *dr_in, u32 dr_out, int dr_len, int rt
return ERROR_FAIL; return ERROR_FAIL;
} }
mcu_write_dr(tap, (u8*)dr_in, (u8*)&dr_out, dr_len, rti); mcu_write_dr(tap, (uint8_t*)dr_in, (uint8_t*)&dr_out, dr_len, rti);
return ERROR_OK; return ERROR_OK;
} }

2
src/target/breakpoints.h
View File

@ -41,7 +41,7 @@ typedef struct breakpoint_s
int length; int length;
enum breakpoint_type type; enum breakpoint_type type;
int set; int set;
u8 *orig_instr; uint8_t *orig_instr;
struct breakpoint_s *next; struct breakpoint_s *next;
} breakpoint_t; } breakpoint_t;

18
src/target/cortex_a8.c
View File

@ -83,13 +83,13 @@ target_type_t cortexa8_target =
.quit = NULL .quit = NULL
}; };
int cortex_a8_dcc_read(swjdp_common_t *swjdp, u8 *value, u8 *ctrl) int cortex_a8_dcc_read(swjdp_common_t *swjdp, uint8_t *value, uint8_t *ctrl)
{ {
u16 dcrdr; u16 dcrdr;
mem_ap_read_buf_u16( swjdp, (u8*)&dcrdr, 1, DCB_DCRDR); mem_ap_read_buf_u16( swjdp, (uint8_t*)&dcrdr, 1, DCB_DCRDR);
*ctrl = (u8)dcrdr; *ctrl = (uint8_t)dcrdr;
*value = (u8)(dcrdr >> 8); *value = (uint8_t)(dcrdr >> 8);
LOG_DEBUG("data 0x%x ctrl 0x%x", *value, *ctrl); LOG_DEBUG("data 0x%x ctrl 0x%x", *value, *ctrl);
@ -98,13 +98,13 @@ int cortex_a8_dcc_read(swjdp_common_t *swjdp, u8 *value, u8 *ctrl)
if (dcrdr & (1 << 0)) if (dcrdr & (1 << 0))
{ {
dcrdr = 0; dcrdr = 0;
mem_ap_write_buf_u16( swjdp, (u8*)&dcrdr, 1, DCB_DCRDR); mem_ap_write_buf_u16( swjdp, (uint8_t*)&dcrdr, 1, DCB_DCRDR);
} }
return ERROR_OK; return ERROR_OK;
} }
int cortex_a8_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer) int cortex_a8_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
{ {
/* get pointers to arch-specific information */ /* get pointers to arch-specific information */
armv7m_common_t *armv7m = target->arch_info; armv7m_common_t *armv7m = target->arch_info;
@ -136,7 +136,7 @@ int cortex_a8_read_memory(struct target_s *target, u32 address, u32 size, u32 co
return retval; return retval;
} }
int cortex_a8_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer) int cortex_a8_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
{ {
/* get pointers to arch-specific information */ /* get pointers to arch-specific information */
armv7m_common_t *armv7m = target->arch_info; armv7m_common_t *armv7m = target->arch_info;
@ -179,8 +179,8 @@ int cortex_a8_handle_target_request(void *priv)
if (target->state == TARGET_RUNNING) if (target->state == TARGET_RUNNING)
{ {
u8 data; uint8_t data;
u8 ctrl; uint8_t ctrl;
cortex_a8_dcc_read(swjdp, &data, &ctrl); cortex_a8_dcc_read(swjdp, &data, &ctrl);

4
src/target/cortex_a8.h
View File

@ -93,7 +93,7 @@ typedef struct cortex_a8_common_s
} cortex_a8_common_t; } cortex_a8_common_t;
extern int cortex_a8_init_arch_info(target_t *target, cortex_a8_common_t *cortex_a8, jtag_tap_t *tap); extern int cortex_a8_init_arch_info(target_t *target, cortex_a8_common_t *cortex_a8, jtag_tap_t *tap);
int cortex_a8_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer); int cortex_a8_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
int cortex_a8_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer); int cortex_a8_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
#endif /* CORTEX_A8_H */ #endif /* CORTEX_A8_H */

48
src/target/cortex_m3.c
View File

@ -48,11 +48,11 @@ int cortex_m3_init_target(struct command_context_s *cmd_ctx, struct target_s *ta
int cortex_m3_quit(void); int cortex_m3_quit(void);
int cortex_m3_load_core_reg_u32(target_t *target, enum armv7m_regtype type, u32 num, u32 *value); int cortex_m3_load_core_reg_u32(target_t *target, enum armv7m_regtype type, u32 num, u32 *value);
int cortex_m3_store_core_reg_u32(target_t *target, enum armv7m_regtype type, u32 num, u32 value); int cortex_m3_store_core_reg_u32(target_t *target, enum armv7m_regtype type, u32 num, u32 value);
int cortex_m3_target_request_data(target_t *target, u32 size, u8 *buffer); int cortex_m3_target_request_data(target_t *target, u32 size, uint8_t *buffer);
int cortex_m3_examine(struct target_s *target); int cortex_m3_examine(struct target_s *target);
#ifdef ARMV7_GDB_HACKS #ifdef ARMV7_GDB_HACKS
extern u8 armv7m_gdb_dummy_cpsr_value[]; extern uint8_t armv7m_gdb_dummy_cpsr_value[];
extern reg_t armv7m_gdb_dummy_cpsr_reg; extern reg_t armv7m_gdb_dummy_cpsr_reg;
#endif #endif
@ -930,7 +930,7 @@ int cortex_m3_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
} }
else if (breakpoint->type == BKPT_SOFT) else if (breakpoint->type == BKPT_SOFT)
{ {
u8 code[4]; uint8_t code[4];
buf_set_u32(code, 0, 32, ARMV7M_T_BKPT(0x11)); buf_set_u32(code, 0, 32, ARMV7M_T_BKPT(0x11));
if((retval = target_read_memory(target, breakpoint->address & 0xFFFFFFFE, breakpoint->length, 1, breakpoint->orig_instr)) != ERROR_OK) if((retval = target_read_memory(target, breakpoint->address & 0xFFFFFFFE, breakpoint->length, 1, breakpoint->orig_instr)) != ERROR_OK)
{ {
@ -1245,19 +1245,19 @@ int cortex_m3_load_core_reg_u32(struct target_s *target, enum armv7m_regtype typ
switch (num) switch (num)
{ {
case 19: case 19:
*value = buf_get_u32((u8*)value, 0, 8); *value = buf_get_u32((uint8_t*)value, 0, 8);
break; break;
case 20: case 20:
*value = buf_get_u32((u8*)value, 8, 8); *value = buf_get_u32((uint8_t*)value, 8, 8);
break; break;
case 21: case 21:
*value = buf_get_u32((u8*)value, 16, 8); *value = buf_get_u32((uint8_t*)value, 16, 8);
break; break;
case 22: case 22:
*value = buf_get_u32((u8*)value, 24, 8); *value = buf_get_u32((uint8_t*)value, 24, 8);
break; break;
} }
@ -1311,19 +1311,19 @@ int cortex_m3_store_core_reg_u32(struct target_s *target, enum armv7m_regtype ty
switch (num) switch (num)
{ {
case 19: case 19:
buf_set_u32((u8*)&reg, 0, 8, value); buf_set_u32((uint8_t*)&reg, 0, 8, value);
break; break;
case 20: case 20:
buf_set_u32((u8*)&reg, 8, 8, value); buf_set_u32((uint8_t*)&reg, 8, 8, value);
break; break;
case 21: case 21:
buf_set_u32((u8*)&reg, 16, 8, value); buf_set_u32((uint8_t*)&reg, 16, 8, value);
break; break;
case 22: case 22:
buf_set_u32((u8*)&reg, 24, 8, value); buf_set_u32((uint8_t*)&reg, 24, 8, value);
break; break;
} }
@ -1339,7 +1339,7 @@ int cortex_m3_store_core_reg_u32(struct target_s *target, enum armv7m_regtype ty
return ERROR_OK; return ERROR_OK;
} }
int cortex_m3_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer) int cortex_m3_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
{ {
/* get pointers to arch-specific information */ /* get pointers to arch-specific information */
armv7m_common_t *armv7m = target->arch_info; armv7m_common_t *armv7m = target->arch_info;
@ -1371,7 +1371,7 @@ int cortex_m3_read_memory(struct target_s *target, u32 address, u32 size, u32 co
return retval; return retval;
} }
int cortex_m3_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer) int cortex_m3_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
{ {
/* get pointers to arch-specific information */ /* get pointers to arch-specific information */
armv7m_common_t *armv7m = target->arch_info; armv7m_common_t *armv7m = target->arch_info;
@ -1401,7 +1401,7 @@ int cortex_m3_write_memory(struct target_s *target, u32 address, u32 size, u32 c
return retval; return retval;
} }
int cortex_m3_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffer) int cortex_m3_bulk_write_memory(target_t *target, u32 address, u32 count, uint8_t *buffer)
{ {
return cortex_m3_write_memory(target, address, 4, count, buffer); return cortex_m3_write_memory(target, address, 4, count, buffer);
} }
@ -1487,13 +1487,13 @@ int cortex_m3_quit(void)
return ERROR_OK; return ERROR_OK;
} }
int cortex_m3_dcc_read(swjdp_common_t *swjdp, u8 *value, u8 *ctrl) int cortex_m3_dcc_read(swjdp_common_t *swjdp, uint8_t *value, uint8_t *ctrl)
{ {
u16 dcrdr; u16 dcrdr;
mem_ap_read_buf_u16( swjdp, (u8*)&dcrdr, 1, DCB_DCRDR); mem_ap_read_buf_u16( swjdp, (uint8_t*)&dcrdr, 1, DCB_DCRDR);
*ctrl = (u8)dcrdr; *ctrl = (uint8_t)dcrdr;
*value = (u8)(dcrdr >> 8); *value = (uint8_t)(dcrdr >> 8);
LOG_DEBUG("data 0x%x ctrl 0x%x", *value, *ctrl); LOG_DEBUG("data 0x%x ctrl 0x%x", *value, *ctrl);
@ -1502,18 +1502,18 @@ int cortex_m3_dcc_read(swjdp_common_t *swjdp, u8 *value, u8 *ctrl)
if (dcrdr & (1 << 0)) if (dcrdr & (1 << 0))
{ {
dcrdr = 0; dcrdr = 0;
mem_ap_write_buf_u16( swjdp, (u8*)&dcrdr, 1, DCB_DCRDR); mem_ap_write_buf_u16( swjdp, (uint8_t*)&dcrdr, 1, DCB_DCRDR);
} }
return ERROR_OK; return ERROR_OK;
} }
int cortex_m3_target_request_data(target_t *target, u32 size, u8 *buffer) int cortex_m3_target_request_data(target_t *target, u32 size, uint8_t *buffer)
{ {
armv7m_common_t *armv7m = target->arch_info; armv7m_common_t *armv7m = target->arch_info;
swjdp_common_t *swjdp = &armv7m->swjdp_info; swjdp_common_t *swjdp = &armv7m->swjdp_info;
u8 data; uint8_t data;
u8 ctrl; uint8_t ctrl;
u32 i; u32 i;
for (i = 0; i < (size * 4); i++) for (i = 0; i < (size * 4); i++)
@ -1538,8 +1538,8 @@ int cortex_m3_handle_target_request(void *priv)
if (target->state == TARGET_RUNNING) if (target->state == TARGET_RUNNING)
{ {
u8 data; uint8_t data;
u8 ctrl; uint8_t ctrl;
cortex_m3_dcc_read(swjdp, &data, &ctrl); cortex_m3_dcc_read(swjdp, &data, &ctrl);

6
src/target/cortex_m3.h
View File

@ -177,9 +177,9 @@ int cortex_m3_assert_reset(target_t *target);
int cortex_m3_deassert_reset(target_t *target); int cortex_m3_deassert_reset(target_t *target);
int cortex_m3_soft_reset_halt(struct target_s *target); int cortex_m3_soft_reset_halt(struct target_s *target);
int cortex_m3_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer); int cortex_m3_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
int cortex_m3_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer); int cortex_m3_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
int cortex_m3_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffer); int cortex_m3_bulk_write_memory(target_t *target, u32 address, u32 count, uint8_t *buffer);
int cortex_m3_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint); int cortex_m3_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint);
int cortex_m3_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint); int cortex_m3_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint);

34
src/target/embeddedice.c
View File

@ -230,13 +230,13 @@ static int embeddedice_get_reg(reg_t *reg)
return ERROR_OK; return ERROR_OK;
} }
int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask) int embeddedice_read_reg_w_check(reg_t *reg, uint8_t* check_value, uint8_t* check_mask)
{ {
embeddedice_reg_t *ice_reg = reg->arch_info; embeddedice_reg_t *ice_reg = reg->arch_info;
u8 reg_addr = ice_reg->addr & 0x1f; uint8_t reg_addr = ice_reg->addr & 0x1f;
scan_field_t fields[3]; scan_field_t fields[3];
u8 field1_out[1]; uint8_t field1_out[1];
u8 field2_out[1]; uint8_t field2_out[1];
jtag_set_end_state(TAP_IDLE); jtag_set_end_state(TAP_IDLE);
arm_jtag_scann(ice_reg->jtag_info, 0x2); arm_jtag_scann(ice_reg->jtag_info, 0x2);
@ -290,8 +290,8 @@ int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
int embeddedice_receive(arm_jtag_t *jtag_info, u32 *data, u32 size) int embeddedice_receive(arm_jtag_t *jtag_info, u32 *data, u32 size)
{ {
scan_field_t fields[3]; scan_field_t fields[3];
u8 field1_out[1]; uint8_t field1_out[1];
u8 field2_out[1]; uint8_t field2_out[1];
jtag_set_end_state(TAP_IDLE); jtag_set_end_state(TAP_IDLE);
arm_jtag_scann(jtag_info, 0x2); arm_jtag_scann(jtag_info, 0x2);
@ -324,9 +324,9 @@ int embeddedice_receive(arm_jtag_t *jtag_info, u32 *data, u32 size)
if (size == 1) if (size == 1)
buf_set_u32(fields[1].out_value, 0, 5, embeddedice_reg_arch_info[EICE_COMMS_CTRL]); buf_set_u32(fields[1].out_value, 0, 5, embeddedice_reg_arch_info[EICE_COMMS_CTRL]);
fields[0].in_value = (u8 *)data; fields[0].in_value = (uint8_t *)data;
jtag_add_dr_scan(3, fields, jtag_get_end_state()); jtag_add_dr_scan(3, fields, jtag_get_end_state());
jtag_add_callback(arm_le_to_h_u32, (u8 *)data); jtag_add_callback(arm_le_to_h_u32, (uint8_t *)data);
data++; data++;
size--; size--;
@ -350,7 +350,7 @@ void embeddedice_set_reg(reg_t *reg, u32 value)
} }
int embeddedice_set_reg_w_exec(reg_t *reg, u8 *buf) int embeddedice_set_reg_w_exec(reg_t *reg, uint8_t *buf)
{ {
int retval; int retval;
embeddedice_set_reg(reg, buf_get_u32(buf, 0, reg->size)); embeddedice_set_reg(reg, buf_get_u32(buf, 0, reg->size));
@ -374,7 +374,7 @@ void embeddedice_write_reg(reg_t *reg, u32 value)
arm_jtag_set_instr(ice_reg->jtag_info, ice_reg->jtag_info->intest_instr, NULL); arm_jtag_set_instr(ice_reg->jtag_info, ice_reg->jtag_info->intest_instr, NULL);
u8 reg_addr = ice_reg->addr & 0x1f; uint8_t reg_addr = ice_reg->addr & 0x1f;
embeddedice_write_reg_inner(ice_reg->jtag_info->tap, reg_addr, value); embeddedice_write_reg_inner(ice_reg->jtag_info->tap, reg_addr, value);
} }
@ -391,9 +391,9 @@ void embeddedice_store_reg(reg_t *reg)
int embeddedice_send(arm_jtag_t *jtag_info, u32 *data, u32 size) int embeddedice_send(arm_jtag_t *jtag_info, u32 *data, u32 size)
{ {
scan_field_t fields[3]; scan_field_t fields[3];
u8 field0_out[4]; uint8_t field0_out[4];
u8 field1_out[1]; uint8_t field1_out[1];
u8 field2_out[1]; uint8_t field2_out[1];
jtag_set_end_state(TAP_IDLE); jtag_set_end_state(TAP_IDLE);
arm_jtag_scann(jtag_info, 0x2); arm_jtag_scann(jtag_info, 0x2);
@ -435,9 +435,9 @@ int embeddedice_send(arm_jtag_t *jtag_info, u32 *data, u32 size)
int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout) int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout)
{ {
scan_field_t fields[3]; scan_field_t fields[3];
u8 field0_in[4]; uint8_t field0_in[4];
u8 field1_out[1]; uint8_t field1_out[1];
u8 field2_out[1]; uint8_t field2_out[1];
int retval; int retval;
u32 hsact; u32 hsact;
struct timeval lap; struct timeval lap;
@ -491,7 +491,7 @@ int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout)
#ifndef HAVE_JTAG_MINIDRIVER_H #ifndef HAVE_JTAG_MINIDRIVER_H
/* this is the inner loop of the open loop DCC write of data to target */ /* this is the inner loop of the open loop DCC write of data to target */
void embeddedice_write_dcc(jtag_tap_t *tap, int reg_addr, u8 *buffer, int little, int count) void embeddedice_write_dcc(jtag_tap_t *tap, int reg_addr, uint8_t *buffer, int little, int count)
{ {
int i; int i;
for (i = 0; i < count; i++) for (i = 0; i < count; i++)

6
src/target/embeddedice.h
View File

@ -97,10 +97,10 @@ extern reg_cache_t* embeddedice_build_reg_cache(target_t *target, arm7_9_common_
extern int embeddedice_setup(target_t *target); extern int embeddedice_setup(target_t *target);
extern int embeddedice_read_reg(reg_t *reg); extern int embeddedice_read_reg(reg_t *reg);
extern void embeddedice_write_reg(reg_t *reg, u32 value); extern void embeddedice_write_reg(reg_t *reg, u32 value);
extern int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask); extern int embeddedice_read_reg_w_check(reg_t *reg, uint8_t* check_value, uint8_t* check_mask);
extern void embeddedice_store_reg(reg_t *reg); extern void embeddedice_store_reg(reg_t *reg);
extern void embeddedice_set_reg(reg_t *reg, u32 value); extern void embeddedice_set_reg(reg_t *reg, u32 value);
extern int embeddedice_set_reg_w_exec(reg_t *reg, u8 *buf); extern int embeddedice_set_reg_w_exec(reg_t *reg, uint8_t *buf);
extern int embeddedice_receive(arm_jtag_t *jtag_info, u32 *data, u32 size); extern int embeddedice_receive(arm_jtag_t *jtag_info, u32 *data, u32 size);
extern int embeddedice_send(arm_jtag_t *jtag_info, u32 *data, u32 size); extern int embeddedice_send(arm_jtag_t *jtag_info, u32 *data, u32 size);
extern int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout); extern int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout);
@ -124,6 +124,6 @@ static __inline__ void embeddedice_write_reg_inner( jtag_tap_t *tap, int reg_add
jtag_get_end_state()); jtag_get_end_state());
} }
void embeddedice_write_dcc(jtag_tap_t *tap, int reg_addr, u8 *buffer, int little, int count); void embeddedice_write_dcc(jtag_tap_t *tap, int reg_addr, uint8_t *buffer, int little, int count);
#endif /* EMBEDDED_ICE_H */ #endif /* EMBEDDED_ICE_H */

14
src/target/etb.c
View File

@ -158,7 +158,7 @@ static int etb_get_reg(reg_t *reg)
} }
static void etb_getbuf(u8 *in) static void etb_getbuf(uint8_t *in)
{ {
*((u32 *)in)=buf_get_u32(in, 0, 32); *((u32 *)in)=buf_get_u32(in, 0, 32);
} }
@ -203,10 +203,10 @@ static int etb_read_ram(etb_t *etb, u32 *data, int num_frames)
else else
buf_set_u32(fields[1].out_value, 0, 7, 0); buf_set_u32(fields[1].out_value, 0, 7, 0);
fields[0].in_value = (u8 *)(data+i); fields[0].in_value = (uint8_t *)(data+i);
jtag_add_dr_scan(3, fields, jtag_get_end_state()); jtag_add_dr_scan(3, fields, jtag_get_end_state());
jtag_add_callback(etb_getbuf, (u8 *)(data+i)); jtag_add_callback(etb_getbuf, (uint8_t *)(data+i));
} }
jtag_execute_queue(); jtag_execute_queue();
@ -217,10 +217,10 @@ static int etb_read_ram(etb_t *etb, u32 *data, int num_frames)
return ERROR_OK; return ERROR_OK;
} }
int etb_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask) int etb_read_reg_w_check(reg_t *reg, uint8_t* check_value, uint8_t* check_mask)
{ {
etb_reg_t *etb_reg = reg->arch_info; etb_reg_t *etb_reg = reg->arch_info;
u8 reg_addr = etb_reg->addr & 0x7f; uint8_t reg_addr = etb_reg->addr & 0x7f;
scan_field_t fields[3]; scan_field_t fields[3];
LOG_DEBUG("%i", etb_reg->addr); LOG_DEBUG("%i", etb_reg->addr);
@ -292,7 +292,7 @@ int etb_set_reg(reg_t *reg, u32 value)
return ERROR_OK; return ERROR_OK;
} }
int etb_set_reg_w_exec(reg_t *reg, u8 *buf) int etb_set_reg_w_exec(reg_t *reg, uint8_t *buf)
{ {
int retval; int retval;
@ -309,7 +309,7 @@ int etb_set_reg_w_exec(reg_t *reg, u8 *buf)
int etb_write_reg(reg_t *reg, u32 value) int etb_write_reg(reg_t *reg, u32 value)
{ {
etb_reg_t *etb_reg = reg->arch_info; etb_reg_t *etb_reg = reg->arch_info;
u8 reg_addr = etb_reg->addr & 0x7f; uint8_t reg_addr = etb_reg->addr & 0x7f;
scan_field_t fields[3]; scan_field_t fields[3];
LOG_DEBUG("%i: 0x%8.8x", etb_reg->addr, value); LOG_DEBUG("%i: 0x%8.8x", etb_reg->addr, value);

4
src/target/etb.h
View File

@ -59,9 +59,9 @@ extern etm_capture_driver_t etb_capture_driver;
extern reg_cache_t* etb_build_reg_cache(etb_t *etb); extern reg_cache_t* etb_build_reg_cache(etb_t *etb);
extern int etb_read_reg(reg_t *reg); extern int etb_read_reg(reg_t *reg);
extern int etb_write_reg(reg_t *reg, u32 value); extern int etb_write_reg(reg_t *reg, u32 value);
extern int etb_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask); extern int etb_read_reg_w_check(reg_t *reg, uint8_t* check_value, uint8_t* check_mask);
extern int etb_store_reg(reg_t *reg); extern int etb_store_reg(reg_t *reg);
extern int etb_set_reg(reg_t *reg, u32 value); extern int etb_set_reg(reg_t *reg, u32 value);
extern int etb_set_reg_w_exec(reg_t *reg, u8 *buf); extern int etb_set_reg_w_exec(reg_t *reg, uint8_t *buf);
#endif /* ETB_H */ #endif /* ETB_H */

28
src/target/etm.c
View File

@ -312,10 +312,10 @@ int etm_get_reg(reg_t *reg)
return ERROR_OK; return ERROR_OK;
} }
int etm_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask) int etm_read_reg_w_check(reg_t *reg, uint8_t* check_value, uint8_t* check_mask)
{ {
etm_reg_t *etm_reg = reg->arch_info; etm_reg_t *etm_reg = reg->arch_info;
u8 reg_addr = etm_reg->addr & 0x7f; uint8_t reg_addr = etm_reg->addr & 0x7f;
scan_field_t fields[3]; scan_field_t fields[3];
LOG_DEBUG("%i", etm_reg->addr); LOG_DEBUG("%i", etm_reg->addr);
@ -383,7 +383,7 @@ int etm_set_reg(reg_t *reg, u32 value)
return ERROR_OK; return ERROR_OK;
} }
int etm_set_reg_w_exec(reg_t *reg, u8 *buf) int etm_set_reg_w_exec(reg_t *reg, uint8_t *buf)
{ {
int retval; int retval;
@ -400,7 +400,7 @@ int etm_set_reg_w_exec(reg_t *reg, u8 *buf)
int etm_write_reg(reg_t *reg, u32 value) int etm_write_reg(reg_t *reg, u32 value)
{ {
etm_reg_t *etm_reg = reg->arch_info; etm_reg_t *etm_reg = reg->arch_info;
u8 reg_addr = etm_reg->addr & 0x7f; uint8_t reg_addr = etm_reg->addr & 0x7f;
scan_field_t fields[3]; scan_field_t fields[3];
LOG_DEBUG("%i: 0x%8.8x", etm_reg->addr, value); LOG_DEBUG("%i: 0x%8.8x", etm_reg->addr, value);
@ -411,21 +411,21 @@ int etm_write_reg(reg_t *reg, u32 value)
fields[0].tap = etm_reg->jtag_info->tap; fields[0].tap = etm_reg->jtag_info->tap;
fields[0].num_bits = 32; fields[0].num_bits = 32;
u8 tmp1[4]; uint8_t tmp1[4];
fields[0].out_value = tmp1; fields[0].out_value = tmp1;
buf_set_u32(fields[0].out_value, 0, 32, value); buf_set_u32(fields[0].out_value, 0, 32, value);
fields[0].in_value = NULL; fields[0].in_value = NULL;
fields[1].tap = etm_reg->jtag_info->tap; fields[1].tap = etm_reg->jtag_info->tap;
fields[1].num_bits = 7; fields[1].num_bits = 7;
u8 tmp2; uint8_t tmp2;
fields[1].out_value = &tmp2; fields[1].out_value = &tmp2;
buf_set_u32(fields[1].out_value, 0, 7, reg_addr); buf_set_u32(fields[1].out_value, 0, 7, reg_addr);
fields[1].in_value = NULL; fields[1].in_value = NULL;
fields[2].tap = etm_reg->jtag_info->tap; fields[2].tap = etm_reg->jtag_info->tap;
fields[2].num_bits = 1; fields[2].num_bits = 1;
u8 tmp3; uint8_t tmp3;
fields[2].out_value = &tmp3; fields[2].out_value = &tmp3;
buf_set_u32(fields[2].out_value, 0, 1, 1); buf_set_u32(fields[2].out_value, 0, 1, 1);
fields[2].in_value = NULL; fields[2].in_value = NULL;
@ -500,7 +500,7 @@ static int etm_read_instruction(etm_context_t *ctx, arm_instruction_t *instructi
if (ctx->core_state == ARMV4_5_STATE_ARM) if (ctx->core_state == ARMV4_5_STATE_ARM)
{ {
u8 buf[4]; uint8_t buf[4];
if ((retval = image_read_section(ctx->image, section, if ((retval = image_read_section(ctx->image, section,
ctx->current_pc - ctx->image->sections[section].base_address, ctx->current_pc - ctx->image->sections[section].base_address,
4, buf, &size_read)) != ERROR_OK) 4, buf, &size_read)) != ERROR_OK)
@ -513,7 +513,7 @@ static int etm_read_instruction(etm_context_t *ctx, arm_instruction_t *instructi
} }
else if (ctx->core_state == ARMV4_5_STATE_THUMB) else if (ctx->core_state == ARMV4_5_STATE_THUMB)
{ {
u8 buf[2]; uint8_t buf[2];
if ((retval = image_read_section(ctx->image, section, if ((retval = image_read_section(ctx->image, section,
ctx->current_pc - ctx->image->sections[section].base_address, ctx->current_pc - ctx->image->sections[section].base_address,
2, buf, &size_read)) != ERROR_OK) 2, buf, &size_read)) != ERROR_OK)
@ -538,7 +538,7 @@ static int etm_read_instruction(etm_context_t *ctx, arm_instruction_t *instructi
return ERROR_OK; return ERROR_OK;
} }
static int etmv1_next_packet(etm_context_t *ctx, u8 *packet, int apo) static int etmv1_next_packet(etm_context_t *ctx, uint8_t *packet, int apo)
{ {
while (ctx->data_index < ctx->trace_depth) while (ctx->data_index < ctx->trace_depth)
{ {
@ -606,7 +606,7 @@ static int etmv1_next_packet(etm_context_t *ctx, u8 *packet, int apo)
static int etmv1_branch_address(etm_context_t *ctx) static int etmv1_branch_address(etm_context_t *ctx)
{ {
int retval; int retval;
u8 packet; uint8_t packet;
int shift = 0; int shift = 0;
int apo; int apo;
u32 i; u32 i;
@ -692,7 +692,7 @@ static int etmv1_branch_address(etm_context_t *ctx)
static int etmv1_data(etm_context_t *ctx, int size, u32 *data) static int etmv1_data(etm_context_t *ctx, int size, u32 *data)
{ {
int j; int j;
u8 buf[4]; uint8_t buf[4];
int retval; int retval;
for (j = 0; j < size; j++) for (j = 0; j < size; j++)
@ -738,7 +738,7 @@ static int etmv1_analyze_trace(etm_context_t *ctx, struct command_context_s *cmd
while (ctx->pipe_index < ctx->trace_depth) while (ctx->pipe_index < ctx->trace_depth)
{ {
u8 pipestat = ctx->trace_data[ctx->pipe_index].pipestat; uint8_t pipestat = ctx->trace_data[ctx->pipe_index].pipestat;
u32 next_pc = ctx->current_pc; u32 next_pc = ctx->current_pc;
u32 old_data_index = ctx->data_index; u32 old_data_index = ctx->data_index;
u32 old_data_half = ctx->data_half; u32 old_data_half = ctx->data_half;
@ -901,7 +901,7 @@ static int etmv1_analyze_trace(etm_context_t *ctx, struct command_context_s *cmd
if (ctx->tracemode & ETMV1_TRACE_ADDR) if (ctx->tracemode & ETMV1_TRACE_ADDR)
{ {
u8 packet; uint8_t packet;
int shift = 0; int shift = 0;
do { do {

6
src/target/etm.h
View File

@ -127,7 +127,7 @@ enum
typedef struct etmv1_trace_data_s typedef struct etmv1_trace_data_s
{ {
u8 pipestat; /* bits 0-2 pipeline status */ uint8_t pipestat; /* bits 0-2 pipeline status */
u16 packet; /* packet data (4, 8 or 16 bit) */ u16 packet; /* packet data (4, 8 or 16 bit) */
int flags; /* ETMV1_TRACESYNC_CYCLE, ETMV1_TRIGGER_CYCLE */ int flags; /* ETMV1_TRACESYNC_CYCLE, ETMV1_TRIGGER_CYCLE */
} etmv1_trace_data_t; } etmv1_trace_data_t;
@ -195,10 +195,10 @@ extern char *etmv1v1_branch_reason_strings[];
extern reg_cache_t* etm_build_reg_cache(target_t *target, arm_jtag_t *jtag_info, etm_context_t *etm_ctx); extern reg_cache_t* etm_build_reg_cache(target_t *target, arm_jtag_t *jtag_info, etm_context_t *etm_ctx);
extern int etm_read_reg(reg_t *reg); extern int etm_read_reg(reg_t *reg);
extern int etm_write_reg(reg_t *reg, u32 value); extern int etm_write_reg(reg_t *reg, u32 value);
extern int etm_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask); extern int etm_read_reg_w_check(reg_t *reg, uint8_t* check_value, uint8_t* check_mask);
extern int etm_store_reg(reg_t *reg); extern int etm_store_reg(reg_t *reg);
extern int etm_set_reg(reg_t *reg, u32 value); extern int etm_set_reg(reg_t *reg, u32 value);
extern int etm_set_reg_w_exec(reg_t *reg, u8 *buf); extern int etm_set_reg_w_exec(reg_t *reg, uint8_t *buf);
extern int etm_setup(target_t *target); extern int etm_setup(target_t *target);
int etm_register_commands(struct command_context_s *cmd_ctx); int etm_register_commands(struct command_context_s *cmd_ctx);

16
src/target/feroceon.c
View File

@ -55,7 +55,7 @@
int feroceon_examine(struct target_s *target); int feroceon_examine(struct target_s *target);
int feroceon_target_create(struct target_s *target, Jim_Interp *interp); int feroceon_target_create(struct target_s *target, Jim_Interp *interp);
int feroceon_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffer); int feroceon_bulk_write_memory(target_t *target, u32 address, u32 count, uint8_t *buffer);
int feroceon_init_target(struct command_context_s *cmd_ctx, struct target_s *target); int feroceon_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
int feroceon_quit(void); int feroceon_quit(void);
@ -115,9 +115,9 @@ target_type_t feroceon_target =
int feroceon_dummy_clock_out(arm_jtag_t *jtag_info, u32 instr) int feroceon_dummy_clock_out(arm_jtag_t *jtag_info, u32 instr)
{ {
scan_field_t fields[3]; scan_field_t fields[3];
u8 out_buf[4]; uint8_t out_buf[4];
u8 instr_buf[4]; uint8_t instr_buf[4];
u8 sysspeed_buf = 0x0; uint8_t sysspeed_buf = 0x0;
/* prepare buffer */ /* prepare buffer */
buf_set_u32(out_buf, 0, 32, 0); buf_set_u32(out_buf, 0, 32, 0);
@ -240,7 +240,7 @@ void feroceon_read_core_regs_target_buffer(target_t *target, u32 mask, void* buf
int be = (target->endianness == TARGET_BIG_ENDIAN) ? 1 : 0; int be = (target->endianness == TARGET_BIG_ENDIAN) ? 1 : 0;
u32 *buf_u32 = buffer; u32 *buf_u32 = buffer;
u16 *buf_u16 = buffer; u16 *buf_u16 = buffer;
u8 *buf_u8 = buffer; uint8_t *buf_u8 = buffer;
arm9tdmi_clock_out(jtag_info, ARMV4_5_STMIA(0, mask & 0xffff, 0, 0), 0, NULL, 0); arm9tdmi_clock_out(jtag_info, ARMV4_5_STMIA(0, mask & 0xffff, 0, 0), 0, NULL, 0);
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0); arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
@ -332,7 +332,7 @@ void feroceon_write_xpsr(target_t *target, u32 xpsr, int spsr)
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0); arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
} }
void feroceon_write_xpsr_im8(target_t *target, u8 xpsr_im, int rot, int spsr) void feroceon_write_xpsr_im8(target_t *target, uint8_t xpsr_im, int rot, int spsr)
{ {
armv4_5_common_t *armv4_5 = target->arch_info; armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info; arm7_9_common_t *arm7_9 = armv4_5->arch_info;
@ -507,7 +507,7 @@ int feroceon_examine_debug_reason(target_t *target)
return ERROR_OK; return ERROR_OK;
} }
int feroceon_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffer) int feroceon_bulk_write_memory(target_t *target, u32 address, u32 count, uint8_t *buffer)
{ {
int retval; int retval;
armv4_5_common_t *armv4_5 = target->arch_info; armv4_5_common_t *armv4_5 = target->arch_info;
@ -552,7 +552,7 @@ int feroceon_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buf
/* regrab previously allocated working_area, or allocate a new one */ /* regrab previously allocated working_area, or allocate a new one */
if (!arm7_9->dcc_working_area) if (!arm7_9->dcc_working_area)
{ {
u8 dcc_code_buf[dcc_size]; uint8_t dcc_code_buf[dcc_size];
/* make sure we have a working area */ /* make sure we have a working area */
if (target_alloc_working_area(target, dcc_size, &arm7_9->dcc_working_area) != ERROR_OK) if (target_alloc_working_area(target, dcc_size, &arm7_9->dcc_working_area) != ERROR_OK)

98
src/target/image.c
View File

@ -35,18 +35,18 @@
/* convert ELF header field to host endianness */ /* convert ELF header field to host endianness */
#define field16(elf,field)\ #define field16(elf,field)\
((elf->endianness==ELFDATA2LSB)? \ ((elf->endianness==ELFDATA2LSB)? \
le_to_h_u16((u8*)&field):be_to_h_u16((u8*)&field)) le_to_h_u16((uint8_t*)&field):be_to_h_u16((uint8_t*)&field))
#define field32(elf,field)\ #define field32(elf,field)\
((elf->endianness==ELFDATA2LSB)? \ ((elf->endianness==ELFDATA2LSB)? \
le_to_h_u32((u8*)&field):be_to_h_u32((u8*)&field)) le_to_h_u32((uint8_t*)&field):be_to_h_u32((uint8_t*)&field))
static int autodetect_image_type(image_t *image, char *url) static int autodetect_image_type(image_t *image, char *url)
{ {
int retval; int retval;
fileio_t fileio; fileio_t fileio;
u32 read_bytes; u32 read_bytes;
u8 buffer[9]; uint8_t buffer[9];
/* read the first 4 bytes of image */ /* read the first 4 bytes of image */
if ((retval = fileio_open(&fileio, url, FILEIO_READ, FILEIO_BINARY)) != ERROR_OK) if ((retval = fileio_open(&fileio, url, FILEIO_READ, FILEIO_BINARY)) != ERROR_OK)
@ -171,7 +171,7 @@ static int image_ihex_buffer_complete(image_t *image)
u32 address; u32 address;
u32 record_type; u32 record_type;
u32 checksum; u32 checksum;
u8 cal_checksum = 0; uint8_t cal_checksum = 0;
u32 bytes_read = 0; u32 bytes_read = 0;
if (sscanf(&lpszLine[bytes_read], ":%2x%4x%2x", &count, &address, &record_type) != 3) if (sscanf(&lpszLine[bytes_read], ":%2x%4x%2x", &count, &address, &record_type) != 3)
@ -180,10 +180,10 @@ static int image_ihex_buffer_complete(image_t *image)
} }
bytes_read += 9; bytes_read += 9;
cal_checksum += (u8)count; cal_checksum += (uint8_t)count;
cal_checksum += (u8)(address >> 8); cal_checksum += (uint8_t)(address >> 8);
cal_checksum += (u8)address; cal_checksum += (uint8_t)address;
cal_checksum += (u8)record_type; cal_checksum += (uint8_t)record_type;
if (record_type == 0) /* Data Record */ if (record_type == 0) /* Data Record */
{ {
@ -209,8 +209,8 @@ static int image_ihex_buffer_complete(image_t *image)
{ {
unsigned value; unsigned value;
sscanf(&lpszLine[bytes_read], "%2x", &value); sscanf(&lpszLine[bytes_read], "%2x", &value);
ihex->buffer[cooked_bytes] = (u8)value; ihex->buffer[cooked_bytes] = (uint8_t)value;
cal_checksum += (u8)ihex->buffer[cooked_bytes]; cal_checksum += (uint8_t)ihex->buffer[cooked_bytes];
bytes_read += 2; bytes_read += 2;
cooked_bytes += 1; cooked_bytes += 1;
section[image->num_sections].size += 1; section[image->num_sections].size += 1;
@ -239,8 +239,8 @@ static int image_ihex_buffer_complete(image_t *image)
u16 upper_address; u16 upper_address;
sscanf(&lpszLine[bytes_read], "%4hx", &upper_address); sscanf(&lpszLine[bytes_read], "%4hx", &upper_address);
cal_checksum += (u8)(upper_address >> 8); cal_checksum += (uint8_t)(upper_address >> 8);
cal_checksum += (u8)upper_address; cal_checksum += (uint8_t)upper_address;
bytes_read += 4; bytes_read += 4;
if ((full_address >> 4) != upper_address) if ((full_address >> 4) != upper_address)
@ -270,7 +270,7 @@ static int image_ihex_buffer_complete(image_t *image)
while (count-- > 0) while (count-- > 0)
{ {
sscanf(&lpszLine[bytes_read], "%2x", &dummy); sscanf(&lpszLine[bytes_read], "%2x", &dummy);
cal_checksum += (u8)dummy; cal_checksum += (uint8_t)dummy;
bytes_read += 2; bytes_read += 2;
} }
} }
@ -279,8 +279,8 @@ static int image_ihex_buffer_complete(image_t *image)
u16 upper_address; u16 upper_address;
sscanf(&lpszLine[bytes_read], "%4hx", &upper_address); sscanf(&lpszLine[bytes_read], "%4hx", &upper_address);
cal_checksum += (u8)(upper_address >> 8); cal_checksum += (uint8_t)(upper_address >> 8);
cal_checksum += (u8)upper_address; cal_checksum += (uint8_t)upper_address;
bytes_read += 4; bytes_read += 4;
if ((full_address >> 16) != upper_address) if ((full_address >> 16) != upper_address)
@ -306,14 +306,14 @@ static int image_ihex_buffer_complete(image_t *image)
u32 start_address; u32 start_address;
sscanf(&lpszLine[bytes_read], "%8x", &start_address); sscanf(&lpszLine[bytes_read], "%8x", &start_address);
cal_checksum += (u8)(start_address >> 24); cal_checksum += (uint8_t)(start_address >> 24);
cal_checksum += (u8)(start_address >> 16); cal_checksum += (uint8_t)(start_address >> 16);
cal_checksum += (u8)(start_address >> 8); cal_checksum += (uint8_t)(start_address >> 8);
cal_checksum += (u8)start_address; cal_checksum += (uint8_t)start_address;
bytes_read += 8; bytes_read += 8;
image->start_address_set = 1; image->start_address_set = 1;
image->start_address = be_to_h_u32((u8*)&start_address); image->start_address = be_to_h_u32((uint8_t*)&start_address);
} }
else else
{ {
@ -324,7 +324,7 @@ static int image_ihex_buffer_complete(image_t *image)
sscanf(&lpszLine[bytes_read], "%2x", &checksum); sscanf(&lpszLine[bytes_read], "%2x", &checksum);
bytes_read += 2; bytes_read += 2;
if ((u8)checksum != (u8)(~cal_checksum + 1)) if ((uint8_t)checksum != (uint8_t)(~cal_checksum + 1))
{ {
/* checksum failed */ /* checksum failed */
LOG_ERROR("incorrect record checksum found in IHEX file"); LOG_ERROR("incorrect record checksum found in IHEX file");
@ -351,7 +351,7 @@ static int image_elf_read_headers(image_t *image)
return ERROR_FILEIO_OPERATION_FAILED; return ERROR_FILEIO_OPERATION_FAILED;
} }
if ((retval = fileio_read(&elf->fileio, sizeof(Elf32_Ehdr), (u8*)elf->header, &read_bytes)) != ERROR_OK) if ((retval = fileio_read(&elf->fileio, sizeof(Elf32_Ehdr), (uint8_t*)elf->header, &read_bytes)) != ERROR_OK)
{ {
LOG_ERROR("cannot read ELF file header, read failed"); LOG_ERROR("cannot read ELF file header, read failed");
return ERROR_FILEIO_OPERATION_FAILED; return ERROR_FILEIO_OPERATION_FAILED;
@ -401,7 +401,7 @@ static int image_elf_read_headers(image_t *image)
return ERROR_FILEIO_OPERATION_FAILED; return ERROR_FILEIO_OPERATION_FAILED;
} }
if ((retval = fileio_read(&elf->fileio, elf->segment_count*sizeof(Elf32_Phdr), (u8*)elf->segments, &read_bytes)) != ERROR_OK) if ((retval = fileio_read(&elf->fileio, elf->segment_count*sizeof(Elf32_Phdr), (uint8_t*)elf->segments, &read_bytes)) != ERROR_OK)
{ {
LOG_ERROR("cannot read ELF segment headers, read failed"); LOG_ERROR("cannot read ELF segment headers, read failed");
return retval; return retval;
@ -437,7 +437,7 @@ static int image_elf_read_headers(image_t *image)
return ERROR_OK; return ERROR_OK;
} }
static int image_elf_read_section(image_t *image, int section, u32 offset, u32 size, u8 *buffer, u32 *size_read) static int image_elf_read_section(image_t *image, int section, u32 offset, u32 size, uint8_t *buffer, u32 *size_read)
{ {
image_elf_t *elf = image->type_private; image_elf_t *elf = image->type_private;
Elf32_Phdr *segment = (Elf32_Phdr *)image->sections[section].private; Elf32_Phdr *segment = (Elf32_Phdr *)image->sections[section].private;
@ -505,7 +505,7 @@ static int image_mot_buffer_complete(image_t *image)
u32 address; u32 address;
u32 record_type; u32 record_type;
u32 checksum; u32 checksum;
u8 cal_checksum = 0; uint8_t cal_checksum = 0;
u32 bytes_read = 0; u32 bytes_read = 0;
/* get record type and record length */ /* get record type and record length */
@ -515,7 +515,7 @@ static int image_mot_buffer_complete(image_t *image)
} }
bytes_read += 4; bytes_read += 4;
cal_checksum += (u8)count; cal_checksum += (uint8_t)count;
/* skip checksum byte */ /* skip checksum byte */
count -=1; count -=1;
@ -527,7 +527,7 @@ static int image_mot_buffer_complete(image_t *image)
while (count-- > 0) { while (count-- > 0) {
sscanf(&lpszLine[bytes_read], "%2x", &iValue); sscanf(&lpszLine[bytes_read], "%2x", &iValue);
cal_checksum += (u8)iValue; cal_checksum += (uint8_t)iValue;
bytes_read += 2; bytes_read += 2;
} }
} }
@ -538,8 +538,8 @@ static int image_mot_buffer_complete(image_t *image)
case 1: case 1:
/* S1 - 16 bit address data record */ /* S1 - 16 bit address data record */
sscanf(&lpszLine[bytes_read], "%4x", &address); sscanf(&lpszLine[bytes_read], "%4x", &address);
cal_checksum += (u8)(address >> 8); cal_checksum += (uint8_t)(address >> 8);
cal_checksum += (u8)address; cal_checksum += (uint8_t)address;
bytes_read += 4; bytes_read += 4;
count -=2; count -=2;
break; break;
@ -547,9 +547,9 @@ static int image_mot_buffer_complete(image_t *image)
case 2: case 2:
/* S2 - 24 bit address data record */ /* S2 - 24 bit address data record */
sscanf(&lpszLine[bytes_read], "%6x", &address); sscanf(&lpszLine[bytes_read], "%6x", &address);
cal_checksum += (u8)(address >> 16); cal_checksum += (uint8_t)(address >> 16);
cal_checksum += (u8)(address >> 8); cal_checksum += (uint8_t)(address >> 8);
cal_checksum += (u8)address; cal_checksum += (uint8_t)address;
bytes_read += 6; bytes_read += 6;
count -=3; count -=3;
break; break;
@ -557,10 +557,10 @@ static int image_mot_buffer_complete(image_t *image)
case 3: case 3:
/* S3 - 32 bit address data record */ /* S3 - 32 bit address data record */
sscanf(&lpszLine[bytes_read], "%8x", &address); sscanf(&lpszLine[bytes_read], "%8x", &address);
cal_checksum += (u8)(address >> 24); cal_checksum += (uint8_t)(address >> 24);
cal_checksum += (u8)(address >> 16); cal_checksum += (uint8_t)(address >> 16);
cal_checksum += (u8)(address >> 8); cal_checksum += (uint8_t)(address >> 8);
cal_checksum += (u8)address; cal_checksum += (uint8_t)address;
bytes_read += 8; bytes_read += 8;
count -=4; count -=4;
break; break;
@ -588,8 +588,8 @@ static int image_mot_buffer_complete(image_t *image)
{ {
unsigned value; unsigned value;
sscanf(&lpszLine[bytes_read], "%2x", &value); sscanf(&lpszLine[bytes_read], "%2x", &value);
mot->buffer[cooked_bytes] = (u8)value; mot->buffer[cooked_bytes] = (uint8_t)value;
cal_checksum += (u8)mot->buffer[cooked_bytes]; cal_checksum += (uint8_t)mot->buffer[cooked_bytes];
bytes_read += 2; bytes_read += 2;
cooked_bytes += 1; cooked_bytes += 1;
section[image->num_sections].size += 1; section[image->num_sections].size += 1;
@ -604,7 +604,7 @@ static int image_mot_buffer_complete(image_t *image)
while (count-- > 0) while (count-- > 0)
{ {
sscanf(&lpszLine[bytes_read], "%2x", &dummy); sscanf(&lpszLine[bytes_read], "%2x", &dummy);
cal_checksum += (u8)dummy; cal_checksum += (uint8_t)dummy;
bytes_read += 2; bytes_read += 2;
} }
} }
@ -633,7 +633,7 @@ static int image_mot_buffer_complete(image_t *image)
/* account for checksum, will always be 0xFF */ /* account for checksum, will always be 0xFF */
sscanf(&lpszLine[bytes_read], "%2x", &checksum); sscanf(&lpszLine[bytes_read], "%2x", &checksum);
cal_checksum += (u8)checksum; cal_checksum += (uint8_t)checksum;
bytes_read += 2; bytes_read += 2;
if( cal_checksum != 0xFF ) if( cal_checksum != 0xFF )
@ -776,7 +776,7 @@ int image_open(image_t *image, char *url, char *type_string)
return retval; return retval;
}; };
int image_read_section(image_t *image, int section, u32 offset, u32 size, u8 *buffer, u32 *size_read) int image_read_section(image_t *image, int section, u32 offset, u32 size, uint8_t *buffer, u32 *size_read)
{ {
int retval; int retval;
@ -810,7 +810,7 @@ int image_read_section(image_t *image, int section, u32 offset, u32 size, u8 *bu
} }
else if (image->type == IMAGE_IHEX) else if (image->type == IMAGE_IHEX)
{ {
memcpy(buffer, (u8*)image->sections[section].private + offset, size); memcpy(buffer, (uint8_t*)image->sections[section].private + offset, size);
*size_read = size; *size_read = size;
return ERROR_OK; return ERROR_OK;
@ -860,14 +860,14 @@ int image_read_section(image_t *image, int section, u32 offset, u32 size, u8 *bu
} }
else if (image->type == IMAGE_SRECORD) else if (image->type == IMAGE_SRECORD)
{ {
memcpy(buffer, (u8*)image->sections[section].private + offset, size); memcpy(buffer, (uint8_t*)image->sections[section].private + offset, size);
*size_read = size; *size_read = size;
return ERROR_OK; return ERROR_OK;
} }
else if (image->type == IMAGE_BUILDER) else if (image->type == IMAGE_BUILDER)
{ {
memcpy(buffer, (u8*)image->sections[section].private + offset, size); memcpy(buffer, (uint8_t*)image->sections[section].private + offset, size);
*size_read = size; *size_read = size;
return ERROR_OK; return ERROR_OK;
@ -876,7 +876,7 @@ int image_read_section(image_t *image, int section, u32 offset, u32 size, u8 *bu
return ERROR_OK; return ERROR_OK;
} }
int image_add_section(image_t *image, u32 base, u32 size, int flags, u8 *data) int image_add_section(image_t *image, u32 base, u32 size, int flags, uint8_t *data)
{ {
image_section_t *section; image_section_t *section;
@ -894,7 +894,7 @@ int image_add_section(image_t *image, u32 base, u32 size, int flags, u8 *data)
if (((section->base_address + section->size) == base) && (section->flags == flags)) if (((section->base_address + section->size) == base) && (section->flags == flags))
{ {
section->private = realloc(section->private, section->size + size); section->private = realloc(section->private, section->size + size);
memcpy((u8*)section->private + section->size, data, size); memcpy((uint8_t*)section->private + section->size, data, size);
section->size += size; section->size += size;
return ERROR_OK; return ERROR_OK;
} }
@ -907,8 +907,8 @@ int image_add_section(image_t *image, u32 base, u32 size, int flags, u8 *data)
section->base_address = base; section->base_address = base;
section->size = size; section->size = size;
section->flags = flags; section->flags = flags;
section->private = malloc(sizeof(u8) * size); section->private = malloc(sizeof(uint8_t) * size);
memcpy((u8*)section->private, data, size); memcpy((uint8_t*)section->private, data, size);
return ERROR_OK; return ERROR_OK;
} }
@ -997,7 +997,7 @@ void image_close(image_t *image)
} }
} }
int image_calculate_checksum(u8* buffer, u32 nbytes, u32* checksum) int image_calculate_checksum(uint8_t* buffer, u32 nbytes, u32* checksum)
{ {
u32 crc = 0xffffffff; u32 crc = 0xffffffff;
LOG_DEBUG("Calculating checksum"); LOG_DEBUG("Calculating checksum");

14
src/target/image.h
View File

@ -75,13 +75,13 @@ typedef struct image_binary_s
typedef struct image_ihex_s typedef struct image_ihex_s
{ {
fileio_t fileio; fileio_t fileio;
u8 *buffer; uint8_t *buffer;
} image_ihex_t; } image_ihex_t;
typedef struct image_memory_s typedef struct image_memory_s
{ {
struct target_s *target; struct target_s *target;
u8 *cache; uint8_t *cache;
u32 cache_address; u32 cache_address;
} image_memory_t; } image_memory_t;
@ -91,21 +91,21 @@ typedef struct fileio_elf_s
Elf32_Ehdr *header; Elf32_Ehdr *header;
Elf32_Phdr *segments; Elf32_Phdr *segments;
u32 segment_count; u32 segment_count;
u8 endianness; uint8_t endianness;
} image_elf_t; } image_elf_t;
typedef struct image_mot_s typedef struct image_mot_s
{ {
fileio_t fileio; fileio_t fileio;
u8 *buffer; uint8_t *buffer;
} image_mot_t; } image_mot_t;
extern int image_open(image_t *image, char *url, char *type_string); extern int image_open(image_t *image, char *url, char *type_string);
extern int image_read_section(image_t *image, int section, u32 offset, u32 size, u8 *buffer, u32 *size_read); extern int image_read_section(image_t *image, int section, u32 offset, u32 size, uint8_t *buffer, u32 *size_read);
extern void image_close(image_t *image); extern void image_close(image_t *image);
extern int image_add_section(image_t *image, u32 base, u32 size, int flags, u8 *data); extern int image_add_section(image_t *image, u32 base, u32 size, int flags, uint8_t *data);
extern int image_calculate_checksum(u8* buffer, u32 nbytes, u32* checksum); extern int image_calculate_checksum(uint8_t* buffer, u32 nbytes, u32* checksum);
#define ERROR_IMAGE_FORMAT_ERROR (-1400) #define ERROR_IMAGE_FORMAT_ERROR (-1400)
#define ERROR_IMAGE_TYPE_UNKNOWN (-1401) #define ERROR_IMAGE_TYPE_UNKNOWN (-1401)

4
src/target/mips32.c
View File

@ -86,7 +86,7 @@ mips32_core_reg_t mips32_core_reg_list_arch_info[MIPS32NUMCOREREGS] =
#define MIPS32NUMFPREGS 34 + 18 #define MIPS32NUMFPREGS 34 + 18
u8 mips32_gdb_dummy_fp_value[] = {0, 0, 0, 0}; uint8_t mips32_gdb_dummy_fp_value[] = {0, 0, 0, 0};
reg_t mips32_gdb_dummy_fp_reg = reg_t mips32_gdb_dummy_fp_reg =
{ {
@ -112,7 +112,7 @@ int mips32_get_core_reg(reg_t *reg)
return retval; return retval;
} }
int mips32_set_core_reg(reg_t *reg, u8 *buf) int mips32_set_core_reg(reg_t *reg, uint8_t *buf)
{ {
mips32_core_reg_t *mips32_reg = reg->arch_info; mips32_core_reg_t *mips32_reg = reg->arch_info;
target_t *target = mips32_reg->target; target_t *target = mips32_reg->target;

10
src/target/mips32_dmaacc.c
View File

@ -137,7 +137,7 @@ begin_ejtag_dma_read_h:
return ERROR_OK; return ERROR_OK;
} }
static int ejtag_dma_read_b(mips_ejtag_t *ejtag_info, u32 addr, u8 *data) static int ejtag_dma_read_b(mips_ejtag_t *ejtag_info, u32 addr, uint8_t *data)
{ {
u32 v; u32 v;
u32 ejtag_ctrl; u32 ejtag_ctrl;
@ -354,7 +354,7 @@ int mips32_dmaacc_read_mem(mips_ejtag_t *ejtag_info, u32 addr, int size, int cou
switch (size) switch (size)
{ {
case 1: case 1:
return mips32_dmaacc_read_mem8(ejtag_info, addr, count, (u8*)buf); return mips32_dmaacc_read_mem8(ejtag_info, addr, count, (uint8_t*)buf);
case 2: case 2:
return mips32_dmaacc_read_mem16(ejtag_info, addr, count, (u16*)buf); return mips32_dmaacc_read_mem16(ejtag_info, addr, count, (u16*)buf);
case 4: case 4:
@ -390,7 +390,7 @@ int mips32_dmaacc_read_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, u16
return ERROR_OK; return ERROR_OK;
} }
int mips32_dmaacc_read_mem8(mips_ejtag_t *ejtag_info, u32 addr, int count, u8 *buf) int mips32_dmaacc_read_mem8(mips_ejtag_t *ejtag_info, u32 addr, int count, uint8_t *buf)
{ {
int i; int i;
int retval; int retval;
@ -408,7 +408,7 @@ int mips32_dmaacc_write_mem(mips_ejtag_t *ejtag_info, u32 addr, int size, int co
switch (size) switch (size)
{ {
case 1: case 1:
return mips32_dmaacc_write_mem8(ejtag_info, addr, count, (u8*)buf); return mips32_dmaacc_write_mem8(ejtag_info, addr, count, (uint8_t*)buf);
case 2: case 2:
return mips32_dmaacc_write_mem16(ejtag_info, addr, count,(u16*)buf); return mips32_dmaacc_write_mem16(ejtag_info, addr, count,(u16*)buf);
case 4: case 4:
@ -444,7 +444,7 @@ int mips32_dmaacc_write_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, u16
return ERROR_OK; return ERROR_OK;
} }
int mips32_dmaacc_write_mem8(mips_ejtag_t *ejtag_info, u32 addr, int count, u8 *buf) int mips32_dmaacc_write_mem8(mips_ejtag_t *ejtag_info, u32 addr, int count, uint8_t *buf)
{ {
int i; int i;
int retval; int retval;

4
src/target/mips32_dmaacc.h
View File

@ -37,11 +37,11 @@
extern int mips32_dmaacc_read_mem(mips_ejtag_t *ejtag_info, u32 addr, int size, int count, void *buf); extern int mips32_dmaacc_read_mem(mips_ejtag_t *ejtag_info, u32 addr, int size, int count, void *buf);
extern int mips32_dmaacc_write_mem(mips_ejtag_t *ejtag_info, u32 addr, int size, int count, void *buf); extern int mips32_dmaacc_write_mem(mips_ejtag_t *ejtag_info, u32 addr, int size, int count, void *buf);
extern int mips32_dmaacc_read_mem8(mips_ejtag_t *ejtag_info, u32 addr, int count, u8 *buf); extern int mips32_dmaacc_read_mem8(mips_ejtag_t *ejtag_info, u32 addr, int count, uint8_t *buf);
extern int mips32_dmaacc_read_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, u16 *buf); extern int mips32_dmaacc_read_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, u16 *buf);
extern int mips32_dmaacc_read_mem32(mips_ejtag_t *ejtag_info, u32 addr, int count, u32 *buf); extern int mips32_dmaacc_read_mem32(mips_ejtag_t *ejtag_info, u32 addr, int count, u32 *buf);
extern int mips32_dmaacc_write_mem8(mips_ejtag_t *ejtag_info, u32 addr, int count, u8 *buf); extern int mips32_dmaacc_write_mem8(mips_ejtag_t *ejtag_info, u32 addr, int count, uint8_t *buf);
extern int mips32_dmaacc_write_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, u16 *buf); extern int mips32_dmaacc_write_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, u16 *buf);
extern int mips32_dmaacc_write_mem32(mips_ejtag_t *ejtag_info, u32 addr, int count, u32 *buf); extern int mips32_dmaacc_write_mem32(mips_ejtag_t *ejtag_info, u32 addr, int count, u32 *buf);

8
src/target/mips32_pracc.c
View File

@ -274,7 +274,7 @@ int mips32_pracc_read_mem(mips_ejtag_t *ejtag_info, u32 addr, int size, int coun
switch (size) switch (size)
{ {
case 1: case 1:
return mips32_pracc_read_mem8(ejtag_info, addr, count, (u8*)buf); return mips32_pracc_read_mem8(ejtag_info, addr, count, (uint8_t*)buf);
case 2: case 2:
return mips32_pracc_read_mem16(ejtag_info, addr, count, (u16*)buf); return mips32_pracc_read_mem16(ejtag_info, addr, count, (u16*)buf);
case 4: case 4:
@ -474,7 +474,7 @@ int mips32_pracc_read_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, u16 *
return ERROR_OK; return ERROR_OK;
} }
int mips32_pracc_read_mem8(mips_ejtag_t *ejtag_info, u32 addr, int count, u8 *buf) int mips32_pracc_read_mem8(mips_ejtag_t *ejtag_info, u32 addr, int count, uint8_t *buf)
{ {
u32 code[] = { u32 code[] = {
/* start: */ /* start: */
@ -558,7 +558,7 @@ int mips32_pracc_write_mem(mips_ejtag_t *ejtag_info, u32 addr, int size, int cou
switch (size) switch (size)
{ {
case 1: case 1:
return mips32_pracc_write_mem8(ejtag_info, addr, count, (u8*)buf); return mips32_pracc_write_mem8(ejtag_info, addr, count, (uint8_t*)buf);
case 2: case 2:
return mips32_pracc_write_mem16(ejtag_info, addr, count,(u16*)buf); return mips32_pracc_write_mem16(ejtag_info, addr, count,(u16*)buf);
case 4: case 4:
@ -713,7 +713,7 @@ int mips32_pracc_write_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, u16
return ERROR_OK; return ERROR_OK;
} }
int mips32_pracc_write_mem8(mips_ejtag_t *ejtag_info, u32 addr, int count, u8 *buf) int mips32_pracc_write_mem8(mips_ejtag_t *ejtag_info, u32 addr, int count, uint8_t *buf)
{ {
u32 code[] = { u32 code[] = {
/* start: */ /* start: */

4
src/target/mips32_pracc.h
View File

@ -40,12 +40,12 @@
extern int mips32_pracc_read_mem(mips_ejtag_t *ejtag_info, u32 addr, int size, int count, void *buf); extern int mips32_pracc_read_mem(mips_ejtag_t *ejtag_info, u32 addr, int size, int count, void *buf);
extern int mips32_pracc_write_mem(mips_ejtag_t *ejtag_info, u32 addr, int size, int count, void *buf); extern int mips32_pracc_write_mem(mips_ejtag_t *ejtag_info, u32 addr, int size, int count, void *buf);
extern int mips32_pracc_read_mem8(mips_ejtag_t *ejtag_info, u32 addr, int count, u8 *buf); extern int mips32_pracc_read_mem8(mips_ejtag_t *ejtag_info, u32 addr, int count, uint8_t *buf);
extern int mips32_pracc_read_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, u16 *buf); extern int mips32_pracc_read_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, u16 *buf);
extern int mips32_pracc_read_mem32(mips_ejtag_t *ejtag_info, u32 addr, int count, u32 *buf); extern int mips32_pracc_read_mem32(mips_ejtag_t *ejtag_info, u32 addr, int count, u32 *buf);
extern int mips32_pracc_read_u32(mips_ejtag_t *ejtag_info, u32 addr, u32 *buf); extern int mips32_pracc_read_u32(mips_ejtag_t *ejtag_info, u32 addr, u32 *buf);
extern int mips32_pracc_write_mem8(mips_ejtag_t *ejtag_info, u32 addr, int count, u8 *buf); extern int mips32_pracc_write_mem8(mips_ejtag_t *ejtag_info, u32 addr, int count, uint8_t *buf);
extern int mips32_pracc_write_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, u16 *buf); extern int mips32_pracc_write_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, u16 *buf);
extern int mips32_pracc_write_mem32(mips_ejtag_t *ejtag_info, u32 addr, int count, u32 *buf); extern int mips32_pracc_write_mem32(mips_ejtag_t *ejtag_info, u32 addr, int count, u32 *buf);
extern int mips32_pracc_write_u32(mips_ejtag_t *ejtag_info, u32 addr, u32 *buf); extern int mips32_pracc_write_u32(mips_ejtag_t *ejtag_info, u32 addr, u32 *buf);

4
src/target/mips_ejtag.c
View File

@ -38,7 +38,7 @@ int mips_ejtag_set_instr(mips_ejtag_t *ejtag_info, int new_instr, void *delete_m
if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != (u32)new_instr) if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != (u32)new_instr)
{ {
scan_field_t field; scan_field_t field;
u8 t[4]; uint8_t t[4];
field.tap = tap; field.tap = tap;
field.num_bits = tap->ir_length; field.num_bits = tap->ir_length;
@ -118,7 +118,7 @@ int mips_ejtag_drscan_32(mips_ejtag_t *ejtag_info, u32 *data)
if (tap==NULL) if (tap==NULL)
return ERROR_FAIL; return ERROR_FAIL;
scan_field_t field; scan_field_t field;
u8 t[4], r[4]; uint8_t t[4], r[4];
int retval; int retval;
field.tap = tap; field.tap = tap;

14
src/target/mips_m4k.c
View File

@ -37,8 +37,8 @@ int mips_m4k_halt(struct target_s *target);
int mips_m4k_soft_reset_halt(struct target_s *target); int mips_m4k_soft_reset_halt(struct target_s *target);
int mips_m4k_resume(struct target_s *target, int current, u32 address, int handle_breakpoints, int debug_execution); int mips_m4k_resume(struct target_s *target, int current, u32 address, int handle_breakpoints, int debug_execution);
int mips_m4k_step(struct target_s *target, int current, u32 address, int handle_breakpoints); int mips_m4k_step(struct target_s *target, int current, u32 address, int handle_breakpoints);
int mips_m4k_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer); int mips_m4k_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
int mips_m4k_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer); int mips_m4k_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
int mips_m4k_register_commands(struct command_context_s *cmd_ctx); int mips_m4k_register_commands(struct command_context_s *cmd_ctx);
int mips_m4k_init_target(struct command_context_s *cmd_ctx, struct target_s *target); int mips_m4k_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
int mips_m4k_quit(void); int mips_m4k_quit(void);
@ -613,7 +613,7 @@ int mips_m4k_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
u32 current_instr; u32 current_instr;
/* check that user program has not modified breakpoint instruction */ /* check that user program has not modified breakpoint instruction */
if ((retval = target_read_memory(target, breakpoint->address, 4, 1, (u8*)&current_instr)) != ERROR_OK) if ((retval = target_read_memory(target, breakpoint->address, 4, 1, (uint8_t*)&current_instr)) != ERROR_OK)
{ {
return retval; return retval;
} }
@ -630,7 +630,7 @@ int mips_m4k_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
u16 current_instr; u16 current_instr;
/* check that user program has not modified breakpoint instruction */ /* check that user program has not modified breakpoint instruction */
if ((retval = target_read_memory(target, breakpoint->address, 2, 1, (u8*)&current_instr)) != ERROR_OK) if ((retval = target_read_memory(target, breakpoint->address, 2, 1, (uint8_t*)&current_instr)) != ERROR_OK)
{ {
return retval; return retval;
} }
@ -728,7 +728,7 @@ void mips_m4k_enable_watchpoints(struct target_s *target)
} }
} }
int mips_m4k_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer) int mips_m4k_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
{ {
mips32_common_t *mips32 = target->arch_info; mips32_common_t *mips32 = target->arch_info;
mips_ejtag_t *ejtag_info = &mips32->ejtag_info; mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
@ -782,7 +782,7 @@ int mips_m4k_read_memory(struct target_s *target, u32 address, u32 size, u32 cou
return ERROR_OK; return ERROR_OK;
} }
int mips_m4k_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer) int mips_m4k_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
{ {
mips32_common_t *mips32 = target->arch_info; mips32_common_t *mips32 = target->arch_info;
mips_ejtag_t *ejtag_info = &mips32->ejtag_info; mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
@ -904,7 +904,7 @@ int mips_m4k_examine(struct target_s *target)
return ERROR_OK; return ERROR_OK;
} }
int mips_m4k_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffer) int mips_m4k_bulk_write_memory(target_t *target, u32 address, u32 count, uint8_t *buffer)
{ {
return mips_m4k_write_memory(target, address, 4, count, buffer); return mips_m4k_write_memory(target, address, 4, count, buffer);
} }

2
src/target/mips_m4k.h
View File

@ -35,7 +35,7 @@ typedef struct mips_m4k_common_s
mips32_common_t mips32_common; mips32_common_t mips32_common;
} mips_m4k_common_t; } mips_m4k_common_t;
extern int mips_m4k_bulk_write_memory(struct target_s *target, u32 address, u32 count, u8 *buffer); extern int mips_m4k_bulk_write_memory(struct target_s *target, u32 address, u32 count, uint8_t *buffer);
extern void mips_m4k_enable_breakpoints(struct target_s *target); extern void mips_m4k_enable_breakpoints(struct target_s *target);
extern int mips_m4k_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint); extern int mips_m4k_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint);

20
src/target/oocd_trace.c
View File

@ -35,7 +35,7 @@ static int oocd_trace_register_commands(struct command_context_s *cmd_ctx);
static int oocd_trace_read_reg(oocd_trace_t *oocd_trace, int reg, u32 *value) static int oocd_trace_read_reg(oocd_trace_t *oocd_trace, int reg, u32 *value)
{ {
size_t bytes_written, bytes_read, bytes_to_read; size_t bytes_written, bytes_read, bytes_to_read;
u8 cmd; uint8_t cmd;
cmd = 0x10 | (reg & 0x7); cmd = 0x10 | (reg & 0x7);
bytes_written = write(oocd_trace->tty_fd, &cmd, 1); bytes_written = write(oocd_trace->tty_fd, &cmd, 1);
@ -43,7 +43,7 @@ static int oocd_trace_read_reg(oocd_trace_t *oocd_trace, int reg, u32 *value)
bytes_to_read = 4; bytes_to_read = 4;
while (bytes_to_read > 0) while (bytes_to_read > 0)
{ {
bytes_read = read(oocd_trace->tty_fd, ((u8*)value) + 4 - bytes_to_read, bytes_to_read); bytes_read = read(oocd_trace->tty_fd, ((uint8_t*)value) + 4 - bytes_to_read, bytes_to_read);
bytes_to_read -= bytes_read; bytes_to_read -= bytes_read;
} }
@ -55,7 +55,7 @@ static int oocd_trace_read_reg(oocd_trace_t *oocd_trace, int reg, u32 *value)
static int oocd_trace_write_reg(oocd_trace_t *oocd_trace, int reg, u32 value) static int oocd_trace_write_reg(oocd_trace_t *oocd_trace, int reg, u32 value)
{ {
size_t bytes_written; size_t bytes_written;
u8 data[5]; uint8_t data[5];
data[0] = 0x18 | (reg & 0x7); data[0] = 0x18 | (reg & 0x7);
data[1] = value & 0xff; data[1] = value & 0xff;
@ -69,11 +69,11 @@ static int oocd_trace_write_reg(oocd_trace_t *oocd_trace, int reg, u32 value)
return ERROR_OK; return ERROR_OK;
} }
static int oocd_trace_read_memory(oocd_trace_t *oocd_trace, u8 *data, u32 address, u32 size) static int oocd_trace_read_memory(oocd_trace_t *oocd_trace, uint8_t *data, u32 address, u32 size)
{ {
size_t bytes_written, bytes_to_read; size_t bytes_written, bytes_to_read;
ssize_t bytes_read; ssize_t bytes_read;
u8 cmd; uint8_t cmd;
oocd_trace_write_reg(oocd_trace, OOCD_TRACE_ADDRESS, address); oocd_trace_write_reg(oocd_trace, OOCD_TRACE_ADDRESS, address);
oocd_trace_write_reg(oocd_trace, OOCD_TRACE_SDRAM_COUNTER, size); oocd_trace_write_reg(oocd_trace, OOCD_TRACE_SDRAM_COUNTER, size);
@ -85,7 +85,7 @@ static int oocd_trace_read_memory(oocd_trace_t *oocd_trace, u8 *data, u32 addres
while (bytes_to_read > 0) while (bytes_to_read > 0)
{ {
if ((bytes_read = read(oocd_trace->tty_fd, if ((bytes_read = read(oocd_trace->tty_fd,
((u8*)data) + (size * 16) - bytes_to_read, bytes_to_read)) < 0) ((uint8_t*)data) + (size * 16) - bytes_to_read, bytes_to_read)) < 0)
{ {
LOG_DEBUG("read() returned %zi (%s)", bytes_read, strerror(errno)); LOG_DEBUG("read() returned %zi (%s)", bytes_read, strerror(errno));
} }
@ -98,7 +98,7 @@ static int oocd_trace_read_memory(oocd_trace_t *oocd_trace, u8 *data, u32 addres
static int oocd_trace_init(etm_context_t *etm_ctx) static int oocd_trace_init(etm_context_t *etm_ctx)
{ {
u8 trash[256]; uint8_t trash[256];
oocd_trace_t *oocd_trace = etm_ctx->capture_driver_priv; oocd_trace_t *oocd_trace = etm_ctx->capture_driver_priv;
size_t bytes_read; size_t bytes_read;
@ -181,7 +181,7 @@ static int oocd_trace_read_trace(etm_context_t *etm_ctx)
u32 status, address; u32 status, address;
u32 first_frame = 0x0; u32 first_frame = 0x0;
u32 num_frames = 1048576; u32 num_frames = 1048576;
u8 *trace_data; uint8_t *trace_data;
u32 i; u32 i;
oocd_trace_read_reg(oocd_trace, OOCD_TRACE_STATUS, &status); oocd_trace_read_reg(oocd_trace, OOCD_TRACE_STATUS, &status);
@ -199,7 +199,7 @@ static int oocd_trace_read_trace(etm_context_t *etm_ctx)
/* read data into temporary array for unpacking /* read data into temporary array for unpacking
* one frame from OpenOCD+trace corresponds to 16 trace cycles * one frame from OpenOCD+trace corresponds to 16 trace cycles
*/ */
trace_data = malloc(sizeof(u8) * num_frames * 16); trace_data = malloc(sizeof(uint8_t) * num_frames * 16);
oocd_trace_read_memory(oocd_trace, trace_data, first_frame, num_frames); oocd_trace_read_memory(oocd_trace, trace_data, first_frame, num_frames);
if (etm_ctx->trace_depth > 0) if (etm_ctx->trace_depth > 0)
@ -374,7 +374,7 @@ static int handle_oocd_trace_resync_command(struct command_context_s *cmd_ctx, c
arm7_9_common_t *arm7_9; arm7_9_common_t *arm7_9;
oocd_trace_t *oocd_trace; oocd_trace_t *oocd_trace;
size_t bytes_written; size_t bytes_written;
u8 cmd_array[1]; uint8_t cmd_array[1];
target = get_current_target(cmd_ctx); target = get_current_target(cmd_ctx);

4
src/target/register.c
View File

@ -65,7 +65,7 @@ reg_cache_t** register_get_last_cache_p(reg_cache_t **first)
return cache_p; return cache_p;
} }
int register_reg_arch_type(int (*get)(reg_t *reg), int (*set)(reg_t *reg, u8 *buf)) int register_reg_arch_type(int (*get)(reg_t *reg), int (*set)(reg_t *reg, uint8_t *buf))
{ {
reg_arch_type_t** arch_type_p = &reg_arch_types; reg_arch_type_t** arch_type_p = &reg_arch_types;
int id = 0; int id = 0;
@ -108,7 +108,7 @@ static int register_get_dummy_core_reg(reg_t *reg)
return ERROR_OK; return ERROR_OK;
} }
static int register_set_dummy_core_reg(reg_t *reg, u8 *buf) static int register_set_dummy_core_reg(reg_t *reg, uint8_t *buf)
{ {
reg->dirty = 1; reg->dirty = 1;
reg->valid = 1; reg->valid = 1;

4
src/target/register.h
View File

@ -58,13 +58,13 @@ typedef struct reg_arch_type_s
{ {
int id; int id;
int (*get)(reg_t *reg); int (*get)(reg_t *reg);
int (*set)(reg_t *reg, u8 *buf); int (*set)(reg_t *reg, uint8_t *buf);
struct reg_arch_type_s *next; struct reg_arch_type_s *next;
} reg_arch_type_t; } reg_arch_type_t;
extern reg_t* register_get_by_name(reg_cache_t *first, char *name, int search_all); extern reg_t* register_get_by_name(reg_cache_t *first, char *name, int search_all);
extern reg_cache_t** register_get_last_cache_p(reg_cache_t **first); extern reg_cache_t** register_get_last_cache_p(reg_cache_t **first);
extern int register_reg_arch_type(int (*get)(reg_t *reg), int (*set)(reg_t *reg, u8 *buf)); extern int register_reg_arch_type(int (*get)(reg_t *reg), int (*set)(reg_t *reg, uint8_t *buf));
extern reg_arch_type_t* register_get_arch_type(int id); extern reg_arch_type_t* register_get_arch_type(int id);
extern void register_init_dummy(reg_t *reg); extern void register_init_dummy(reg_t *reg);

76
src/target/target.c
View File

@ -272,7 +272,7 @@ static int new_target_number(void)
static int target_continuous_poll = 1; static int target_continuous_poll = 1;
/* read a u32 from a buffer in target memory endianness */ /* read a u32 from a buffer in target memory endianness */
u32 target_buffer_get_u32(target_t *target, const u8 *buffer) u32 target_buffer_get_u32(target_t *target, const uint8_t *buffer)
{ {
if (target->endianness == TARGET_LITTLE_ENDIAN) if (target->endianness == TARGET_LITTLE_ENDIAN)
return le_to_h_u32(buffer); return le_to_h_u32(buffer);
@ -281,7 +281,7 @@ u32 target_buffer_get_u32(target_t *target, const u8 *buffer)
} }
/* read a u16 from a buffer in target memory endianness */ /* read a u16 from a buffer in target memory endianness */
u16 target_buffer_get_u16(target_t *target, const u8 *buffer) u16 target_buffer_get_u16(target_t *target, const uint8_t *buffer)
{ {
if (target->endianness == TARGET_LITTLE_ENDIAN) if (target->endianness == TARGET_LITTLE_ENDIAN)
return le_to_h_u16(buffer); return le_to_h_u16(buffer);
@ -289,14 +289,14 @@ u16 target_buffer_get_u16(target_t *target, const u8 *buffer)
return be_to_h_u16(buffer); return be_to_h_u16(buffer);
} }
/* read a u8 from a buffer in target memory endianness */ /* read a uint8_t from a buffer in target memory endianness */
u8 target_buffer_get_u8(target_t *target, const u8 *buffer) uint8_t target_buffer_get_u8(target_t *target, const uint8_t *buffer)
{ {
return *buffer & 0x0ff; return *buffer & 0x0ff;
} }
/* write a u32 to a buffer in target memory endianness */ /* write a u32 to a buffer in target memory endianness */
void target_buffer_set_u32(target_t *target, u8 *buffer, u32 value) void target_buffer_set_u32(target_t *target, uint8_t *buffer, u32 value)
{ {
if (target->endianness == TARGET_LITTLE_ENDIAN) if (target->endianness == TARGET_LITTLE_ENDIAN)
h_u32_to_le(buffer, value); h_u32_to_le(buffer, value);
@ -305,7 +305,7 @@ void target_buffer_set_u32(target_t *target, u8 *buffer, u32 value)
} }
/* write a u16 to a buffer in target memory endianness */ /* write a u16 to a buffer in target memory endianness */
void target_buffer_set_u16(target_t *target, u8 *buffer, u16 value) void target_buffer_set_u16(target_t *target, uint8_t *buffer, u16 value)
{ {
if (target->endianness == TARGET_LITTLE_ENDIAN) if (target->endianness == TARGET_LITTLE_ENDIAN)
h_u16_to_le(buffer, value); h_u16_to_le(buffer, value);
@ -313,8 +313,8 @@ void target_buffer_set_u16(target_t *target, u8 *buffer, u16 value)
h_u16_to_be(buffer, value); h_u16_to_be(buffer, value);
} }
/* write a u8 to a buffer in target memory endianness */ /* write a uint8_t to a buffer in target memory endianness */
void target_buffer_set_u8(target_t *target, u8 *buffer, u8 value) void target_buffer_set_u8(target_t *target, uint8_t *buffer, uint8_t value)
{ {
*buffer = value; *buffer = value;
} }
@ -518,7 +518,7 @@ const char *target_get_name(struct target_s *target)
return target->type->name; return target->type->name;
} }
static int target_write_memory_imp(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer) static int target_write_memory_imp(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
{ {
if (!target_was_examined(target)) if (!target_was_examined(target))
{ {
@ -528,7 +528,7 @@ static int target_write_memory_imp(struct target_s *target, u32 address, u32 siz
return target->type->write_memory_imp(target, address, size, count, buffer); return target->type->write_memory_imp(target, address, size, count, buffer);
} }
static int target_read_memory_imp(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer) static int target_read_memory_imp(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
{ {
if (!target_was_examined(target)) if (!target_was_examined(target))
{ {
@ -559,18 +559,18 @@ static int target_run_algorithm_imp(struct target_s *target, int num_mem_params,
} }
int target_read_memory(struct target_s *target, int target_read_memory(struct target_s *target,
u32 address, u32 size, u32 count, u8 *buffer) u32 address, u32 size, u32 count, uint8_t *buffer)
{ {
return target->type->read_memory(target, address, size, count, buffer); return target->type->read_memory(target, address, size, count, buffer);
} }
int target_write_memory(struct target_s *target, int target_write_memory(struct target_s *target,
u32 address, u32 size, u32 count, u8 *buffer) u32 address, u32 size, u32 count, uint8_t *buffer)
{ {
return target->type->write_memory(target, address, size, count, buffer); return target->type->write_memory(target, address, size, count, buffer);
} }
int target_bulk_write_memory(struct target_s *target, int target_bulk_write_memory(struct target_s *target,
u32 address, u32 count, u8 *buffer) u32 address, u32 count, uint8_t *buffer)
{ {
return target->type->bulk_write_memory(target, address, count, buffer); return target->type->bulk_write_memory(target, address, count, buffer);
} }
@ -1096,7 +1096,7 @@ int target_arch_state(struct target_s *target)
* mode respectively, otherwise data is handled as quickly as * mode respectively, otherwise data is handled as quickly as
* possible * possible
*/ */
int target_write_buffer(struct target_s *target, u32 address, u32 size, u8 *buffer) int target_write_buffer(struct target_s *target, u32 address, u32 size, uint8_t *buffer)
{ {
int retval; int retval;
LOG_DEBUG("writing buffer of %i byte at 0x%8.8x", size, address); LOG_DEBUG("writing buffer of %i byte at 0x%8.8x", size, address);
@ -1175,7 +1175,7 @@ int target_write_buffer(struct target_s *target, u32 address, u32 size, u8 *buff
* mode respectively, otherwise data is handled as quickly as * mode respectively, otherwise data is handled as quickly as
* possible * possible
*/ */
int target_read_buffer(struct target_s *target, u32 address, u32 size, u8 *buffer) int target_read_buffer(struct target_s *target, u32 address, u32 size, uint8_t *buffer)
{ {
int retval; int retval;
LOG_DEBUG("reading buffer of %i byte at 0x%8.8x", size, address); LOG_DEBUG("reading buffer of %i byte at 0x%8.8x", size, address);
@ -1243,7 +1243,7 @@ int target_read_buffer(struct target_s *target, u32 address, u32 size, u8 *buffe
int target_checksum_memory(struct target_s *target, u32 address, u32 size, u32* crc) int target_checksum_memory(struct target_s *target, u32 address, u32 size, u32* crc)
{ {
u8 *buffer; uint8_t *buffer;
int retval; int retval;
u32 i; u32 i;
u32 checksum = 0; u32 checksum = 0;
@ -1305,7 +1305,7 @@ int target_blank_check_memory(struct target_s *target, u32 address, u32 size, u3
int target_read_u32(struct target_s *target, u32 address, u32 *value) int target_read_u32(struct target_s *target, u32 address, u32 *value)
{ {
u8 value_buf[4]; uint8_t value_buf[4];
if (!target_was_examined(target)) if (!target_was_examined(target))
{ {
LOG_ERROR("Target not examined yet"); LOG_ERROR("Target not examined yet");
@ -1330,7 +1330,7 @@ int target_read_u32(struct target_s *target, u32 address, u32 *value)
int target_read_u16(struct target_s *target, u32 address, u16 *value) int target_read_u16(struct target_s *target, u32 address, u16 *value)
{ {
u8 value_buf[2]; uint8_t value_buf[2];
if (!target_was_examined(target)) if (!target_was_examined(target))
{ {
LOG_ERROR("Target not examined yet"); LOG_ERROR("Target not examined yet");
@ -1353,7 +1353,7 @@ int target_read_u16(struct target_s *target, u32 address, u16 *value)
return retval; return retval;
} }
int target_read_u8(struct target_s *target, u32 address, u8 *value) int target_read_u8(struct target_s *target, u32 address, uint8_t *value)
{ {
int retval = target_read_memory(target, address, 1, 1, value); int retval = target_read_memory(target, address, 1, 1, value);
if (!target_was_examined(target)) if (!target_was_examined(target))
@ -1378,7 +1378,7 @@ int target_read_u8(struct target_s *target, u32 address, u8 *value)
int target_write_u32(struct target_s *target, u32 address, u32 value) int target_write_u32(struct target_s *target, u32 address, u32 value)
{ {
int retval; int retval;
u8 value_buf[4]; uint8_t value_buf[4];
if (!target_was_examined(target)) if (!target_was_examined(target))
{ {
LOG_ERROR("Target not examined yet"); LOG_ERROR("Target not examined yet");
@ -1399,7 +1399,7 @@ int target_write_u32(struct target_s *target, u32 address, u32 value)
int target_write_u16(struct target_s *target, u32 address, u16 value) int target_write_u16(struct target_s *target, u32 address, u16 value)
{ {
int retval; int retval;
u8 value_buf[2]; uint8_t value_buf[2];
if (!target_was_examined(target)) if (!target_was_examined(target))
{ {
LOG_ERROR("Target not examined yet"); LOG_ERROR("Target not examined yet");
@ -1417,7 +1417,7 @@ int target_write_u16(struct target_s *target, u32 address, u16 value)
return retval; return retval;
} }
int target_write_u8(struct target_s *target, u32 address, u8 value) int target_write_u8(struct target_s *target, u32 address, uint8_t value)
{ {
int retval; int retval;
if (!target_was_examined(target)) if (!target_was_examined(target))
@ -1782,7 +1782,7 @@ static int handle_reg_command(struct command_context_s *cmd_ctx, char *cmd, char
/* set register value */ /* set register value */
if (argc == 2) if (argc == 2)
{ {
u8 *buf = malloc(CEIL(reg->size, 8)); uint8_t *buf = malloc(CEIL(reg->size, 8));
str_to_buf(args[1], strlen(args[1]), buf, reg->size, 0); str_to_buf(args[1], strlen(args[1]), buf, reg->size, 0);
reg_arch_type_t *arch_type = register_get_arch_type(reg->arch_type); reg_arch_type_t *arch_type = register_get_arch_type(reg->arch_type);
@ -2011,7 +2011,7 @@ static int handle_step_command(struct command_context_s *cmd_ctx, char *cmd, cha
static void handle_md_output(struct command_context_s *cmd_ctx, static void handle_md_output(struct command_context_s *cmd_ctx,
struct target_s *target, u32 address, unsigned size, struct target_s *target, u32 address, unsigned size,
unsigned count, const u8 *buffer) unsigned count, const uint8_t *buffer)
{ {
const unsigned line_bytecnt = 32; const unsigned line_bytecnt = 32;
unsigned line_modulo = line_bytecnt / size; unsigned line_modulo = line_bytecnt / size;
@ -2039,7 +2039,7 @@ static void handle_md_output(struct command_context_s *cmd_ctx,
} }
u32 value=0; u32 value=0;
const u8 *value_ptr = buffer + i * size; const uint8_t *value_ptr = buffer + i * size;
switch (size) { switch (size) {
case 4: value = target_buffer_get_u32(target, value_ptr); break; case 4: value = target_buffer_get_u32(target, value_ptr); break;
case 2: value = target_buffer_get_u16(target, value_ptr); break; case 2: value = target_buffer_get_u16(target, value_ptr); break;
@ -2083,7 +2083,7 @@ static int handle_md_command(struct command_context_s *cmd_ctx, char *cmd, char
return retval; return retval;
} }
u8 *buffer = calloc(count, size); uint8_t *buffer = calloc(count, size);
target_t *target = get_current_target(cmd_ctx); target_t *target = get_current_target(cmd_ctx);
retval = target_read_memory(target, retval = target_read_memory(target,
@ -2121,7 +2121,7 @@ static int handle_mw_command(struct command_context_s *cmd_ctx, char *cmd, char
target_t *target = get_current_target(cmd_ctx); target_t *target = get_current_target(cmd_ctx);
unsigned wordsize; unsigned wordsize;
u8 value_buf[4]; uint8_t value_buf[4];
switch (cmd[2]) switch (cmd[2])
{ {
case 'w': case 'w':
@ -2197,7 +2197,7 @@ static int parse_load_image_command_args(char **args, int argc,
static int handle_load_image_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) static int handle_load_image_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{ {
u8 *buffer; uint8_t *buffer;
u32 buf_cnt; u32 buf_cnt;
u32 image_size; u32 image_size;
u32 min_address = 0; u32 min_address = 0;
@ -2294,7 +2294,7 @@ static int handle_dump_image_command(struct command_context_s *cmd_ctx, char *cm
{ {
fileio_t fileio; fileio_t fileio;
u8 buffer[560]; uint8_t buffer[560];
int retvaltemp; int retvaltemp;
duration_t duration; duration_t duration;
@ -2364,7 +2364,7 @@ static int handle_dump_image_command(struct command_context_s *cmd_ctx, char *cm
static int handle_verify_image_command_internal(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, int verify) static int handle_verify_image_command_internal(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, int verify)
{ {
u8 *buffer; uint8_t *buffer;
u32 buf_cnt; u32 buf_cnt;
u32 image_size; u32 image_size;
int i; int i;
@ -2445,11 +2445,11 @@ static int handle_verify_image_command_internal(struct command_context_s *cmd_ct
if( checksum != mem_checksum ) if( checksum != mem_checksum )
{ {
/* failed crc checksum, fall back to a binary compare */ /* failed crc checksum, fall back to a binary compare */
u8 *data; uint8_t *data;
command_print(cmd_ctx, "checksum mismatch - attempting binary compare"); command_print(cmd_ctx, "checksum mismatch - attempting binary compare");
data = (u8*)malloc(buf_cnt); data = (uint8_t*)malloc(buf_cnt);
/* Can we use 32bit word accesses? */ /* Can we use 32bit word accesses? */
int size = 1; int size = 1;
@ -2760,7 +2760,7 @@ static void writeGmon(u32 *samples, u32 sampleNum, char *filename)
writeLong(f, 0); /* padding */ writeLong(f, 0); /* padding */
writeLong(f, 0); /* padding */ writeLong(f, 0); /* padding */
u8 zero = 0; /* GMON_TAG_TIME_HIST */ uint8_t zero = 0; /* GMON_TAG_TIME_HIST */
writeData(f, &zero, 1); writeData(f, &zero, 1);
/* figure out bucket size */ /* figure out bucket size */
@ -2984,7 +2984,7 @@ static int target_mem2array(Jim_Interp *interp, target_t *target, int argc, Jim_
u32 count; u32 count;
u32 v; u32 v;
const char *varname; const char *varname;
u8 buffer[4096]; uint8_t buffer[4096];
int n, e, retval; int n, e, retval;
u32 i; u32 i;
@ -3166,7 +3166,7 @@ static int target_array2mem(Jim_Interp *interp, target_t *target, int argc, Jim_
u32 count; u32 count;
u32 v; u32 v;
const char *varname; const char *varname;
u8 buffer[4096]; uint8_t buffer[4096];
int n, e, retval; int n, e, retval;
u32 i; u32 i;
@ -3634,7 +3634,7 @@ static int tcl_target_func( Jim_Interp *interp, int argc, Jim_Obj *const *argv )
Jim_GetOptInfo goi; Jim_GetOptInfo goi;
jim_wide a,b,c; jim_wide a,b,c;
int x,y,z; int x,y,z;
u8 target_buf[32]; uint8_t target_buf[32];
Jim_Nvp *n; Jim_Nvp *n;
target_t *target; target_t *target;
struct command_context_s *cmd_ctx; struct command_context_s *cmd_ctx;
@ -4310,7 +4310,7 @@ static int jim_target( Jim_Interp *interp, int argc, Jim_Obj *const *argv )
struct FastLoad struct FastLoad
{ {
u32 address; u32 address;
u8 *data; uint8_t *data;
int length; int length;
}; };
@ -4338,7 +4338,7 @@ static void free_fastload(void)
static int handle_fast_load_image_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) static int handle_fast_load_image_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{ {
u8 *buffer; uint8_t *buffer;
u32 buf_cnt; u32 buf_cnt;
u32 image_size; u32 image_size;
u32 min_address=0; u32 min_address=0;

28
src/target/target.h
View File

@ -100,7 +100,7 @@ typedef struct working_area_s
u32 address; u32 address;
u32 size; u32 size;
int free; int free;
u8 *backup; uint8_t *backup;
struct working_area_s **user; struct working_area_s **user;
struct working_area_s *next; struct working_area_s *next;
} working_area_t; } working_area_t;
@ -331,7 +331,7 @@ extern int target_run_algorithm(struct target_s *target,
* This routine is a wrapper for target->type->read_memory. * This routine is a wrapper for target->type->read_memory.
*/ */
extern int target_read_memory(struct target_s *target, extern int target_read_memory(struct target_s *target,
u32 address, u32 size, u32 count, u8 *buffer); u32 address, u32 size, u32 count, uint8_t *buffer);
/** /**
* Write @a count items of @a size bytes to the memory of @a target at * Write @a count items of @a size bytes to the memory of @a target at
* the @a address given. * the @a address given.
@ -339,7 +339,7 @@ extern int target_read_memory(struct target_s *target,
* This routine is wrapper for target->type->write_memory. * This routine is wrapper for target->type->write_memory.
*/ */
extern int target_write_memory(struct target_s *target, extern int target_write_memory(struct target_s *target,
u32 address, u32 size, u32 count, u8 *buffer); u32 address, u32 size, u32 count, uint8_t *buffer);
/** /**
* Write @a count items of 4 bytes to the memory of @a target at * Write @a count items of 4 bytes to the memory of @a target at
@ -349,10 +349,10 @@ extern int target_write_memory(struct target_s *target,
* This routine is wrapper for target->type->bulk_write_memory. * This routine is wrapper for target->type->bulk_write_memory.
*/ */
extern int target_bulk_write_memory(struct target_s *target, extern int target_bulk_write_memory(struct target_s *target,
u32 address, u32 count, u8 *buffer); u32 address, u32 count, uint8_t *buffer);
extern int target_write_buffer(struct target_s *target, u32 address, u32 size, u8 *buffer); extern int target_write_buffer(struct target_s *target, u32 address, u32 size, uint8_t *buffer);
extern int target_read_buffer(struct target_s *target, u32 address, u32 size, u8 *buffer); extern int target_read_buffer(struct target_s *target, u32 address, u32 size, uint8_t *buffer);
extern int target_checksum_memory(struct target_s *target, u32 address, u32 size, u32* crc); extern int target_checksum_memory(struct target_s *target, u32 address, u32 size, u32* crc);
extern int target_blank_check_memory(struct target_s *target, u32 address, u32 size, u32* blank); extern int target_blank_check_memory(struct target_s *target, u32 address, u32 size, u32* blank);
extern int target_wait_state(target_t *target, enum target_state state, int ms); extern int target_wait_state(target_t *target, enum target_state state, int ms);
@ -379,19 +379,19 @@ extern target_t *all_targets;
extern target_event_callback_t *target_event_callbacks; extern target_event_callback_t *target_event_callbacks;
extern target_timer_callback_t *target_timer_callbacks; extern target_timer_callback_t *target_timer_callbacks;
extern u32 target_buffer_get_u32(target_t *target, const u8 *buffer); extern u32 target_buffer_get_u32(target_t *target, const uint8_t *buffer);
extern u16 target_buffer_get_u16(target_t *target, const u8 *buffer); extern u16 target_buffer_get_u16(target_t *target, const uint8_t *buffer);
extern u8 target_buffer_get_u8 (target_t *target, const u8 *buffer); extern uint8_t target_buffer_get_u8 (target_t *target, const uint8_t *buffer);
extern void target_buffer_set_u32(target_t *target, u8 *buffer, u32 value); extern void target_buffer_set_u32(target_t *target, uint8_t *buffer, u32 value);
extern void target_buffer_set_u16(target_t *target, u8 *buffer, u16 value); extern void target_buffer_set_u16(target_t *target, uint8_t *buffer, u16 value);
extern void target_buffer_set_u8 (target_t *target, u8 *buffer, u8 value); extern void target_buffer_set_u8 (target_t *target, uint8_t *buffer, uint8_t value);
int target_read_u32(struct target_s *target, u32 address, u32 *value); int target_read_u32(struct target_s *target, u32 address, u32 *value);
int target_read_u16(struct target_s *target, u32 address, u16 *value); int target_read_u16(struct target_s *target, u32 address, u16 *value);
int target_read_u8(struct target_s *target, u32 address, u8 *value); int target_read_u8(struct target_s *target, u32 address, uint8_t *value);
int target_write_u32(struct target_s *target, u32 address, u32 value); int target_write_u32(struct target_s *target, u32 address, u32 value);
int target_write_u16(struct target_s *target, u32 address, u16 value); int target_write_u16(struct target_s *target, u32 address, u16 value);
int target_write_u8(struct target_s *target, u32 address, u8 value); int target_write_u8(struct target_s *target, u32 address, uint8_t value);
/* Issues USER() statements with target state information */ /* Issues USER() statements with target state information */
int target_arch_state(struct target_s *target); int target_arch_state(struct target_s *target);

8
src/target/target_request.c
View File

@ -42,7 +42,7 @@ static int target_asciimsg(target_t *target, u32 length)
char *msg = malloc(CEIL(length + 1, 4) * 4); char *msg = malloc(CEIL(length + 1, 4) * 4);
debug_msg_receiver_t *c = target->dbgmsg; debug_msg_receiver_t *c = target->dbgmsg;
target->type->target_request_data(target, CEIL(length, 4), (u8*)msg); target->type->target_request_data(target, CEIL(length, 4), (uint8_t*)msg);
msg[length] = 0; msg[length] = 0;
LOG_DEBUG("%s", msg); LOG_DEBUG("%s", msg);
@ -56,7 +56,7 @@ static int target_asciimsg(target_t *target, u32 length)
return ERROR_OK; return ERROR_OK;
} }
static int target_charmsg(target_t *target, u8 msg) static int target_charmsg(target_t *target, uint8_t msg)
{ {
LOG_USER_N("%c", msg); LOG_USER_N("%c", msg);
@ -65,7 +65,7 @@ static int target_charmsg(target_t *target, u8 msg)
static int target_hexmsg(target_t *target, int size, u32 length) static int target_hexmsg(target_t *target, int size, u32 length)
{ {
u8 *data = malloc(CEIL(length * size, 4) * 4); uint8_t *data = malloc(CEIL(length * size, 4) * 4);
char line[128]; char line[128];
int line_len; int line_len;
debug_msg_receiver_t *c = target->dbgmsg; debug_msg_receiver_t *c = target->dbgmsg;
@ -73,7 +73,7 @@ static int target_hexmsg(target_t *target, int size, u32 length)
LOG_DEBUG("size: %i, length: %i", size, length); LOG_DEBUG("size: %i, length: %i", size, length);
target->type->target_request_data(target, CEIL(length * size, 4), (u8*)data); target->type->target_request_data(target, CEIL(length * size, 4), (uint8_t*)data);
line_len = 0; line_len = 0;
for (i = 0; i < length; i++) for (i = 0; i < length; i++)

12
src/target/target_type.h
View File

@ -28,7 +28,7 @@ struct target_type_s
int (*arch_state)(struct target_s *target); int (*arch_state)(struct target_s *target);
/* target request support */ /* target request support */
int (*target_request_data)(struct target_s *target, u32 size, u8 *buffer); int (*target_request_data)(struct target_s *target, u32 size, uint8_t *buffer);
/* halt will log a warning, but return ERROR_OK if the target is already halted. */ /* halt will log a warning, but return ERROR_OK if the target is already halted. */
int (*halt)(struct target_s *target); int (*halt)(struct target_s *target);
@ -72,25 +72,25 @@ struct target_type_s
* size: 1 = byte (8bit), 2 = half-word (16bit), 4 = word (32bit) * size: 1 = byte (8bit), 2 = half-word (16bit), 4 = word (32bit)
* count: number of items of <size> * count: number of items of <size>
*/ */
int (*read_memory_imp)(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer); int (*read_memory_imp)(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
/** /**
* Target memory read callback. Do @b not call this function * Target memory read callback. Do @b not call this function
* directly, use target_read_memory() instead. * directly, use target_read_memory() instead.
*/ */
int (*read_memory)(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer); int (*read_memory)(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
int (*write_memory_imp)(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer); int (*write_memory_imp)(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
/** /**
* Target memory write callback. Do @b not call this function * Target memory write callback. Do @b not call this function
* directly, use target_write_memory() instead. * directly, use target_write_memory() instead.
*/ */
int (*write_memory)(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer); int (*write_memory)(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
/** /**
* Write target memory in multiples of 4 bytes, optimized for * Write target memory in multiples of 4 bytes, optimized for
* writing large quantities of data. Do @b not call this * writing large quantities of data. Do @b not call this
* function directly, use target_bulk_write_memory() instead. * function directly, use target_bulk_write_memory() instead.
*/ */
int (*bulk_write_memory)(struct target_s *target, u32 address, u32 count, u8 *buffer); int (*bulk_write_memory)(struct target_s *target, u32 address, u32 count, uint8_t *buffer);
int (*checksum_memory)(struct target_s *target, u32 address, u32 count, u32* checksum); int (*checksum_memory)(struct target_s *target, u32 address, u32 count, u32* checksum);
int (*blank_check_memory)(struct target_s *target, u32 address, u32 count, u32* blank); int (*blank_check_memory)(struct target_s *target, u32 address, u32 count, u32* blank);

116
src/target/xscale.c
View File

@ -57,9 +57,9 @@ int xscale_set_reg_u32(reg_t *reg, u32 value);
int xscale_read_core_reg(struct target_s *target, int num, enum armv4_5_mode mode); int xscale_read_core_reg(struct target_s *target, int num, enum armv4_5_mode mode);
int xscale_write_core_reg(struct target_s *target, int num, enum armv4_5_mode mode, u32 value); int xscale_write_core_reg(struct target_s *target, int num, enum armv4_5_mode mode, u32 value);
int xscale_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer); int xscale_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
int xscale_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer); int xscale_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
int xscale_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffer); int xscale_bulk_write_memory(target_t *target, u32 address, u32 count, uint8_t *buffer);
int xscale_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint); int xscale_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint);
int xscale_remove_breakpoint(struct target_s *target, breakpoint_t *breakpoint); int xscale_remove_breakpoint(struct target_s *target, breakpoint_t *breakpoint);
@ -170,7 +170,7 @@ xscale_reg_t xscale_reg_arch_info[] =
int xscale_reg_arch_type = -1; int xscale_reg_arch_type = -1;
int xscale_get_reg(reg_t *reg); int xscale_get_reg(reg_t *reg);
int xscale_set_reg(reg_t *reg, u8 *buf); int xscale_set_reg(reg_t *reg, uint8_t *buf);
int xscale_get_arch_pointers(target_t *target, armv4_5_common_t **armv4_5_p, xscale_common_t **xscale_p) int xscale_get_arch_pointers(target_t *target, armv4_5_common_t **armv4_5_p, xscale_common_t **xscale_p)
{ {
@ -209,7 +209,7 @@ int xscale_jtag_set_instr(jtag_tap_t *tap, u32 new_instr)
field.out_value = calloc(CEIL(field.num_bits, 8), 1); field.out_value = calloc(CEIL(field.num_bits, 8), 1);
buf_set_u32(field.out_value, 0, field.num_bits, new_instr); buf_set_u32(field.out_value, 0, field.num_bits, new_instr);
u8 tmp[4]; uint8_t tmp[4];
field.in_value = tmp; field.in_value = tmp;
jtag_add_ir_scan(1, &field, jtag_get_end_state()); jtag_add_ir_scan(1, &field, jtag_get_end_state());
@ -231,12 +231,12 @@ int xscale_read_dcsr(target_t *target)
int retval; int retval;
scan_field_t fields[3]; scan_field_t fields[3];
u8 field0 = 0x0; uint8_t field0 = 0x0;
u8 field0_check_value = 0x2; uint8_t field0_check_value = 0x2;
u8 field0_check_mask = 0x7; uint8_t field0_check_mask = 0x7;
u8 field2 = 0x0; uint8_t field2 = 0x0;
u8 field2_check_value = 0x0; uint8_t field2_check_value = 0x0;
u8 field2_check_mask = 0x1; uint8_t field2_check_mask = 0x1;
jtag_set_end_state(TAP_DRPAUSE); jtag_set_end_state(TAP_DRPAUSE);
xscale_jtag_set_instr(xscale->jtag_info.tap, xscale->jtag_info.dcsr); xscale_jtag_set_instr(xscale->jtag_info.tap, xscale->jtag_info.dcsr);
@ -247,7 +247,7 @@ int xscale_read_dcsr(target_t *target)
fields[0].tap = xscale->jtag_info.tap; fields[0].tap = xscale->jtag_info.tap;
fields[0].num_bits = 3; fields[0].num_bits = 3;
fields[0].out_value = &field0; fields[0].out_value = &field0;
u8 tmp; uint8_t tmp;
fields[0].in_value = &tmp; fields[0].in_value = &tmp;
fields[1].tap = xscale->jtag_info.tap; fields[1].tap = xscale->jtag_info.tap;
@ -259,7 +259,7 @@ int xscale_read_dcsr(target_t *target)
fields[2].tap = xscale->jtag_info.tap; fields[2].tap = xscale->jtag_info.tap;
fields[2].num_bits = 1; fields[2].num_bits = 1;
fields[2].out_value = &field2; fields[2].out_value = &field2;
u8 tmp2; uint8_t tmp2;
fields[2].in_value = &tmp2; fields[2].in_value = &tmp2;
jtag_add_dr_scan(3, fields, jtag_get_end_state()); jtag_add_dr_scan(3, fields, jtag_get_end_state());
@ -293,7 +293,7 @@ int xscale_read_dcsr(target_t *target)
} }
static void xscale_getbuf(u8 *in) static void xscale_getbuf(uint8_t *in)
{ {
*((u32 *)in)=buf_get_u32(in, 0, 32); *((u32 *)in)=buf_get_u32(in, 0, 32);
} }
@ -310,12 +310,12 @@ int xscale_receive(target_t *target, u32 *buffer, int num_words)
tap_state_t path[3]; tap_state_t path[3];
scan_field_t fields[3]; scan_field_t fields[3];
u8 *field0 = malloc(num_words * 1); uint8_t *field0 = malloc(num_words * 1);
u8 field0_check_value = 0x2; uint8_t field0_check_value = 0x2;
u8 field0_check_mask = 0x6; uint8_t field0_check_mask = 0x6;
u32 *field1 = malloc(num_words * 4); u32 *field1 = malloc(num_words * 4);
u8 field2_check_value = 0x0; uint8_t field2_check_value = 0x0;
u8 field2_check_mask = 0x1; uint8_t field2_check_mask = 0x1;
int words_done = 0; int words_done = 0;
int words_scheduled = 0; int words_scheduled = 0;
@ -361,11 +361,11 @@ int xscale_receive(target_t *target, u32 *buffer, int num_words)
jtag_add_pathmove(3, path); jtag_add_pathmove(3, path);
fields[1].in_value = (u8 *)(field1+i); fields[1].in_value = (uint8_t *)(field1+i);
jtag_add_dr_scan_check(3, fields, jtag_set_end_state(TAP_IDLE)); jtag_add_dr_scan_check(3, fields, jtag_set_end_state(TAP_IDLE));
jtag_add_callback(xscale_getbuf, (u8 *)(field1+i)); jtag_add_callback(xscale_getbuf, (uint8_t *)(field1+i));
words_scheduled++; words_scheduled++;
} }
@ -405,7 +405,7 @@ int xscale_receive(target_t *target, u32 *buffer, int num_words)
} }
for (i = 0; i < num_words; i++) for (i = 0; i < num_words; i++)
*(buffer++) = buf_get_u32((u8*)&field1[i], 0, 32); *(buffer++) = buf_get_u32((uint8_t*)&field1[i], 0, 32);
free(field1); free(field1);
@ -423,11 +423,11 @@ int xscale_read_tx(target_t *target, int consume)
struct timeval timeout, now; struct timeval timeout, now;
scan_field_t fields[3]; scan_field_t fields[3];
u8 field0_in = 0x0; uint8_t field0_in = 0x0;
u8 field0_check_value = 0x2; uint8_t field0_check_value = 0x2;
u8 field0_check_mask = 0x6; uint8_t field0_check_mask = 0x6;
u8 field2_check_value = 0x0; uint8_t field2_check_value = 0x0;
u8 field2_check_mask = 0x1; uint8_t field2_check_mask = 0x1;
jtag_set_end_state(TAP_IDLE); jtag_set_end_state(TAP_IDLE);
@ -458,7 +458,7 @@ int xscale_read_tx(target_t *target, int consume)
fields[2].tap = xscale->jtag_info.tap; fields[2].tap = xscale->jtag_info.tap;
fields[2].num_bits = 1; fields[2].num_bits = 1;
fields[2].out_value = NULL; fields[2].out_value = NULL;
u8 tmp; uint8_t tmp;
fields[2].in_value = &tmp; fields[2].in_value = &tmp;
gettimeofday(&timeout, NULL); gettimeofday(&timeout, NULL);
@ -524,13 +524,13 @@ int xscale_write_rx(target_t *target)
struct timeval timeout, now; struct timeval timeout, now;
scan_field_t fields[3]; scan_field_t fields[3];
u8 field0_out = 0x0; uint8_t field0_out = 0x0;
u8 field0_in = 0x0; uint8_t field0_in = 0x0;
u8 field0_check_value = 0x2; uint8_t field0_check_value = 0x2;
u8 field0_check_mask = 0x6; uint8_t field0_check_mask = 0x6;
u8 field2 = 0x0; uint8_t field2 = 0x0;
u8 field2_check_value = 0x0; uint8_t field2_check_value = 0x0;
u8 field2_check_mask = 0x1; uint8_t field2_check_mask = 0x1;
jtag_set_end_state(TAP_IDLE); jtag_set_end_state(TAP_IDLE);
@ -550,7 +550,7 @@ int xscale_write_rx(target_t *target)
fields[2].tap = xscale->jtag_info.tap; fields[2].tap = xscale->jtag_info.tap;
fields[2].num_bits = 1; fields[2].num_bits = 1;
fields[2].out_value = &field2; fields[2].out_value = &field2;
u8 tmp; uint8_t tmp;
fields[2].in_value = &tmp; fields[2].in_value = &tmp;
gettimeofday(&timeout, NULL); gettimeofday(&timeout, NULL);
@ -604,7 +604,7 @@ int xscale_write_rx(target_t *target)
} }
/* send count elements of size byte to the debug handler */ /* send count elements of size byte to the debug handler */
int xscale_send(target_t *target, u8 *buffer, int count, int size) int xscale_send(target_t *target, uint8_t *buffer, int count, int size)
{ {
armv4_5_common_t *armv4_5 = target->arch_info; armv4_5_common_t *armv4_5 = target->arch_info;
xscale_common_t *xscale = armv4_5->arch_info; xscale_common_t *xscale = armv4_5->arch_info;
@ -688,12 +688,12 @@ int xscale_write_dcsr(target_t *target, int hold_rst, int ext_dbg_brk)
int retval; int retval;
scan_field_t fields[3]; scan_field_t fields[3];
u8 field0 = 0x0; uint8_t field0 = 0x0;
u8 field0_check_value = 0x2; uint8_t field0_check_value = 0x2;
u8 field0_check_mask = 0x7; uint8_t field0_check_mask = 0x7;
u8 field2 = 0x0; uint8_t field2 = 0x0;
u8 field2_check_value = 0x0; uint8_t field2_check_value = 0x0;
u8 field2_check_mask = 0x1; uint8_t field2_check_mask = 0x1;
if (hold_rst != -1) if (hold_rst != -1)
xscale->hold_rst = hold_rst; xscale->hold_rst = hold_rst;
@ -710,7 +710,7 @@ int xscale_write_dcsr(target_t *target, int hold_rst, int ext_dbg_brk)
fields[0].tap = xscale->jtag_info.tap; fields[0].tap = xscale->jtag_info.tap;
fields[0].num_bits = 3; fields[0].num_bits = 3;
fields[0].out_value = &field0; fields[0].out_value = &field0;
u8 tmp; uint8_t tmp;
fields[0].in_value = &tmp; fields[0].in_value = &tmp;
fields[1].tap = xscale->jtag_info.tap; fields[1].tap = xscale->jtag_info.tap;
@ -722,7 +722,7 @@ int xscale_write_dcsr(target_t *target, int hold_rst, int ext_dbg_brk)
fields[2].tap = xscale->jtag_info.tap; fields[2].tap = xscale->jtag_info.tap;
fields[2].num_bits = 1; fields[2].num_bits = 1;
fields[2].out_value = &field2; fields[2].out_value = &field2;
u8 tmp2; uint8_t tmp2;
fields[2].in_value = &tmp2; fields[2].in_value = &tmp2;
jtag_add_dr_scan(3, fields, jtag_get_end_state()); jtag_add_dr_scan(3, fields, jtag_get_end_state());
@ -758,8 +758,8 @@ int xscale_load_ic(target_t *target, int mini, u32 va, u32 buffer[8])
{ {
armv4_5_common_t *armv4_5 = target->arch_info; armv4_5_common_t *armv4_5 = target->arch_info;
xscale_common_t *xscale = armv4_5->arch_info; xscale_common_t *xscale = armv4_5->arch_info;
u8 packet[4]; uint8_t packet[4];
u8 cmd; uint8_t cmd;
int word; int word;
scan_field_t fields[2]; scan_field_t fields[2];
@ -828,8 +828,8 @@ int xscale_invalidate_ic_line(target_t *target, u32 va)
{ {
armv4_5_common_t *armv4_5 = target->arch_info; armv4_5_common_t *armv4_5 = target->arch_info;
xscale_common_t *xscale = armv4_5->arch_info; xscale_common_t *xscale = armv4_5->arch_info;
u8 packet[4]; uint8_t packet[4];
u8 cmd; uint8_t cmd;
scan_field_t fields[2]; scan_field_t fields[2];
@ -1678,7 +1678,7 @@ int xscale_deassert_reset(target_t *target)
while (binary_size > 0) while (binary_size > 0)
{ {
u32 cache_line[8]; u32 cache_line[8];
u8 buffer[32]; uint8_t buffer[32];
if ((retval = fileio_read(&debug_handler, 32, buffer, &buf_cnt)) != ERROR_OK) if ((retval = fileio_read(&debug_handler, 32, buffer, &buf_cnt)) != ERROR_OK)
{ {
@ -1905,7 +1905,7 @@ int xscale_restore_context(target_t *target)
return ERROR_OK; return ERROR_OK;
} }
int xscale_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer) int xscale_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
{ {
armv4_5_common_t *armv4_5 = target->arch_info; armv4_5_common_t *armv4_5 = target->arch_info;
xscale_common_t *xscale = armv4_5->arch_info; xscale_common_t *xscale = armv4_5->arch_info;
@ -1984,7 +1984,7 @@ int xscale_read_memory(struct target_s *target, u32 address, u32 size, u32 count
return ERROR_OK; return ERROR_OK;
} }
int xscale_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer) int xscale_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
{ {
armv4_5_common_t *armv4_5 = target->arch_info; armv4_5_common_t *armv4_5 = target->arch_info;
xscale_common_t *xscale = armv4_5->arch_info; xscale_common_t *xscale = armv4_5->arch_info;
@ -2062,7 +2062,7 @@ int xscale_write_memory(struct target_s *target, u32 address, u32 size, u32 coun
return ERROR_OK; return ERROR_OK;
} }
int xscale_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffer) int xscale_bulk_write_memory(target_t *target, u32 address, u32 count, uint8_t *buffer)
{ {
return xscale_write_memory(target, address, 4, count, buffer); return xscale_write_memory(target, address, 4, count, buffer);
} }
@ -2329,7 +2329,7 @@ int xscale_set_watchpoint(struct target_s *target, watchpoint_t *watchpoint)
{ {
armv4_5_common_t *armv4_5 = target->arch_info; armv4_5_common_t *armv4_5 = target->arch_info;
xscale_common_t *xscale = armv4_5->arch_info; xscale_common_t *xscale = armv4_5->arch_info;
u8 enable=0; uint8_t enable=0;
reg_t *dbcon = &xscale->reg_cache->reg_list[XSCALE_DBCON]; reg_t *dbcon = &xscale->reg_cache->reg_list[XSCALE_DBCON];
u32 dbcon_value = buf_get_u32(dbcon->value, 0, 32); u32 dbcon_value = buf_get_u32(dbcon->value, 0, 32);
@ -2535,7 +2535,7 @@ int xscale_get_reg(reg_t *reg)
return ERROR_OK; return ERROR_OK;
} }
int xscale_set_reg(reg_t *reg, u8* buf) int xscale_set_reg(reg_t *reg, uint8_t* buf)
{ {
xscale_reg_t *arch_info = reg->arch_info; xscale_reg_t *arch_info = reg->arch_info;
target_t *target = arch_info->target; target_t *target = arch_info->target;
@ -2583,7 +2583,7 @@ int xscale_set_reg(reg_t *reg, u8* buf)
/* convenience wrapper to access XScale specific registers */ /* convenience wrapper to access XScale specific registers */
int xscale_set_reg_u32(reg_t *reg, u32 value) int xscale_set_reg_u32(reg_t *reg, u32 value)
{ {
u8 buf[4]; uint8_t buf[4];
buf_set_u32(buf, 0, 32, value); buf_set_u32(buf, 0, 32, value);
@ -2723,7 +2723,7 @@ int xscale_read_instruction(target_t *target, arm_instruction_t *instruction)
if (xscale->trace.core_state == ARMV4_5_STATE_ARM) if (xscale->trace.core_state == ARMV4_5_STATE_ARM)
{ {
u8 buf[4]; uint8_t buf[4];
if ((retval = image_read_section(xscale->trace.image, section, if ((retval = image_read_section(xscale->trace.image, section,
xscale->trace.current_pc - xscale->trace.image->sections[section].base_address, xscale->trace.current_pc - xscale->trace.image->sections[section].base_address,
4, buf, &size_read)) != ERROR_OK) 4, buf, &size_read)) != ERROR_OK)
@ -2736,7 +2736,7 @@ int xscale_read_instruction(target_t *target, arm_instruction_t *instruction)
} }
else if (xscale->trace.core_state == ARMV4_5_STATE_THUMB) else if (xscale->trace.core_state == ARMV4_5_STATE_THUMB)
{ {
u8 buf[2]; uint8_t buf[2];
if ((retval = image_read_section(xscale->trace.image, section, if ((retval = image_read_section(xscale->trace.image, section,
xscale->trace.current_pc - xscale->trace.image->sections[section].base_address, xscale->trace.current_pc - xscale->trace.image->sections[section].base_address,
2, buf, &size_read)) != ERROR_OK) 2, buf, &size_read)) != ERROR_OK)

8
src/target/xscale.h
View File

@ -57,7 +57,7 @@ enum xscale_trace_entry_type
typedef struct xscale_trace_entry_s typedef struct xscale_trace_entry_s
{ {
u8 data; uint8_t data;
enum xscale_trace_entry_type type; enum xscale_trace_entry_type type;
} xscale_trace_entry_t; } xscale_trace_entry_t;
@ -105,8 +105,8 @@ typedef struct xscale_common_s
u32 high_vectors[8]; u32 high_vectors[8];
/* static low vectors */ /* static low vectors */
u8 static_low_vectors_set; /* bit field with static vectors set by the user */ uint8_t static_low_vectors_set; /* bit field with static vectors set by the user */
u8 static_high_vectors_set; /* bit field with static vectors set by the user */ uint8_t static_high_vectors_set; /* bit field with static vectors set by the user */
u32 static_low_vectors[8]; u32 static_low_vectors[8];
u32 static_high_vectors[8]; u32 static_high_vectors[8];
@ -127,7 +127,7 @@ typedef struct xscale_common_s
u32 arm_bkpt; u32 arm_bkpt;
u16 thumb_bkpt; u16 thumb_bkpt;
u8 vector_catch; uint8_t vector_catch;
xscale_trace_t trace; xscale_trace_t trace;