From 85bfab36ad549aa53e5054bb5b850d11f8f80386 Mon Sep 17 00:00:00 2001 From: Tim Newsome Date: Wed, 18 Oct 2017 12:43:03 -0700 Subject: [PATCH] Remove unused functionality. Change-Id: I0c1464e2e6aa12d0cb1025ed0a7c1c483e7403b7 --- src/target/riscv/program.c | 63 ++------------------------------------ src/target/riscv/program.h | 13 +------- 2 files changed, 3 insertions(+), 73 deletions(-) diff --git a/src/target/riscv/program.c b/src/target/riscv/program.c index 7175fa344..b4f2b55ad 100644 --- a/src/target/riscv/program.c +++ b/src/target/riscv/program.c @@ -21,7 +21,6 @@ int riscv_program_init(struct riscv_program *p, struct target *target) memset(p, 0, sizeof(*p)); p->target = target; p->instruction_count = 0; - p->data_count = 0; p->writes_memory = 0; p->target_xlen = riscv_xlen(target); for (size_t i = 0; i < RISCV_REGISTER_COUNT; ++i) { @@ -84,7 +83,7 @@ int riscv_program_exec(struct riscv_program *p, struct target *t) } for (size_t i = 0; i < riscv_debug_buffer_size(p->target); ++i) - if (i >= riscv_debug_buffer_size(p->target) - p->data_count) + if (i >= riscv_debug_buffer_size(p->target)) p->debug_buffer[i] = riscv_read_debug_buffer(t, i); for (size_t i = GDB_REGNO_XPR0; i <= GDB_REGNO_XPR31; ++i) @@ -298,56 +297,6 @@ int riscv_program_addi(struct riscv_program *p, enum gdb_regno d, enum gdb_regno return riscv_program_insert(p, addi(d, s, u)); } -int riscv_program_fsx(struct riscv_program *p, enum gdb_regno d, riscv_addr_t addr) -{ - assert(d >= GDB_REGNO_FPR0); - assert(d <= GDB_REGNO_FPR31); - enum gdb_regno t = riscv_program_gah(p, addr) == 0 - ? GDB_REGNO_X0 - : riscv_program_gettemp(p); - if (riscv_program_lah(p, t, addr) != ERROR_OK) - return ERROR_FAIL; - uint32_t instruction; - switch (p->target->reg_cache->reg_list[GDB_REGNO_FPR0].size) { - case 64: - instruction = fsd(d - GDB_REGNO_FPR0, t, riscv_program_gal(p, addr)); - break; - case 32: - instruction = fsw(d - GDB_REGNO_FPR0, t, riscv_program_gal(p, addr)); - break; - default: - return ERROR_FAIL; - } - if (riscv_program_insert(p, instruction) != ERROR_OK) - return ERROR_FAIL; - riscv_program_puttemp(p, t); - p->writes_memory = true; - return ERROR_OK; -} - -int riscv_program_flx(struct riscv_program *p, enum gdb_regno d, riscv_addr_t addr) -{ - assert(d >= GDB_REGNO_FPR0); - assert(d <= GDB_REGNO_FPR31); - enum gdb_regno t = riscv_program_gah(p, addr) == 0 ? GDB_REGNO_X0 : d; - if (riscv_program_lah(p, t, addr) != ERROR_OK) - return ERROR_FAIL; - uint32_t instruction; - switch (p->target->reg_cache->reg_list[GDB_REGNO_FPR0].size) { - case 64: - instruction = fld(d - GDB_REGNO_FPR0, t, riscv_program_gal(p, addr)); - break; - case 32: - instruction = flw(d - GDB_REGNO_FPR0, t, riscv_program_gal(p, addr)); - break; - default: - return ERROR_FAIL; - } - if (riscv_program_insert(p, instruction) != ERROR_OK) - return ERROR_FAIL; - return ERROR_OK; -} - int riscv_program_li(struct riscv_program *p, enum gdb_regno d, riscv_reg_t c) { if (riscv_program_lui(p, d, c >> 12) != ERROR_OK) @@ -371,13 +320,6 @@ int riscv_program_do_restore_register(struct riscv_program *p, enum gdb_regno r) return ERROR_OK; } -void riscv_program_reserve_register(struct riscv_program *p, enum gdb_regno r) -{ - assert(r < RISCV_REGISTER_COUNT); - assert(p->in_use[r] == 0); - p->in_use[r] = 1; -} - enum gdb_regno riscv_program_gettemp(struct riscv_program *p) { for (size_t i = GDB_REGNO_S0; i <= GDB_REGNO_XPR31; ++i) { @@ -431,10 +373,9 @@ int riscv_program_lal(struct riscv_program *p, enum gdb_regno d, riscv_addr_t ad int riscv_program_insert(struct riscv_program *p, riscv_insn_t i) { - if (p->instruction_count + p->data_count + 1 > riscv_debug_buffer_size(p->target)) { + if (p->instruction_count >= riscv_debug_buffer_size(p->target)) { LOG_ERROR("Unable to insert instruction:"); LOG_ERROR(" instruction_count=%d", (int)p->instruction_count); - LOG_ERROR(" data_count =%d", (int)p->data_count); LOG_ERROR(" buffer size =%d", (int)riscv_debug_buffer_size(p->target)); abort(); } diff --git a/src/target/riscv/program.h b/src/target/riscv/program.h index e5f6c29e2..56a1a9a0a 100644 --- a/src/target/riscv/program.h +++ b/src/target/riscv/program.h @@ -15,11 +15,8 @@ struct riscv_program { uint32_t debug_buffer[RISCV_MAX_DEBUG_BUFFER_SIZE]; - /* The debug buffer is allocated in two directions: instructions go at - * the start, while data goes at the end. When they meet in the middle - * this blows up. */ + /* Number of 32-bit instructions in the program. */ size_t instruction_count; - size_t data_count; /* Side effects of executing this program. These must be accounted for * in order to maintain correct executing of the target system. */ @@ -29,10 +26,6 @@ struct riscv_program { /* When a register is used it will be set in this array. */ bool in_use[RISCV_REGISTER_COUNT]; - /* Remembers the registers that have been saved into dscratch - * registers. These are restored */ - enum gdb_regno dscratch_saved[RISCV_DSCRATCH_COUNT]; - /* XLEN on the target. */ int target_xlen; }; @@ -101,9 +94,6 @@ int riscv_program_ebreak(struct riscv_program *p); int riscv_program_lui(struct riscv_program *p, enum gdb_regno d, int32_t u); int riscv_program_addi(struct riscv_program *p, enum gdb_regno d, enum gdb_regno s, int16_t i); -int riscv_program_fsx(struct riscv_program *p, enum gdb_regno s, riscv_addr_t addr); -int riscv_program_flx(struct riscv_program *p, enum gdb_regno d, riscv_addr_t addr); - /* Assembler macros. */ int riscv_program_li(struct riscv_program *p, enum gdb_regno d, riscv_reg_t c); int riscv_program_la(struct riscv_program *p, enum gdb_regno d, riscv_addr_t a); @@ -113,7 +103,6 @@ int riscv_program_la(struct riscv_program *p, enum gdb_regno d, riscv_addr_t a); * reserving registers -- it's expected that this has been called as the first * thing in the program's execution to reserve registers that can't be touched * by the program's execution. */ -void riscv_program_reserve_register(struct riscv_program *p, enum gdb_regno r); enum gdb_regno riscv_program_gettemp(struct riscv_program *p); void riscv_program_puttemp(struct riscv_program *p, enum gdb_regno r);