TCL/SPEAr: Join two initialization files.
The support for SPEAr3xx family members does not require dedicated files for each member. Join the initialization scripts in a single file. Change-Id: I45e9dc64809a6f52c4592e3e0eef5529394887c6 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/227 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
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@ -14,7 +14,6 @@
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source [find mem_helper.tcl]
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source [find mem_helper.tcl]
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source [find target/spear3xx.cfg]
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source [find target/spear3xx.cfg]
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source [find chip/st/spear/spear310.tcl]
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source [find chip/st/spear/spear3xx_ddr.tcl]
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source [find chip/st/spear/spear3xx_ddr.tcl]
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source [find chip/st/spear/spear3xx.tcl]
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source [find chip/st/spear/spear3xx.tcl]
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@ -1,40 +0,0 @@
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# Specific init scripts for ST SPEAr310 system on chip
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# http://www.st.com/spear
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#
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# Date: 2010-09-23
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# Author: Antonio Borneo <borneo.antonio@gmail.com>
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proc sp310_init {} {
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mww 0xb4000008 0x00002ff4 ;# RAS function enable
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mww 0xfca80050 0x00000001 ;# Enable clk mem port 1
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mww 0xfca8013c 0x2f7bc210 ;# plgpio_pad_drv
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mww 0xfca80140 0x017bdef6
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}
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proc sp310_emi_init {} {
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# set EMI pad strength
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mmw 0xfca80134 0x0e000000 0x00000000
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mmw 0xfca80138 0x0e739ce7 0x00000000
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mmw 0xfca8013c 0x00039ce7 0x00000000
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# set safe EMI timing as in BootROM
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#mww 0x4f000000 0x0000000f ;# tAP_0_reg
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#mww 0x4f000004 0x00000000 ;# tSDP_0_reg
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#mww 0x4f000008 0x000000ff ;# tDPw_0_reg
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#mww 0x4f00000c 0x00000111 ;# tDPr_0_reg
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#mww 0x4f000010 0x00000002 ;# tDCS_0_reg
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# set fast EMI timing as in Linux
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mww 0x4f000000 0x00000010 ;# tAP_0_reg
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mww 0x4f000004 0x00000005 ;# tSDP_0_reg
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mww 0x4f000008 0x0000000a ;# tDPw_0_reg
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mww 0x4f00000c 0x0000000a ;# tDPr_0_reg
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mww 0x4f000010 0x00000005 ;# tDCS_0_re
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# 32bit wide, 8/16/32bit access
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mww 0x4f000014 0x0000000e ;# control_0_reg
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mww 0x4f000094 0x0000003f ;# ack_reg
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}
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@ -78,3 +78,39 @@ proc sp3xx_common_init {} {
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mww 0xfca80098 0x80000007
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mww 0xfca80098 0x80000007
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mww 0xfca8009c 0x80000007
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mww 0xfca8009c 0x80000007
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}
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}
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# Specific init scripts for ST SPEAr310 system on chip
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proc sp310_init {} {
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mww 0xb4000008 0x00002ff4 ;# RAS function enable
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mww 0xfca80050 0x00000001 ;# Enable clk mem port 1
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mww 0xfca8013c 0x2f7bc210 ;# plgpio_pad_drv
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mww 0xfca80140 0x017bdef6
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}
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proc sp310_emi_init {} {
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# set EMI pad strength
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mmw 0xfca80134 0x0e000000 0x00000000
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mmw 0xfca80138 0x0e739ce7 0x00000000
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mmw 0xfca8013c 0x00039ce7 0x00000000
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# set safe EMI timing as in BootROM
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#mww 0x4f000000 0x0000000f ;# tAP_0_reg
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#mww 0x4f000004 0x00000000 ;# tSDP_0_reg
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#mww 0x4f000008 0x000000ff ;# tDPw_0_reg
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#mww 0x4f00000c 0x00000111 ;# tDPr_0_reg
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#mww 0x4f000010 0x00000002 ;# tDCS_0_reg
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# set fast EMI timing as in Linux
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mww 0x4f000000 0x00000010 ;# tAP_0_reg
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mww 0x4f000004 0x00000005 ;# tSDP_0_reg
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mww 0x4f000008 0x0000000a ;# tDPw_0_reg
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mww 0x4f00000c 0x0000000a ;# tDPr_0_reg
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mww 0x4f000010 0x00000005 ;# tDCS_0_re
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# 32bit wide, 8/16/32bit access
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mww 0x4f000014 0x0000000e ;# control_0_reg
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mww 0x4f000094 0x0000003f ;# ack_reg
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}
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