TCL/SPEAr: Join two initialization files.

The support for SPEAr3xx family members does not require
dedicated files for each member.
Join the initialization scripts in a single file.

Change-Id: I45e9dc64809a6f52c4592e3e0eef5529394887c6
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/227
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This commit is contained in:
Antonio Borneo 2011-01-21 14:57:14 +08:00 committed by Spencer Oliver
parent 03fc47a79e
commit 841ee77350
3 changed files with 36 additions and 41 deletions

View File

@ -14,7 +14,6 @@
source [find mem_helper.tcl] source [find mem_helper.tcl]
source [find target/spear3xx.cfg] source [find target/spear3xx.cfg]
source [find chip/st/spear/spear310.tcl]
source [find chip/st/spear/spear3xx_ddr.tcl] source [find chip/st/spear/spear3xx_ddr.tcl]
source [find chip/st/spear/spear3xx.tcl] source [find chip/st/spear/spear3xx.tcl]

View File

@ -1,40 +0,0 @@
# Specific init scripts for ST SPEAr310 system on chip
# http://www.st.com/spear
#
# Date: 2010-09-23
# Author: Antonio Borneo <borneo.antonio@gmail.com>
proc sp310_init {} {
mww 0xb4000008 0x00002ff4 ;# RAS function enable
mww 0xfca80050 0x00000001 ;# Enable clk mem port 1
mww 0xfca8013c 0x2f7bc210 ;# plgpio_pad_drv
mww 0xfca80140 0x017bdef6
}
proc sp310_emi_init {} {
# set EMI pad strength
mmw 0xfca80134 0x0e000000 0x00000000
mmw 0xfca80138 0x0e739ce7 0x00000000
mmw 0xfca8013c 0x00039ce7 0x00000000
# set safe EMI timing as in BootROM
#mww 0x4f000000 0x0000000f ;# tAP_0_reg
#mww 0x4f000004 0x00000000 ;# tSDP_0_reg
#mww 0x4f000008 0x000000ff ;# tDPw_0_reg
#mww 0x4f00000c 0x00000111 ;# tDPr_0_reg
#mww 0x4f000010 0x00000002 ;# tDCS_0_reg
# set fast EMI timing as in Linux
mww 0x4f000000 0x00000010 ;# tAP_0_reg
mww 0x4f000004 0x00000005 ;# tSDP_0_reg
mww 0x4f000008 0x0000000a ;# tDPw_0_reg
mww 0x4f00000c 0x0000000a ;# tDPr_0_reg
mww 0x4f000010 0x00000005 ;# tDCS_0_re
# 32bit wide, 8/16/32bit access
mww 0x4f000014 0x0000000e ;# control_0_reg
mww 0x4f000094 0x0000003f ;# ack_reg
}

View File

@ -78,3 +78,39 @@ proc sp3xx_common_init {} {
mww 0xfca80098 0x80000007 mww 0xfca80098 0x80000007
mww 0xfca8009c 0x80000007 mww 0xfca8009c 0x80000007
} }
# Specific init scripts for ST SPEAr310 system on chip
proc sp310_init {} {
mww 0xb4000008 0x00002ff4 ;# RAS function enable
mww 0xfca80050 0x00000001 ;# Enable clk mem port 1
mww 0xfca8013c 0x2f7bc210 ;# plgpio_pad_drv
mww 0xfca80140 0x017bdef6
}
proc sp310_emi_init {} {
# set EMI pad strength
mmw 0xfca80134 0x0e000000 0x00000000
mmw 0xfca80138 0x0e739ce7 0x00000000
mmw 0xfca8013c 0x00039ce7 0x00000000
# set safe EMI timing as in BootROM
#mww 0x4f000000 0x0000000f ;# tAP_0_reg
#mww 0x4f000004 0x00000000 ;# tSDP_0_reg
#mww 0x4f000008 0x000000ff ;# tDPw_0_reg
#mww 0x4f00000c 0x00000111 ;# tDPr_0_reg
#mww 0x4f000010 0x00000002 ;# tDCS_0_reg
# set fast EMI timing as in Linux
mww 0x4f000000 0x00000010 ;# tAP_0_reg
mww 0x4f000004 0x00000005 ;# tSDP_0_reg
mww 0x4f000008 0x0000000a ;# tDPw_0_reg
mww 0x4f00000c 0x0000000a ;# tDPr_0_reg
mww 0x4f000010 0x00000005 ;# tDCS_0_re
# 32bit wide, 8/16/32bit access
mww 0x4f000014 0x0000000e ;# control_0_reg
mww 0x4f000094 0x0000003f ;# ack_reg
}