Add Linux SPI device SWD adapter support
To alleviate the need to bitbang SWD, I've written a SWD SPI implementation. This code is inspired by the work of luppy@appkaki.com as shown at github.com/lupyuen/openocd-spi but with the desire to be more generic. This implementation makes use of the more common 4 wire SPI port using full duplex transfers to be able to capture the SWD ACK bits when a SWD TX operation is in progress. TEST: Connects successfully with the following combinations: Hosts: Raspberry Pi 4B Unnamed Qualcomm SoC with QUPv3 based SPI port Targets: Raspberry Pi 2040 Nordic nRF52840 NXP RT500 Change-Id: Ic2f38a1806085d527e6f999a3d15aea6f32d1019 Signed-off-by: Richard Pasek <rpasek@google.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8645 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: zapb <dev@zapb.de> Tested-by: jenkins
This commit is contained in:
Richard Pasek
Tomas Vanek
parent
26f2df80c3
commit
83e0293f7b
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@ -163,6 +163,9 @@ m4_define([PCIE_ADAPTERS],
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m4_define([SERIAL_PORT_ADAPTERS],
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[[[buspirate], [Bus Pirate], [BUS_PIRATE]]])
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m4_define([LINUXSPIDEV_ADAPTER],
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[[[linuxspidev], [Linux spidev driver], [LINUXSPIDEV]]])
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# The word 'Adapter' in "Dummy Adapter" below must begin with a capital letter
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# because there is an M4 macro called 'adapter'.
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m4_define([DUMMY_ADAPTER],
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@ -289,6 +292,7 @@ AC_ARG_ADAPTERS([
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LIBFTDI_ADAPTERS,
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LIBFTDI_USB1_ADAPTERS,
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LIBGPIOD_ADAPTERS,
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LINUXSPIDEV_ADAPTER,
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SERIAL_PORT_ADAPTERS,
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DUMMY_ADAPTER,
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PCIE_ADAPTERS,
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@ -726,6 +730,7 @@ PROCESS_ADAPTERS([LIBJAYLINK_ADAPTERS], ["x$use_internal_libjaylink" = "xyes" -o
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PROCESS_ADAPTERS([PCIE_ADAPTERS], ["x$is_linux" = "xyes"], [Linux build])
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PROCESS_ADAPTERS([SERIAL_PORT_ADAPTERS], ["x$can_build_buspirate" = "xyes"],
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[internal error: validation should happen beforehand])
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PROCESS_ADAPTERS([LINUXSPIDEV_ADAPTER], ["x$is_linux" = "xyes"], [Linux spidev])
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PROCESS_ADAPTERS([DUMMY_ADAPTER], [true], [unused])
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AS_IF([test "x$enable_linuxgpiod" != "xno"], [
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@ -875,6 +880,7 @@ m4_foreach([adapter], [USB1_ADAPTERS,
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LIBFTDI_USB1_ADAPTERS,
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LIBGPIOD_ADAPTERS,
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LIBJAYLINK_ADAPTERS, PCIE_ADAPTERS, SERIAL_PORT_ADAPTERS,
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LINUXSPIDEV_ADAPTER,
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DUMMY_ADAPTER,
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OPTIONAL_LIBRARIES,
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COVERAGE],
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@ -614,6 +614,9 @@ emulation model of target hardware.
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@item @b{xlnx_pcie_xvc}
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@* A JTAG driver exposing Xilinx Virtual Cable over PCI Express to OpenOCD as JTAG/SWD interface.
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@item @b{linuxspidev}
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@* A SPI based SWD driver using Linux SPI devices.
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@item @b{linuxgpiod}
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@* A bitbang JTAG driver using Linux GPIO through library libgpiod.
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@ -3401,6 +3404,70 @@ See @file{interface/beaglebone-swd-native.cfg} for a sample configuration file.
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@end deffn
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@deffn {Interface Driver} {linuxspidev}
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Linux provides userspace access to SPI through spidev. Full duplex SPI
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transactions are used to simultaneously read and write to/from the target to
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emulate the SWD transport.
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@deffn {Config Command} {spidev path} path
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Specifies the path to the spidev device.
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@end deffn
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@deffn {Config Command} {spidev mode} value
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Set the mode of the spi port with optional bit flags (default=3).
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See /usr/include/linux/spi/spidev.h for all of the SPI mode options.
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@end deffn
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@deffn {Config Command} {spidev queue_entries} value
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Set the maximum number of queued transactions per spi exchange (default=64).
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More queued transactions may offer greater performance when the target doesn't
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need to wait. On the contrary higher numbers will reduce performance when the
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target requests a wait as all queued transactions will need to be exchanged
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before spidev can see the wait request.
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@end deffn
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See @file{tcl/interface/spidev_example.cfg} for a sample configuration file.
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Electrical connections:
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@example
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+--------------+ +--------------+
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| | 1K | |
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| MOSI|---/\/\/\---+ | |
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| Host | | | Target |
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| MISO|------------+---|SWDIO |
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| | | |
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| SCK|----------------|SWDCLK |
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| | | |
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+--------------+ +--------------+
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@end example
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The 1K resistor works well with most MCUs up to 3 MHz. A lower resistance
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could be used to achieve higher speeds granted that the target SWDIO pin has
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enough drive strength to pull the signal high while being pulled low by this
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resistor.
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If you are having trouble here are some tips:
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@itemize @bullet
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@item @b{Make sure MISO and MOSI are tied together with a 1K resistor.}
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MISO should be attached to the target.
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@item @b{Make sure that your host and target are using the same I/O voltage}
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(for example both are using 3.3 volts).
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@item @b{Your host's SPI port may not idle low.}
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This will lead to an additional clock edge being sent to the target, causing
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the host and target being 1 clock off from each other. Try setting
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SPI_MOSI_IDLE_LOW in spi_mode. Try using a different spi_mode (0 - 3).
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@item @b{Your target may pull SWDIO and/or SWDCLK high.}
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This will create an extra edge when the host releases control of the SPI port
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at the end of a transaction. You'll need to confirm this with a scope or meter.
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Try installing 10K resistors on SWDIO and SWDCLK to ground to stop this.
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@end itemize
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@end deffn
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@deffn {Interface Driver} {linuxgpiod}
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Linux provides userspace access to GPIO through libgpiod since Linux kernel
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@ -176,6 +176,9 @@ endif
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if SYSFSGPIO
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DRIVERFILES += %D%/sysfsgpio.c
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endif
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if LINUXSPIDEV
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DRIVERFILES += %D%/linuxspidev.c
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endif
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if XLNX_PCIE_XVC
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DRIVERFILES += %D%/xlnx-pcie-xvc.c
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endif
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@ -0,0 +1,622 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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/* Copyright (C) 2020 by Lup Yuen Lee <luppy@appkaki.com>
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* Copyright (C) 2024 by Richard Pasek <rpasek@google.com>
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*/
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/**
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* @file
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* Implementation of SWD protocol with a Linux SPI device.
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*/
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/* Uncomment to log SPI exchanges (very verbose, slows things down a lot)
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*
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* A quick note on interpreting SPI exchange messages:
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*
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* This implementation works by performing SPI exchanges with MOSI and MISO
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* tied together with a 1K resistor. This combined signal becomes SWDIO.
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*
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* Since we are performing SPI exchanges, (reading and writing at the same
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* time) this means when the target isn't driving SWDIO, what is written by
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* the host should also be read by the host.
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*
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* On SWD writes:
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* The TX and RX data should match except for the ACK bits from the target
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* swd write reg exchange: len=6
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* tx_buf=C5 02 40 00 02 2C
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* rx_buf=C5 42 40 00 02 2C
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* ^
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* |
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* ACK from target
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*
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* On SWD reads:
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* Only the command byte should match
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* swd read reg exchange: len=6
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* tx_buf=B1 00 00 00 00 00
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* rx_buf=B1 40 20 00 00 F8
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* ^^
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* ||
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* Command packet from host
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*
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*/
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// #define LOG_SPI_EXCHANGE
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include <stdint.h>
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#include <unistd.h>
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#include <stdlib.h>
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#include <string.h>
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#include <fcntl.h>
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#include <sys/ioctl.h>
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#include <linux/spi/spidev.h>
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#include <jtag/adapter.h>
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#include <jtag/swd.h>
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#include <jtag/interface.h>
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#include <jtag/commands.h>
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// Number of bits per SPI exchange
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#define SPI_BITS 8
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// Time in uS after the last bit of transfer before deselecting the device
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#define SPI_DESELECT_DELAY 0
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// Maximum number of SWD transactions to queue together in a SPI exchange
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#define MAX_QUEUE_ENTRIES 64
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#define CMD_BITS 8
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#define TURN_BITS 1
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#define ACK_BITS 3
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#define DATA_BITS 32
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#define PARITY_BITS 1
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#define SWD_WR_BITS (CMD_BITS + TURN_BITS + ACK_BITS + TURN_BITS + DATA_BITS + PARITY_BITS)
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#define SWD_RD_BITS (CMD_BITS + TURN_BITS + ACK_BITS + DATA_BITS + PARITY_BITS + TURN_BITS)
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#define SWD_OP_BITS (MAX(SWD_WR_BITS, SWD_RD_BITS))
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#define SWD_OP_BYTES (DIV_ROUND_UP(SWD_OP_BITS, SPI_BITS))
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#define AP_DELAY_CLOCKS 8
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#define AP_DELAY_BYTES (DIV_ROUND_UP(AP_DELAY_CLOCKS, SPI_BITS))
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#define END_IDLE_CLOCKS 8
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#define END_IDLE_BYTES (DIV_ROUND_UP(END_IDLE_CLOCKS, SPI_BITS))
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// File descriptor for SPI device
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static int spi_fd = -1;
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// SPI Configuration
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static char *spi_path;
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static uint32_t spi_mode = SPI_MODE_3; // Note: SPI in LSB mode is not often supported. We'll flip LSB to MSB ourselves.
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static uint32_t spi_speed;
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struct queue_info {
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unsigned int buf_idx;
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uint32_t *rx_ptr;
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};
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static int queue_retval;
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static unsigned int max_queue_entries;
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static unsigned int queue_fill;
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static unsigned int queue_buf_fill;
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static unsigned int queue_buf_size;
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static struct queue_info *queue_infos;
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static uint8_t *queue_tx_buf;
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static uint8_t *queue_rx_buf;
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static uint8_t *tx_flip_buf;
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static int spidev_swd_switch_seq(enum swd_special_seq seq);
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static void spidev_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_delay_clk);
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static void spi_exchange(const uint8_t *tx_data, uint8_t *rx_data, unsigned int len)
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{
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#ifdef LOG_SPI_EXCHANGE
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LOG_OUTPUT("exchange: len=%u\n", len);
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#endif // LOG_SPI_EXCHANGE
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if (len == 0) {
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LOG_DEBUG("exchange with no length");
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return;
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}
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if (!tx_data && !rx_data) {
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LOG_DEBUG("exchange with no valid tx or rx pointers");
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return;
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}
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if (len > queue_buf_size) {
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LOG_ERROR("exchange too large len=%u ", len);
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return;
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}
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if (tx_data) {
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// Reverse LSB to MSB
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for (unsigned int i = 0; i < len; i++)
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tx_flip_buf[i] = flip_u32(tx_data[i], 8);
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#ifdef LOG_SPI_EXCHANGE
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if (len != 0) {
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LOG_OUTPUT(" tx_buf=");
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for (unsigned int i = 0; i < len; i++)
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LOG_OUTPUT("%.2" PRIx8 " ", tx_flip_buf[i]);
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}
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LOG_OUTPUT("\n");
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#endif // LOG_SPI_EXCHANGE
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}
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// Transmit the MSB buffer to SPI device.
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struct spi_ioc_transfer tr = {
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/* The following must be cast to unsigned long to compile correctly on
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* 32 and 64 bit machines (as is done in the spidev examples in Linux
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* kernel code in tools/spi/).
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*/
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.tx_buf = (unsigned long)(tx_data ? tx_flip_buf : NULL),
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.rx_buf = (unsigned long)rx_data,
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.len = len,
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.delay_usecs = SPI_DESELECT_DELAY,
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.speed_hz = spi_speed,
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.bits_per_word = SPI_BITS,
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};
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int ret = ioctl(spi_fd, SPI_IOC_MESSAGE(1), &tr);
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if (ret < 1) {
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LOG_ERROR("exchange failed");
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return;
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}
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if (rx_data) {
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#ifdef LOG_SPI_EXCHANGE
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if (len != 0) {
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LOG_OUTPUT(" rx_buf=");
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for (unsigned int i = 0; i < len; i++)
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LOG_OUTPUT("%.2" PRIx8 " ", rx_data[i]);
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}
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LOG_OUTPUT("\n");
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#endif // LOG_SPI_EXCHANGE
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// Reverse MSB to LSB
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for (unsigned int i = 0; i < len; i++)
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rx_data[i] = flip_u32(rx_data[i], 8);
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}
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}
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static int spidev_speed(int speed)
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{
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uint32_t tmp_speed = speed;
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int ret = ioctl(spi_fd, SPI_IOC_WR_MAX_SPEED_HZ, &tmp_speed);
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if (ret == -1) {
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LOG_ERROR("Failed to set SPI %d speed", speed);
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return ERROR_FAIL;
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}
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spi_speed = speed;
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return ERROR_OK;
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}
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static int spidev_speed_div(int speed, int *khz)
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{
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*khz = speed / 1000;
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return ERROR_OK;
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}
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static int spidev_khz(int khz, int *jtag_speed)
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{
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if (khz == 0) {
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LOG_DEBUG("RCLK not supported");
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return ERROR_FAIL;
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}
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*jtag_speed = khz * 1000;
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return ERROR_OK;
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}
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static void spidev_free_queue(void)
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{
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max_queue_entries = 0;
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queue_buf_size = 0;
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free(queue_infos);
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queue_infos = NULL;
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free(queue_tx_buf);
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queue_tx_buf = NULL;
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free(queue_rx_buf);
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queue_rx_buf = NULL;
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free(tx_flip_buf);
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tx_flip_buf = NULL;
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}
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static int spidev_alloc_queue(unsigned int new_queue_entries)
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{
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if (queue_fill || queue_buf_fill) {
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LOG_ERROR("Can't realloc allocate queue when queue is in use");
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return ERROR_FAIL;
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}
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unsigned int new_queue_buf_size =
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(new_queue_entries * (SWD_OP_BYTES + AP_DELAY_BYTES)) + END_IDLE_BYTES;
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queue_infos = realloc(queue_infos, sizeof(struct queue_info) * new_queue_entries);
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if (!queue_infos)
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goto realloc_fail;
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queue_tx_buf = realloc(queue_tx_buf, new_queue_buf_size);
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if (!queue_tx_buf)
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goto realloc_fail;
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queue_rx_buf = realloc(queue_rx_buf, new_queue_buf_size);
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if (!queue_rx_buf)
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goto realloc_fail;
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tx_flip_buf = realloc(tx_flip_buf, new_queue_buf_size);
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if (!tx_flip_buf)
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goto realloc_fail;
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max_queue_entries = new_queue_entries;
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queue_buf_size = new_queue_buf_size;
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LOG_DEBUG("Set queue entries to %u (buffers %u bytes)", max_queue_entries, queue_buf_size);
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return ERROR_OK;
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realloc_fail:
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spidev_free_queue();
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LOG_ERROR("Couldn't allocate queue. Out of memory.");
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return ERROR_FAIL;
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}
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static int spidev_init(void)
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{
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LOG_INFO("SPI SWD driver");
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if (spi_fd >= 0)
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return ERROR_OK;
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if (!spi_path) {
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LOG_ERROR("Path to spidev not set");
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return ERROR_JTAG_INIT_FAILED;
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}
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// Open SPI device.
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spi_fd = open(spi_path, O_RDWR);
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if (spi_fd < 0) {
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LOG_ERROR("Failed to open SPI port at %s", spi_path);
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return ERROR_JTAG_INIT_FAILED;
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}
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// Set SPI mode.
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int ret = ioctl(spi_fd, SPI_IOC_WR_MODE32, &spi_mode);
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if (ret == -1) {
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LOG_ERROR("Failed to set SPI mode 0x%" PRIx32, spi_mode);
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return ERROR_JTAG_INIT_FAILED;
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}
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// Set SPI bits per word.
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uint32_t spi_bits = SPI_BITS;
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ret = ioctl(spi_fd, SPI_IOC_WR_BITS_PER_WORD, &spi_bits);
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if (ret == -1) {
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LOG_ERROR("Failed to set SPI %" PRIu8 " bits per transfer", spi_bits);
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return ERROR_JTAG_INIT_FAILED;
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}
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LOG_INFO("Opened SPI device at %s in mode 0x%" PRIx32 " with %" PRIu8 " bits ",
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spi_path, spi_mode, spi_bits);
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// Set SPI read and write max speed.
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int speed;
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ret = adapter_get_speed(&speed);
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if (ret != ERROR_OK) {
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LOG_ERROR("Failed to get adapter speed");
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return ERROR_JTAG_INIT_FAILED;
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}
|
||||
|
||||
ret = spidev_speed(speed);
|
||||
if (ret != ERROR_OK)
|
||||
return ERROR_JTAG_INIT_FAILED;
|
||||
|
||||
if (max_queue_entries == 0) {
|
||||
ret = spidev_alloc_queue(MAX_QUEUE_ENTRIES);
|
||||
if (ret != ERROR_OK)
|
||||
return ERROR_JTAG_INIT_FAILED;
|
||||
}
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
static int spidev_quit(void)
|
||||
{
|
||||
spidev_free_queue();
|
||||
|
||||
if (spi_fd < 0)
|
||||
return ERROR_OK;
|
||||
|
||||
close(spi_fd);
|
||||
spi_fd = -1;
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
static int spidev_swd_init(void)
|
||||
{
|
||||
LOG_DEBUG("spidev_swd_init");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
static int spidev_swd_execute_queue(unsigned int end_idle_bytes)
|
||||
{
|
||||
LOG_DEBUG_IO("Executing %u queued transactions", queue_fill);
|
||||
|
||||
if (queue_retval != ERROR_OK) {
|
||||
LOG_DEBUG_IO("Skipping due to previous errors: %d", queue_retval);
|
||||
goto skip;
|
||||
}
|
||||
|
||||
/* A transaction must be followed by another transaction or at least 8 idle
|
||||
* cycles to ensure that data is clocked through the AP. Since the tx
|
||||
* buffer is zeroed after each queue run, every byte added to the buffer
|
||||
* fill will add on an additional 8 idle cycles.
|
||||
*/
|
||||
queue_buf_fill += end_idle_bytes;
|
||||
|
||||
spi_exchange(queue_tx_buf, queue_rx_buf, queue_buf_fill);
|
||||
|
||||
for (unsigned int queue_idx = 0; queue_idx < queue_fill; queue_idx++) {
|
||||
unsigned int buf_idx = queue_infos[queue_idx].buf_idx;
|
||||
uint8_t *tx_ptr = &queue_tx_buf[buf_idx];
|
||||
uint8_t *rx_ptr = &queue_rx_buf[buf_idx];
|
||||
uint8_t cmd = buf_get_u32(tx_ptr, 0, CMD_BITS);
|
||||
bool read = cmd & SWD_CMD_RNW ? true : false;
|
||||
int ack = buf_get_u32(rx_ptr, CMD_BITS + TURN_BITS, ACK_BITS);
|
||||
uint32_t data = read ?
|
||||
buf_get_u32(rx_ptr, CMD_BITS + TURN_BITS + ACK_BITS, DATA_BITS) :
|
||||
buf_get_u32(tx_ptr, CMD_BITS + TURN_BITS + ACK_BITS + TURN_BITS, DATA_BITS);
|
||||
|
||||
// Devices do not reply to DP_TARGETSEL write cmd, ignore received ack
|
||||
bool check_ack = swd_cmd_returns_ack(cmd);
|
||||
|
||||
LOG_CUSTOM_LEVEL((check_ack && ack != SWD_ACK_OK) ? LOG_LVL_DEBUG : LOG_LVL_DEBUG_IO,
|
||||
"%s%s %s %s reg %X = %08" PRIx32,
|
||||
check_ack ? "" : "ack ignored ",
|
||||
ack == SWD_ACK_OK ? "OK" :
|
||||
ack == SWD_ACK_WAIT ? "WAIT" :
|
||||
ack == SWD_ACK_FAULT ? "FAULT" : "JUNK",
|
||||
cmd & SWD_CMD_APNDP ? "AP" : "DP",
|
||||
read ? "read" : "write",
|
||||
(cmd & SWD_CMD_A32) >> 1,
|
||||
data);
|
||||
|
||||
if (ack != SWD_ACK_OK && check_ack) {
|
||||
queue_retval = swd_ack_to_error_code(ack);
|
||||
goto skip;
|
||||
|
||||
} else if (read) {
|
||||
int parity = buf_get_u32(rx_ptr, CMD_BITS + TURN_BITS + ACK_BITS + DATA_BITS, PARITY_BITS);
|
||||
|
||||
if (parity != parity_u32(data)) {
|
||||
LOG_ERROR("SWD Read data parity mismatch");
|
||||
queue_retval = ERROR_FAIL;
|
||||
goto skip;
|
||||
}
|
||||
|
||||
if (queue_infos[queue_idx].rx_ptr)
|
||||
*queue_infos[queue_idx].rx_ptr = data;
|
||||
}
|
||||
}
|
||||
|
||||
skip:
|
||||
// Clear everything in the queue
|
||||
queue_fill = 0;
|
||||
queue_buf_fill = 0;
|
||||
memset(queue_infos, 0, sizeof(queue_infos[0]) * max_queue_entries);
|
||||
memset(queue_tx_buf, 0, queue_buf_size);
|
||||
memset(queue_rx_buf, 0, queue_buf_size);
|
||||
|
||||
int retval = queue_retval;
|
||||
queue_retval = ERROR_OK;
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
||||
static int spidev_swd_run_queue(void)
|
||||
{
|
||||
/* Since we are unsure if another SWD transaction will follow the
|
||||
* transactions we are just about to execute, we need to add on 8 idle
|
||||
* cycles.
|
||||
*/
|
||||
return spidev_swd_execute_queue(END_IDLE_BYTES);
|
||||
}
|
||||
|
||||
static void spidev_swd_queue_cmd(uint8_t cmd, uint32_t *dst, uint32_t data, uint32_t ap_delay_clk)
|
||||
{
|
||||
unsigned int swd_op_bytes = DIV_ROUND_UP(SWD_OP_BITS + ap_delay_clk, SPI_BITS);
|
||||
|
||||
if (queue_fill >= max_queue_entries ||
|
||||
queue_buf_fill + swd_op_bytes + END_IDLE_BYTES > queue_buf_size) {
|
||||
/* Not enough room in the queue. Run the queue. No idle bytes are
|
||||
* needed because we are going to execute transactions right after
|
||||
* the queue is emptied.
|
||||
*/
|
||||
queue_retval = spidev_swd_execute_queue(0);
|
||||
}
|
||||
|
||||
if (queue_retval != ERROR_OK)
|
||||
return;
|
||||
|
||||
uint8_t *tx_ptr = &queue_tx_buf[queue_buf_fill];
|
||||
|
||||
cmd |= SWD_CMD_START | SWD_CMD_PARK;
|
||||
|
||||
buf_set_u32(tx_ptr, 0, CMD_BITS, cmd);
|
||||
|
||||
if (cmd & SWD_CMD_RNW) {
|
||||
// Queue a read transaction
|
||||
queue_infos[queue_fill].rx_ptr = dst;
|
||||
} else {
|
||||
// Queue a write transaction
|
||||
buf_set_u32(tx_ptr,
|
||||
CMD_BITS + TURN_BITS + ACK_BITS + TURN_BITS, DATA_BITS, data);
|
||||
buf_set_u32(tx_ptr,
|
||||
CMD_BITS + TURN_BITS + ACK_BITS + TURN_BITS + DATA_BITS, PARITY_BITS, parity_u32(data));
|
||||
}
|
||||
|
||||
queue_infos[queue_fill].buf_idx = queue_buf_fill;
|
||||
|
||||
/* Add idle cycles after AP accesses to avoid WAIT. Buffer is already
|
||||
* zeroed so we just need to advance the pointer to add idle cycles.
|
||||
*/
|
||||
queue_buf_fill += swd_op_bytes;
|
||||
|
||||
queue_fill++;
|
||||
}
|
||||
|
||||
static void spidev_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_delay_clk)
|
||||
{
|
||||
assert(cmd & SWD_CMD_RNW);
|
||||
spidev_swd_queue_cmd(cmd, value, 0, ap_delay_clk);
|
||||
}
|
||||
|
||||
static void spidev_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_delay_clk)
|
||||
{
|
||||
assert(!(cmd & SWD_CMD_RNW));
|
||||
spidev_swd_queue_cmd(cmd, NULL, value, ap_delay_clk);
|
||||
}
|
||||
|
||||
static int spidev_swd_switch_seq(enum swd_special_seq seq)
|
||||
{
|
||||
switch (seq) {
|
||||
case LINE_RESET:
|
||||
LOG_DEBUG_IO("SWD line reset");
|
||||
spi_exchange(swd_seq_line_reset, NULL, swd_seq_line_reset_len / SPI_BITS);
|
||||
break;
|
||||
case JTAG_TO_SWD:
|
||||
LOG_DEBUG("JTAG-to-SWD");
|
||||
spi_exchange(swd_seq_jtag_to_swd, NULL, swd_seq_jtag_to_swd_len / SPI_BITS);
|
||||
break;
|
||||
case JTAG_TO_DORMANT:
|
||||
LOG_DEBUG("JTAG-to-DORMANT");
|
||||
spi_exchange(swd_seq_jtag_to_dormant, NULL, swd_seq_jtag_to_dormant_len / SPI_BITS);
|
||||
break;
|
||||
case SWD_TO_JTAG:
|
||||
LOG_DEBUG("SWD-to-JTAG");
|
||||
spi_exchange(swd_seq_swd_to_jtag, NULL, swd_seq_swd_to_jtag_len / SPI_BITS);
|
||||
break;
|
||||
case SWD_TO_DORMANT:
|
||||
LOG_DEBUG("SWD-to-DORMANT");
|
||||
spi_exchange(swd_seq_swd_to_dormant, NULL, swd_seq_swd_to_dormant_len / SPI_BITS);
|
||||
break;
|
||||
case DORMANT_TO_SWD:
|
||||
LOG_DEBUG("DORMANT-to-SWD");
|
||||
spi_exchange(swd_seq_dormant_to_swd, NULL, swd_seq_dormant_to_swd_len / SPI_BITS);
|
||||
break;
|
||||
case DORMANT_TO_JTAG:
|
||||
LOG_DEBUG("DORMANT-to-JTAG");
|
||||
spi_exchange(swd_seq_dormant_to_jtag, NULL, swd_seq_dormant_to_jtag_len / SPI_BITS);
|
||||
break;
|
||||
default:
|
||||
LOG_ERROR("Sequence %d not supported", seq);
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
COMMAND_HANDLER(spidev_handle_path_command)
|
||||
{
|
||||
if (CMD_ARGC != 1)
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
|
||||
free(spi_path);
|
||||
spi_path = strdup(CMD_ARGV[0]);
|
||||
if (!spi_path) {
|
||||
LOG_ERROR("Out of memory");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
COMMAND_HANDLER(spidev_handle_mode_command)
|
||||
{
|
||||
if (CMD_ARGC != 1)
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
|
||||
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], spi_mode);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
COMMAND_HANDLER(spidev_handle_queue_entries_command)
|
||||
{
|
||||
uint32_t new_queue_entries;
|
||||
|
||||
if (CMD_ARGC != 1)
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
|
||||
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], new_queue_entries);
|
||||
|
||||
return spidev_alloc_queue(new_queue_entries);
|
||||
}
|
||||
|
||||
const struct swd_driver spidev_swd = {
|
||||
.init = spidev_swd_init,
|
||||
.switch_seq = spidev_swd_switch_seq,
|
||||
.read_reg = spidev_swd_read_reg,
|
||||
.write_reg = spidev_swd_write_reg,
|
||||
.run = spidev_swd_run_queue,
|
||||
};
|
||||
|
||||
static const struct command_registration spidev_subcommand_handlers[] = {
|
||||
{
|
||||
.name = "path",
|
||||
.handler = &spidev_handle_path_command,
|
||||
.mode = COMMAND_CONFIG,
|
||||
.help = "set the path to the spidev device",
|
||||
.usage = "path_to_spidev",
|
||||
},
|
||||
{
|
||||
.name = "mode",
|
||||
.handler = &spidev_handle_mode_command,
|
||||
.mode = COMMAND_CONFIG,
|
||||
.help = "set the mode of the spi port with optional bit flags (default=3)",
|
||||
.usage = "mode",
|
||||
},
|
||||
{
|
||||
.name = "queue_entries",
|
||||
.handler = &spidev_handle_queue_entries_command,
|
||||
.mode = COMMAND_CONFIG,
|
||||
.help = "set the queue entry size (default=64)",
|
||||
.usage = "queue_entries",
|
||||
},
|
||||
COMMAND_REGISTRATION_DONE
|
||||
};
|
||||
|
||||
static const struct command_registration spidev_command_handlers[] = {
|
||||
{
|
||||
.name = "spidev",
|
||||
.mode = COMMAND_ANY,
|
||||
.help = "perform spidev management",
|
||||
.chain = spidev_subcommand_handlers,
|
||||
.usage = "",
|
||||
},
|
||||
COMMAND_REGISTRATION_DONE
|
||||
};
|
||||
|
||||
// Only SWD transport supported
|
||||
static const char *const spidev_transports[] = { "swd", NULL };
|
||||
|
||||
struct adapter_driver linuxspidev_adapter_driver = {
|
||||
.name = "linuxspidev",
|
||||
.transports = spidev_transports,
|
||||
.commands = spidev_command_handlers,
|
||||
|
||||
.init = spidev_init,
|
||||
.quit = spidev_quit,
|
||||
.speed = spidev_speed,
|
||||
.khz = spidev_khz,
|
||||
.speed_div = spidev_speed_div,
|
||||
|
||||
.swd_ops = &spidev_swd,
|
||||
};
|
||||
|
|
@ -386,6 +386,7 @@ extern struct adapter_driver jtag_dpi_adapter_driver;
|
|||
extern struct adapter_driver jtag_vpi_adapter_driver;
|
||||
extern struct adapter_driver kitprog_adapter_driver;
|
||||
extern struct adapter_driver linuxgpiod_adapter_driver;
|
||||
extern struct adapter_driver linuxspidev_adapter_driver;
|
||||
extern struct adapter_driver opendous_adapter_driver;
|
||||
extern struct adapter_driver openjtag_adapter_driver;
|
||||
extern struct adapter_driver osbdm_adapter_driver;
|
||||
|
|
|
|||
|
|
@ -123,6 +123,9 @@ struct adapter_driver *adapter_drivers[] = {
|
|||
#if BUILD_LINUXGPIOD == 1
|
||||
&linuxgpiod_adapter_driver,
|
||||
#endif
|
||||
#if BUILD_LINUXSPIDEV == 1
|
||||
&linuxspidev_adapter_driver,
|
||||
#endif
|
||||
#if BUILD_XLNX_PCIE_XVC == 1
|
||||
&xlnx_pcie_xvc_adapter_driver,
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -0,0 +1,9 @@
|
|||
# SPDX-License-Identifier: GPL-2.0-or-later
|
||||
|
||||
# Example config for using Linux spidev as a SWD adapter.
|
||||
|
||||
adapter driver linuxspidev
|
||||
adapter speed 3000
|
||||
spidev path "/dev/spidev0.0"
|
||||
spidev mode 3
|
||||
spidev queue_entries 64
|
||||
Loading…
Reference in New Issue