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ARM11: revert etmr/etmw commands 

These aren't desirable, given "standard" ETM support.
Also remove the now-unused arm11_find_target().

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This commit is contained in:
David Brownell 2009-11-13 16:56:11 -08:00
parent 44d6a531f7
commit 817bf74302
3 changed files with 0 additions and 165 deletions
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83
src/target/arm11.c
View File

@ -2076,29 +2076,6 @@ static const uint32_t arm11_coproc_instruction_limits[] =
0xFFFFFFFF, /* value */
};
static struct arm11_common * arm11_find_target(const char * arg)
{
struct jtag_tap * tap;
struct target * t;
tap = jtag_tap_by_string(arg);
if (!tap)
return 0;
for (t = all_targets; t; t = t->next)
{
if (t->tap != tap)
continue;
/* if (t->type == arm11_target) */
if (0 == strcmp(target_get_name(t), "arm11"))
return t->arch_info;
}
return 0;
}
static int arm11_mrc_inner(struct target *target, int cpnum,
uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm,
uint32_t *value, bool read)
@ -2154,58 +2131,6 @@ static int arm11_mcr(struct target *target, int cpnum,
return arm11_mrc_inner(target, cpnum, op1, op2, CRn, CRm, &value, false);
}
static COMMAND_HELPER(arm11_handle_etm_read_write, bool read)
{
if (argc != (read ? 2 : 3))
{
LOG_ERROR("Invalid number of arguments.");
return ERROR_COMMAND_SYNTAX_ERROR;
}
struct arm11_common * arm11 = arm11_find_target(args[0]);
if (!arm11)
{
LOG_ERROR("Parameter 1 is not the target name of an ARM11 device.");
return ERROR_COMMAND_SYNTAX_ERROR;
}
uint32_t address;
COMMAND_PARSE_NUMBER(u32, args[1], address);
if (!read)
{
uint32_t value;
COMMAND_PARSE_NUMBER(u32, args[2], value);
LOG_INFO("ETM write register 0x%02" PRIx32 " (%" PRId32 ") = 0x%08" PRIx32 " (%" PRId32 ")",
address, address, value, value);
CHECK_RETVAL(arm11_write_etm(arm11, address, value));
}
else
{
uint32_t value;
CHECK_RETVAL(arm11_read_etm(arm11, address, &value));
LOG_INFO("ETM read register 0x%02" PRIx32 " (%" PRId32 ") = 0x%08" PRIx32 " (%" PRId32 ")",
address, address, value, value);
}
return ERROR_OK;
}
COMMAND_HANDLER(arm11_handle_etmr)
{
return CALL_COMMAND_HANDLER(arm11_handle_etm_read_write, true);
}
COMMAND_HANDLER(arm11_handle_etmw)
{
return CALL_COMMAND_HANDLER(arm11_handle_etm_read_write, false);
}
#define ARM11_HANDLER(x) .x = arm11_##x
struct target_type arm11_target = {
@ -2259,14 +2184,6 @@ int arm11_register_commands(struct command_context *cmd_ctx)
top_cmd = register_command(cmd_ctx, NULL, "arm11",
NULL, COMMAND_ANY, NULL);
register_command(cmd_ctx, top_cmd, "etmr",
arm11_handle_etmr, COMMAND_ANY,
"Read Embedded Trace Macrocell (ETM) register. etmr <jtag_target> <ETM register address>");
register_command(cmd_ctx, top_cmd, "etmw",
arm11_handle_etmw, COMMAND_ANY,
"Write Embedded Trace Macrocell (ETM) register. etmr <jtag_target> <ETM register address> <value>");
/* "hardware_step" is only here to check if the default
* simulate + breakpoint implementation is broken.
* TEMPORARY! NOT DOCUMENTED!

5
src/target/arm11.h
View File

@ -190,9 +190,4 @@ struct arm11_reg_state
int arm11_register_commands(struct command_context *cmd_ctx);
int arm11_read_etm(struct arm11_common * arm11, uint8_t address, uint32_t *value);
int arm11_write_etm(struct arm11_common * arm11, uint8_t address, uint32_t value);
#endif /* ARM11_H */

77
src/target/arm11_dbgtap.c
View File

@ -941,80 +941,3 @@ int arm11_read_memory_word(struct arm11_common * arm11, uint32_t address, uint32
return arm11_run_instr_data_finish(arm11);
}
/** Write Embedded Trace Macrocell (ETM) via Scan chain 6
*
* http://infocenter.arm.com/help/topic/com.arm.doc.ddi0318e/Bcfddjeh.html#Bcfggcbe
*
* \param arm11 Target state variable.
* \param address 7 bit ETM register address
* \param value Value to be written
*
* \return Error status
*
* \remarks This is a stand-alone function that executes the JTAG command queue.
*/
int arm11_write_etm(struct arm11_common * arm11, uint8_t address, uint32_t value)
{
CHECK_RETVAL(arm11_add_debug_SCAN_N(arm11, 0x06, ARM11_TAP_DEFAULT));
/* Uses INTEST for read and write */
arm11_add_IR(arm11, ARM11_INTEST, ARM11_TAP_DEFAULT);
struct scan_field chain6_fields[3];
uint8_t nRW = 1;
arm11_setup_field(arm11, 32, &value, NULL, chain6_fields + 0);
arm11_setup_field(arm11, 7, &address, NULL, chain6_fields + 1);
arm11_setup_field(arm11, 1, &nRW, NULL, chain6_fields + 2);
arm11_add_dr_scan_vc(asizeof(chain6_fields), chain6_fields, TAP_IDLE);
CHECK_RETVAL(jtag_execute_queue());
return ERROR_OK;
}
/** Read Embedded Trace Macrocell (ETM) via Scan chain 6
*
* http://infocenter.arm.com/help/topic/com.arm.doc.ddi0318e/Bcfddjeh.html#Bcfggcbe
*
* \param arm11 Target state variable.
* \param address 7 bit ETM register address
* \param value Pointer that receives value that was read
*
* \return Error status
*
* \remarks This is a stand-alone function that executes the JTAG command queue.
*/
int arm11_read_etm(struct arm11_common * arm11, uint8_t address, uint32_t * value)
{
CHECK_RETVAL(arm11_add_debug_SCAN_N(arm11, 0x06, ARM11_TAP_DEFAULT));
/* Uses INTEST for read and write */
arm11_add_IR(arm11, ARM11_INTEST, ARM11_TAP_DEFAULT);
struct scan_field chain6_fields[3];
uint8_t nRW = 0;
arm11_setup_field(arm11, 32, NULL, NULL, chain6_fields + 0);
arm11_setup_field(arm11, 7, &address, NULL, chain6_fields + 1);
arm11_setup_field(arm11, 1, &nRW, NULL, chain6_fields + 2);
arm11_add_dr_scan_vc(asizeof(chain6_fields), chain6_fields, TAP_IDLE);
/* Data is made available in Capture-DR and shifted out on the next access */
arm11_setup_field(arm11, 32, NULL, value, chain6_fields + 0);
arm11_setup_field(arm11, 7, &address, NULL, chain6_fields + 1);
arm11_setup_field(arm11, 1, &nRW, NULL, chain6_fields + 2);
arm11_add_dr_scan_vc(asizeof(chain6_fields), chain6_fields, TAP_IDLE);
CHECK_RETVAL(jtag_execute_queue());
return ERROR_OK;
}