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Merge pull request #883 from zqb-all/update_macro 

target/riscv: update some macro
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Tim Newsome 2023-07-14 10:23:07 -07:00 committed by GitHub
parent 21d21408aa d5425c253c
commit 8032b78775
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3 changed files with 25 additions and 19 deletions
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8
doc/openocd.texi
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@ -10596,11 +10596,9 @@ addreg rtest 0x1234 org.gnu.gdb.or1k.group0 system
@section RISC-V Architecture @section RISC-V Architecture
@uref{http://riscv.org/, RISC-V} is a free and open ISA. OpenOCD supports JTAG @uref{http://riscv.org/, RISC-V} is a free and open ISA. OpenOCD supports JTAG
debug of RV32 and RV64 cores in heterogeneous multicore systems of up to 32 debug of RV32 and RV64 cores in heterogeneous multicore systems of up to 2^20
harts. (It's possible to increase this limit to 1024 by changing harts. OpenOCD primarily supports 0.13 of the RISC-V Debug Specification,
RISCV_MAX_HARTS in riscv.h.) OpenOCD primarily supports 0.13 of the RISC-V but there is also support for legacy targets that implement version 0.11.
Debug Specification, but there is also support for legacy targets that
implement version 0.11.
@subsection RISC-V Terminology @subsection RISC-V Terminology

29
src/target/riscv/riscv-013.c
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@ -4448,9 +4448,9 @@ static int select_prepped_harts(struct target *target)
assert(dm->hart_count); assert(dm->hart_count);
unsigned hawindow_count = (dm->hart_count + 31) / 32; unsigned hawindow_count = (dm->hart_count + 31) / 32;
uint32_t hawindow[hawindow_count]; uint32_t *hawindow = calloc(hawindow_count, sizeof(uint32_t));
if (!hawindow)
memset(hawindow, 0, sizeof(uint32_t) * hawindow_count); return ERROR_FAIL;
target_list_t *entry; target_list_t *entry;
unsigned total_selected = 0; unsigned total_selected = 0;
@ -4472,22 +4472,31 @@ static int select_prepped_harts(struct target *target)
if (total_selected == 0) { if (total_selected == 0) {
LOG_TARGET_ERROR(target, "No harts were prepped!"); LOG_TARGET_ERROR(target, "No harts were prepped!");
free(hawindow);
return ERROR_FAIL; return ERROR_FAIL;
} else if (total_selected == 1) { } else if (total_selected == 1) {
/* Don't use hasel if we only need to talk to one hart. */ /* Don't use hasel if we only need to talk to one hart. */
free(hawindow);
return dm013_select_hart(target, selected_index); return dm013_select_hart(target, selected_index);
} }
if (dm013_select_hart(target, HART_INDEX_MULTIPLE) != ERROR_OK) if (dm013_select_hart(target, HART_INDEX_MULTIPLE) != ERROR_OK) {
free(hawindow);
return ERROR_FAIL; return ERROR_FAIL;
for (unsigned i = 0; i < hawindow_count; i++) {
if (dmi_write(target, DM_HAWINDOWSEL, i) != ERROR_OK)
return ERROR_FAIL;
if (dmi_write(target, DM_HAWINDOW, hawindow[i]) != ERROR_OK)
return ERROR_FAIL;
} }
for (unsigned i = 0; i < hawindow_count; i++) {
if (dmi_write(target, DM_HAWINDOWSEL, i) != ERROR_OK) {
free(hawindow);
return ERROR_FAIL;
}
if (dmi_write(target, DM_HAWINDOW, hawindow[i]) != ERROR_OK) {
free(hawindow);
return ERROR_FAIL;
}
}
free(hawindow);
return ERROR_OK; return ERROR_OK;
} }

7
src/target/riscv/riscv.h
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@ -12,12 +12,11 @@ struct riscv_program;
#include "target/register.h" #include "target/register.h"
#include "target/semihosting_common.h" #include "target/semihosting_common.h"
#include <helper/command.h> #include <helper/command.h>
#include <helper/bits.h>
#define RISCV_COMMON_MAGIC 0x52495356U #define RISCV_COMMON_MAGIC 0x52495356U
/* The register cache is statically allocated. */ #define RISCV_MAX_HARTS ((int)BIT(20))
#define RISCV_MAX_HARTS 1024
#define RISCV_MAX_REGISTERS 5000
#define RISCV_MAX_TRIGGERS 32 #define RISCV_MAX_TRIGGERS 32
#define RISCV_MAX_HWBPS 16 #define RISCV_MAX_HWBPS 16
@ -30,7 +29,7 @@ struct riscv_program;
#define RISCV_HGATP_PPN(xlen) ((xlen) == 32 ? HGATP32_PPN : HGATP64_PPN) #define RISCV_HGATP_PPN(xlen) ((xlen) == 32 ? HGATP32_PPN : HGATP64_PPN)
#define RISCV_PGSHIFT 12 #define RISCV_PGSHIFT 12
# define PG_MAX_LEVEL 4 #define PG_MAX_LEVEL 4
#define RISCV_NUM_MEM_ACCESS_METHODS 3 #define RISCV_NUM_MEM_ACCESS_METHODS 3