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ARMv7-A: tweak arch_state() 

Punt to the armv4_5_arch_state() for all the common stuff, to
shrink code and so we will get any improvements it provides.

Don't hide watchpoint status if we happen to be in "abort" mode.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This commit is contained in:
David Brownell 2009-12-03 16:18:24 -08:00
parent ea7a49cb9b
commit 7e2dffbbff
1 changed files with 4 additions and 10 deletions
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14
src/target/armv7a.c
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@ -98,22 +98,16 @@ int armv7a_arch_state(struct target *target)
return ERROR_INVALID_ARGUMENTS; return ERROR_INVALID_ARGUMENTS;
} }
LOG_USER("target halted in %s state due to %s, current mode: %s\n" armv4_5_arch_state(target);
"cpsr: 0x%8.8" PRIx32 " pc: 0x%8.8" PRIx32 "\n"
"MMU: %s, D-Cache: %s, I-Cache: %s", LOG_USER("MMU: %s, D-Cache: %s, I-Cache: %s",
armv4_5_state_strings[armv4_5->core_state],
Jim_Nvp_value2name_simple(nvp_target_debug_reason,
target->debug_reason)->name,
arm_mode_name(armv4_5->core_mode),
buf_get_u32(armv4_5->cpsr->value, 0, 32),
buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32),
state[armv7a->armv4_5_mmu.mmu_enabled], state[armv7a->armv4_5_mmu.mmu_enabled],
state[armv7a->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled], state[armv7a->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled],
state[armv7a->armv4_5_mmu.armv4_5_cache.i_cache_enabled]); state[armv7a->armv4_5_mmu.armv4_5_cache.i_cache_enabled]);
if (armv4_5->core_mode == ARMV4_5_MODE_ABT) if (armv4_5->core_mode == ARMV4_5_MODE_ABT)
armv7a_show_fault_registers(target); armv7a_show_fault_registers(target);
else if (target->debug_reason == DBG_REASON_WATCHPOINT) if (target->debug_reason == DBG_REASON_WATCHPOINT)
LOG_USER("Watchpoint triggered at PC %#08x", LOG_USER("Watchpoint triggered at PC %#08x",
(unsigned) armv7a->dpm.wp_pc); (unsigned) armv7a->dpm.wp_pc);