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Fixed formatting issues flagged by checkpatch.pl.

This commit is contained in:
Greg Savin 2019-04-09 13:35:52 -07:00
parent 7f18c48b83
commit 7e0baf6720
5 changed files with 23 additions and 28 deletions
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3
src/target/riscv/riscv-011.c
View File

@ -282,9 +282,8 @@ static uint32_t dtmcontrol_scan(struct target *target, uint32_t out)
uint8_t out_value[4]; uint8_t out_value[4];
#if BUILD_RISCV_ARTY_BSCAN == 1 #if BUILD_RISCV_ARTY_BSCAN == 1
if (target->bscan_tunnel_ir_width != 0) { if (target->bscan_tunnel_ir_width != 0)
return dtmcontrol_scan_via_bscan(target, out); return dtmcontrol_scan_via_bscan(target, out);
}
#endif #endif
buf_set_u32(out_value, 0, 32, out); buf_set_u32(out_value, 0, 32, out);

3
src/target/riscv/riscv-013.c
View File

@ -422,9 +422,8 @@ static uint32_t dtmcontrol_scan(struct target *target, uint32_t out)
uint8_t out_value[4]; uint8_t out_value[4];
#if BUILD_RISCV_ARTY_BSCAN == 1 #if BUILD_RISCV_ARTY_BSCAN == 1
if (target->bscan_tunnel_ir_width != 0) { if (target->bscan_tunnel_ir_width != 0)
return dtmcontrol_scan_via_bscan(target, out); return dtmcontrol_scan_via_bscan(target, out);
}
#endif #endif
buf_set_u32(out_value, 0, 32, out); buf_set_u32(out_value, 0, 32, out);

5
src/target/riscv/riscv.c
View File

@ -281,7 +281,6 @@ uint32_t dtmcontrol_scan_via_bscan(struct target *target, uint32_t out)
.out_value = bscan_zero, .out_value = bscan_zero,
.in_value = NULL, .in_value = NULL,
} }
}; };
struct scan_field tunneled_dr[] = { struct scan_field tunneled_dr[] = {
{ {
@ -337,9 +336,8 @@ static uint32_t dtmcontrol_scan(struct target *target, uint32_t out)
uint8_t out_value[4]; uint8_t out_value[4];
#if BUILD_RISCV_ARTY_BSCAN == 1 #if BUILD_RISCV_ARTY_BSCAN == 1
if (target->bscan_tunnel_ir_width != 0) { if (target->bscan_tunnel_ir_width != 0)
return dtmcontrol_scan_via_bscan(target, out); return dtmcontrol_scan_via_bscan(target, out);
}
#endif #endif
@ -408,7 +406,6 @@ static int riscv_init_target(struct command_context *cmd_ctx,
bscan_tunneled_ir_width[0] = target->bscan_tunnel_ir_width; bscan_tunneled_ir_width[0] = target->bscan_tunnel_ir_width;
bscan_tunneled_select_dmi[2].num_bits = target->bscan_tunnel_ir_width; bscan_tunneled_select_dmi[2].num_bits = target->bscan_tunnel_ir_width;
} }
#endif #endif
riscv_semihosting_init(target); riscv_semihosting_init(target);