target/testee: manage target->state
The testee target is usefull for certain non-cpu pass-through situations, for example in the case of a spi flash mapped to the DR of a JTAG tap, as is the case for most FPGAs with SPI flashs behind them. We just manage the RUNNING/RESET/HALTED state in the testee driver to support it being halted which is a requirement for flash banks. Change-Id: I1b4d52c58a1f6bd753e126bfde74dcc5164d7b69 Signed-off-by: Robert Jordens <jordens@gmail.com> Reviewed-on: http://openocd.zylin.com/2840 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
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@ -44,18 +44,23 @@ static int testee_init(struct command_context *cmd_ctx, struct target *target)
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}
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static int testee_poll(struct target *target)
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{
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if ((target->state == TARGET_RUNNING) || (target->state == TARGET_DEBUG_RUNNING))
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target->state = TARGET_HALTED;
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return ERROR_OK;
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}
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static int testee_halt(struct target *target)
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{
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target->state = TARGET_HALTED;
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return ERROR_OK;
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}
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static int testee_reset_assert(struct target *target)
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{
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target->state = TARGET_RESET;
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return ERROR_OK;
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}
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static int testee_reset_deassert(struct target *target)
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{
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target->state = TARGET_RUNNING;
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return ERROR_OK;
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}
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struct target_type testee_target = {
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