diff --git a/src/flash/nor/stellaris.c b/src/flash/nor/stellaris.c index 79aaf3ba2..8731f8b88 100644 --- a/src/flash/nor/stellaris.c +++ b/src/flash/nor/stellaris.c @@ -1355,6 +1355,7 @@ COMMAND_HANDLER(stellaris_handle_mass_erase_command) COMMAND_HANDLER(stellaris_handle_recover_command) { struct flash_bank *bank; + struct arm *arm; int retval; if (CMD_ARGC != 0) @@ -1383,12 +1384,13 @@ COMMAND_HANDLER(stellaris_handle_recover_command) } adapter_assert_reset(); + arm = target_to_arm(bank->target); for (int i = 0; i < 5; i++) { - retval = dap_to_swd(bank->target); + retval = dap_to_swd(arm->dap); if (retval != ERROR_OK) goto done; - retval = dap_to_jtag(bank->target); + retval = dap_to_jtag(arm->dap); if (retval != ERROR_OK) goto done; } diff --git a/src/target/adi_v5_jtag.c b/src/target/adi_v5_jtag.c index ad4183b5f..a3867e191 100644 --- a/src/target/adi_v5_jtag.c +++ b/src/target/adi_v5_jtag.c @@ -726,52 +726,3 @@ const struct dap_ops jtag_dp_ops = { .run = jtag_dp_run, .sync = jtag_dp_sync, }; - - -static const uint8_t swd2jtag_bitseq[] = { - /* More than 50 TCK/SWCLK cycles with TMS/SWDIO high, - * putting both JTAG and SWD logic into reset state. - */ - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - /* Switching equence disables SWD and enables JTAG - * NOTE: bits in the DP's IDCODE can expose the need for - * the old/deprecated sequence (0xae 0xde). - */ - 0x3c, 0xe7, - /* At least 50 TCK/SWCLK cycles with TMS/SWDIO high, - * putting both JTAG and SWD logic into reset state. - * NOTE: some docs say "at least 5". - */ - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, -}; - -/** Put the debug link into JTAG mode, if the target supports it. - * The link's initial mode may be either SWD or JTAG. - * - * @param target Enters JTAG mode (if possible). - * - * Note that targets implemented with SW-DP do not support JTAG, and - * that some targets which could otherwise support it may have been - * configured to disable JTAG signaling - * - * @return ERROR_OK or else a fault code. - */ -int dap_to_jtag(struct target *target) -{ - int retval; - - LOG_DEBUG("Enter JTAG mode"); - - /* REVISIT it's nasty to need to make calls to a "jtag" - * subsystem if the link isn't in JTAG mode... - */ - - retval = jtag_add_tms_seq(8 * sizeof(swd2jtag_bitseq), - swd2jtag_bitseq, TAP_RESET); - if (retval == ERROR_OK) - retval = jtag_execute_queue(); - - /* REVISIT set up the DAP's ops vector for JTAG mode. */ - - return retval; -} diff --git a/src/target/adi_v5_swd.c b/src/target/adi_v5_swd.c index b520223b0..eb181cb65 100644 --- a/src/target/adi_v5_swd.c +++ b/src/target/adi_v5_swd.c @@ -297,71 +297,6 @@ const struct dap_ops swd_dap_ops = { .quit = swd_quit, }; -/* - * This represents the bits which must be sent out on TMS/SWDIO to - * switch a DAP implemented using an SWJ-DP module into SWD mode. - * These bits are stored (and transmitted) LSB-first. - * - * See the DAP-Lite specification, section 2.2.5 for information - * about making the debug link select SWD or JTAG. (Similar info - * is in a few other ARM documents.) - */ -static const uint8_t jtag2swd_bitseq[] = { - /* More than 50 TCK/SWCLK cycles with TMS/SWDIO high, - * putting both JTAG and SWD logic into reset state. - */ - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - /* Switching sequence enables SWD and disables JTAG - * NOTE: bits in the DP's IDCODE may expose the need for - * an old/obsolete/deprecated sequence (0xb6 0xed). - */ - 0x9e, 0xe7, - /* More than 50 TCK/SWCLK cycles with TMS/SWDIO high, - * putting both JTAG and SWD logic into reset state. - */ - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, -}; - -/** - * Put the debug link into SWD mode, if the target supports it. - * The link's initial mode may be either JTAG (for example, - * with SWJ-DP after reset) or SWD. - * - * @param target Enters SWD mode (if possible). - * - * Note that targets using the JTAG-DP do not support SWD, and that - * some targets which could otherwise support it may have have been - * configured to disable SWD signaling - * - * @return ERROR_OK or else a fault code. - */ -int dap_to_swd(struct target *target) -{ - struct arm *arm = target_to_arm(target); - int retval; - - if (!arm->dap) { - LOG_ERROR("SWD mode is not available"); - return ERROR_FAIL; - } - - LOG_DEBUG("Enter SWD mode"); - - /* REVISIT it's ugly to need to make calls to a "jtag" - * subsystem if the link may not be in JTAG mode... - */ - - retval = jtag_add_tms_seq(8 * sizeof(jtag2swd_bitseq), - jtag2swd_bitseq, TAP_INVALID); - if (retval == ERROR_OK) - retval = jtag_execute_queue(); - - /* set up the DAP's ops vector for SWD mode. */ - arm->dap->ops = &swd_dap_ops; - - return retval; -} - static const struct command_registration swd_commands[] = { { /* diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c index 03e642bfe..021d02a44 100644 --- a/src/target/arm_adi_v5.c +++ b/src/target/arm_adi_v5.c @@ -59,7 +59,7 @@ /* * Relevant specifications from ARM include: * - * ARM(tm) Debug Interface v5 Architecture Specification ARM IHI 0031A + * ARM(tm) Debug Interface v5 Architecture Specification ARM IHI 0031E * CoreSight(tm) v1.0 Architecture Specification ARM IHI 0029B * * CoreSight(tm) DAP-Lite TRM, ARM DDI 0316D @@ -73,6 +73,8 @@ #include "jtag/interface.h" #include "arm.h" #include "arm_adi_v5.h" +#include "jtag/swd.h" +#include "transport/transport.h" #include #include #include @@ -788,6 +790,77 @@ int mem_ap_init(struct adiv5_ap *ap) return ERROR_OK; } +/** + * Put the debug link into SWD mode, if the target supports it. + * The link's initial mode may be either JTAG (for example, + * with SWJ-DP after reset) or SWD. + * + * Note that targets using the JTAG-DP do not support SWD, and that + * some targets which could otherwise support it may have been + * configured to disable SWD signaling + * + * @param dap The DAP used + * @return ERROR_OK or else a fault code. + */ +int dap_to_swd(struct adiv5_dap *dap) +{ + int retval; + + LOG_DEBUG("Enter SWD mode"); + + if (transport_is_jtag()) { + retval = jtag_add_tms_seq(swd_seq_jtag_to_swd_len, + swd_seq_jtag_to_swd, TAP_INVALID); + if (retval == ERROR_OK) + retval = jtag_execute_queue(); + return retval; + } + + if (transport_is_swd()) { + const struct swd_driver *swd = adiv5_dap_swd_driver(dap); + + return swd->switch_seq(JTAG_TO_SWD); + } + + LOG_ERROR("Nor JTAG nor SWD transport"); + return ERROR_FAIL; +} + +/** + * Put the debug link into JTAG mode, if the target supports it. + * The link's initial mode may be either SWD or JTAG. + * + * Note that targets implemented with SW-DP do not support JTAG, and + * that some targets which could otherwise support it may have been + * configured to disable JTAG signaling + * + * @param dap The DAP used + * @return ERROR_OK or else a fault code. + */ +int dap_to_jtag(struct adiv5_dap *dap) +{ + int retval; + + LOG_DEBUG("Enter JTAG mode"); + + if (transport_is_jtag()) { + retval = jtag_add_tms_seq(swd_seq_swd_to_jtag_len, + swd_seq_swd_to_jtag, TAP_RESET); + if (retval == ERROR_OK) + retval = jtag_execute_queue(); + return retval; + } + + if (transport_is_swd()) { + const struct swd_driver *swd = adiv5_dap_swd_driver(dap); + + return swd->switch_seq(SWD_TO_JTAG); + } + + LOG_ERROR("Nor JTAG nor SWD transport"); + return ERROR_FAIL; +} + /* CID interpretation -- see ARM IHI 0029B section 3 * and ARM IHI 0031A table 13-3. */ diff --git a/src/target/arm_adi_v5.h b/src/target/arm_adi_v5.h index a340b76f0..96291a7af 100644 --- a/src/target/arm_adi_v5.h +++ b/src/target/arm_adi_v5.h @@ -516,10 +516,10 @@ int dap_lookup_cs_component(struct adiv5_ap *ap, struct target; /* Put debug link into SWD mode */ -int dap_to_swd(struct target *target); +int dap_to_swd(struct adiv5_dap *dap); /* Put debug link into JTAG mode */ -int dap_to_jtag(struct target *target); +int dap_to_jtag(struct adiv5_dap *dap); extern const struct command_registration dap_instance_commands[];