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target/cortex_m: fix couple of comments 

Fix obsoleted references to Cortex-M3 from the time
when M3 was the only supported Cortex.

Fix typo.

Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Change-Id: I6f93265f1b9328fec063fecd819210deb28aaf2c
Reviewed-on: https://review.openocd.org/c/openocd/+/8099
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This commit is contained in:
Tomas Vanek 2024-01-21 12:29:14 +01:00 committed by Antonio Borneo
parent 226085065b
commit 79f519bb63
1 changed files with 6 additions and 8 deletions
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14
src/target/cortex_m.c
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@ -1607,7 +1607,7 @@ static int cortex_m_assert_reset(struct target *target)
} }
/* some cores support connecting while srst is asserted /* some cores support connecting while srst is asserted
* use that mode is it has been configured */ * use that mode if it has been configured */
bool srst_asserted = false; bool srst_asserted = false;
@ -1693,9 +1693,8 @@ static int cortex_m_assert_reset(struct target *target)
/* srst is asserted, ignore AP access errors */ /* srst is asserted, ignore AP access errors */
retval = ERROR_OK; retval = ERROR_OK;
} else { } else {
/* Use a standard Cortex-M3 software reset mechanism. /* Use a standard Cortex-M software reset mechanism.
* We default to using VECTRESET as it is supported on all current cores * We default to using VECTRESET.
* (except Cortex-M0, M0+ and M1 which support SYSRESETREQ only!)
* This has the disadvantage of not resetting the peripherals, so a * This has the disadvantage of not resetting the peripherals, so a
* reset-init event handler is needed to perform any peripheral resets. * reset-init event handler is needed to perform any peripheral resets.
*/ */
@ -2785,7 +2784,7 @@ static int cortex_m_init_arch_info(struct target *target,
armv7m_init_arch_info(target, armv7m); armv7m_init_arch_info(target, armv7m);
/* default reset mode is to use srst if fitted /* default reset mode is to use srst if fitted
* if not it will use CORTEX_M3_RESET_VECTRESET */ * if not it will use CORTEX_M_RESET_VECTRESET */
cortex_m->soft_reset_config = CORTEX_M_RESET_VECTRESET; cortex_m->soft_reset_config = CORTEX_M_RESET_VECTRESET;
armv7m->arm.dap = dap; armv7m->arm.dap = dap;
@ -2842,8 +2841,7 @@ static int cortex_m_verify_pointer(struct command_invocation *cmd,
/* /*
* Only stuff below this line should need to verify that its target * Only stuff below this line should need to verify that its target
* is a Cortex-M3. Everything else should have indirected through the * is a Cortex-M with available DAP access (not a HLA adapter).
* cortexm3_target structure, which is only used with CM3 targets.
*/ */
COMMAND_HANDLER(handle_cortex_m_vector_catch_command) COMMAND_HANDLER(handle_cortex_m_vector_catch_command)
@ -2902,7 +2900,7 @@ COMMAND_HANDLER(handle_cortex_m_vector_catch_command)
break; break;
} }
if (i == ARRAY_SIZE(vec_ids)) { if (i == ARRAY_SIZE(vec_ids)) {
LOG_TARGET_ERROR(target, "No CM3 vector '%s'", CMD_ARGV[CMD_ARGC]); LOG_TARGET_ERROR(target, "No Cortex-M vector '%s'", CMD_ARGV[CMD_ARGC]);
return ERROR_COMMAND_SYNTAX_ERROR; return ERROR_COMMAND_SYNTAX_ERROR;
} }
} }