From 745eaa7c632b970d6f80b20391b52f405ea1fda5 Mon Sep 17 00:00:00 2001 From: wangyanwen Date: Fri, 13 Dec 2024 10:25:57 +0800 Subject: [PATCH] src/target/riscv: fix nuclei etrace in smp debug mode Change-Id: I44bb1d7e813270f916cd252f8d7ecf5cd0b5e350 Signed-off-by: wangyanwen --- src/target/riscv/nuclei_riscv.c | 20 ++++++++++++++++---- src/target/target.c | 1 + src/target/target.h | 1 + 3 files changed, 18 insertions(+), 4 deletions(-) diff --git a/src/target/riscv/nuclei_riscv.c b/src/target/riscv/nuclei_riscv.c index ac78c1eab..1fe57d64d 100644 --- a/src/target/riscv/nuclei_riscv.c +++ b/src/target/riscv/nuclei_riscv.c @@ -386,7 +386,6 @@ COMMAND_HANDLER(handle_nuclei_cpuinfo) static target_addr_t atb2axi_config_addr = 0xa5a5a5a5; static target_addr_t buffer_addr = 0xa5a5a5a5; static uint32_t buffer_size; -static riscv_reg_t tselect = 0xa5a5a5a5; static int etrace_read_reg(struct target *target, uint32_t offset, uint32_t *value) { @@ -477,6 +476,7 @@ COMMAND_HANDLER(handle_etrace_enable_command) target_real = target; riscv_reg_t dpc_rb; + riscv_reg_t tselect; riscv_reg_t tdata1 = field_value(CSR_MCONTROL_TYPE(riscv_xlen(target_real)), CSR_TDATA1_TYPE_MCONTROL) | field_value(CSR_MCONTROL_ACTION, CSR_MCONTROL_ACTION_TRACE_ON) | field_value(CSR_MCONTROL_M, 1) | @@ -484,11 +484,15 @@ COMMAND_HANDLER(handle_etrace_enable_command) field_value(CSR_MCONTROL_U, 1) | field_value(CSR_MCONTROL_EXECUTE, 1); RISCV_INFO(r); - if (atb2axi_config_addr == 0xa5a5a5a5) { - if (find_next_free_trigger(target_real, CSR_TDATA1_TYPE_MCONTROL, false, &tselect) != ERROR_OK) + if (target_real->etrace_trigger_index == 0xFFFFFFFF) { + if (find_next_free_trigger(target_real, CSR_TDATA1_TYPE_MCONTROL, false, + &target_real->etrace_trigger_index) != ERROR_OK) { + LOG_ERROR("No available trigger could be reserved for etrace usage.\n"); return ERROR_FAIL; - r->reserved_triggers[tselect] = true; + } + r->reserved_triggers[target_real->etrace_trigger_index] = true; } + tselect = target_real->etrace_trigger_index; if (riscv_reg_set(target_real, GDB_REGNO_TSELECT, tselect) != ERROR_OK) return ERROR_FAIL; if (riscv_reg_set(target_real, GDB_REGNO_TDATA1, tdata1) != ERROR_OK) @@ -514,12 +518,17 @@ COMMAND_HANDLER(handle_etrace_disable_command) target_real = target; riscv_reg_t dpc_rb; + riscv_reg_t tselect; riscv_reg_t tdata1 = field_value(CSR_MCONTROL_TYPE(riscv_xlen(target_real)), CSR_TDATA1_TYPE_MCONTROL) | field_value(CSR_MCONTROL_ACTION, CSR_MCONTROL_ACTION_TRACE_OFF) | field_value(CSR_MCONTROL_M, 1) | field_value(CSR_MCONTROL_S, 1) | field_value(CSR_MCONTROL_U, 1) | field_value(CSR_MCONTROL_EXECUTE, 1); + RISCV_INFO(r); + if (target_real->etrace_trigger_index == 0xFFFFFFFF) + return ERROR_OK; + tselect = target_real->etrace_trigger_index; if (riscv_reg_set(target_real, GDB_REGNO_TSELECT, tselect) != ERROR_OK) return ERROR_FAIL; if (riscv_reg_set(target_real, GDB_REGNO_TDATA1, tdata1) != ERROR_OK) @@ -529,6 +538,9 @@ COMMAND_HANDLER(handle_etrace_disable_command) if (riscv_reg_set(target_real, GDB_REGNO_TDATA2, dpc_rb) != ERROR_OK) return ERROR_FAIL; + r->reserved_triggers[target_real->etrace_trigger_index] = false; + target_real->etrace_trigger_index = 0xFFFFFFFF; + return ERROR_OK; } diff --git a/src/target/target.c b/src/target/target.c index ea7f12d1a..867653077 100644 --- a/src/target/target.c +++ b/src/target/target.c @@ -1549,6 +1549,7 @@ static int target_init(struct command_context *cmd_ctx, bool resethalt) if (retval != ERROR_OK) return retval; target->resethalt_during_init = resethalt; + target->etrace_trigger_index = 0xFFFFFFFF; } if (!all_targets) diff --git a/src/target/target.h b/src/target/target.h index 654c5af01..0516cf1db 100644 --- a/src/target/target.h +++ b/src/target/target.h @@ -215,6 +215,7 @@ struct target { /* The semihosting information, extracted from the target. */ struct semihosting *semihosting; bool resethalt_during_init; + unsigned int etrace_trigger_index; }; struct target_list {