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Call riscv_xlen() to support 32-bit FESPI targets

This commit is contained in:
Palmer Dabbelt 2017-04-06 15:19:17 -07:00
parent d0fcbc9b51
commit 74095335dc
1 changed files with 6 additions and 4 deletions
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10
src/flash/nor/fespi.c
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@ -42,6 +42,7 @@
#include <jtag/jtag.h> #include <jtag/jtag.h>
#include <helper/time_support.h> #include <helper/time_support.h>
#include <target/algorithm.h> #include <target/algorithm.h>
#include "target/riscv/riscv.h"
/* Register offsets */ /* Register offsets */
@ -767,12 +768,13 @@ static int steps_execute(struct algorithm_steps *as,
struct fespi_flash_bank *fespi_info = bank->driver_priv; struct fespi_flash_bank *fespi_info = bank->driver_priv;
uint32_t ctrl_base = fespi_info->ctrl_base; uint32_t ctrl_base = fespi_info->ctrl_base;
uint8_t *data_buf = malloc(data_wa->size); uint8_t *data_buf = malloc(data_wa->size);
int xlen = riscv_xlen(target);
struct reg_param reg_params[2]; struct reg_param reg_params[2];
init_reg_param(&reg_params[0], "x10", 32, PARAM_OUT); init_reg_param(&reg_params[0], "x10", xlen, PARAM_OUT);
init_reg_param(&reg_params[1], "x11", 32, PARAM_OUT); init_reg_param(&reg_params[1], "x11", xlen, PARAM_OUT);
buf_set_u32(reg_params[0].value, 0, 32, ctrl_base); buf_set_u64(reg_params[0].value, 0, xlen, ctrl_base);
buf_set_u32(reg_params[1].value, 0, 32, data_wa->address); buf_set_u64(reg_params[1].value, 0, xlen, data_wa->address);
while (!as_empty(as)) { while (!as_empty(as)) {
keep_alive(); keep_alive();
unsigned bytes = as_compile(as, data_buf, data_wa->size); unsigned bytes = as_compile(as, data_buf, data_wa->size);