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zy1000: fix optimisaion bug in dcc writes 

Introduced & corrected since 0.4.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
This commit is contained in:
Øyvind Harboe 2010-03-22 08:27:03 +01:00
parent 4be9eded7f
commit 721502f1d3
1 changed files with 2 additions and 8 deletions
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10
src/jtag/zy1000/zy1000.c
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@ -828,23 +828,17 @@ void embeddedice_write_dcc(struct jtag_tap *tap, int reg_addr, uint8_t *buffer,
}
} else
{
tap_state_t end_state = TAP_IDLE;
tap_state_t shift_end_state = TAP_DRSHIFT;
if (post_bits == 0)
shift_end_state = end_state;
shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, pre_bits, 0);
int i;
for (i = 0; i < count - 1; i++)
{
/* Fewer pokes means we get to use the FIFO more efficiently */
shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, fast_target_buffer_get_u32(buffer, little));
shiftValueInner(TAP_DRSHIFT, shift_end_state, 6 + post_bits + pre_bits, (reg_addr | (1 << 5)));
shiftValueInner(TAP_DRSHIFT, TAP_IDLE, 6 + post_bits + pre_bits, (reg_addr | (1 << 5)));
buffer += 4;
}
shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, fast_target_buffer_get_u32(buffer, little));
shiftValueInner(TAP_DRSHIFT, shift_end_state, 6, reg_addr | (1 << 5));
shiftValueInner(shift_end_state, end_state, post_bits, 0);
shiftValueInner(TAP_DRSHIFT, TAP_IDLE, 6 + post_bits, (reg_addr | (1 << 5)));
}
}