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jtag/aice: fix clang static analyzer warnings 

Change-Id: I6c801c2406cd117f2bcf930a5b329c441ab5f1ff
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5368
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
This commit is contained in:
Tomas Vanek 2019-12-20 23:32:37 +01:00
parent c84f75de81
commit 6ff852e415
2 changed files with 15 additions and 12 deletions
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1
src/jtag/aice/aice_transport.c
View File

@ -47,6 +47,7 @@ static int jim_newtap_expected_id(Jim_Nvp *n, Jim_GetOptInfo *goi,
return JIM_ERR; return JIM_ERR;
} }
assert(pTap->expected_ids);
memcpy(new_expected_ids, pTap->expected_ids, expected_len); memcpy(new_expected_ids, pTap->expected_ids, expected_len);
new_expected_ids[pTap->expected_ids_cnt] = w; new_expected_ids[pTap->expected_ids_cnt] = w;

26
src/jtag/aice/aice_usb.c
View File

@ -484,7 +484,9 @@ static int aice_usb_packet_flush(void)
i = 0; i = 0;
while (1) { while (1) {
aice_read_ctrl(AICE_READ_CTRL_BATCH_STATUS, &batch_status); int retval = aice_read_ctrl(AICE_READ_CTRL_BATCH_STATUS, &batch_status);
if (retval != ERROR_OK)
return retval;
if (batch_status & 0x1) if (batch_status & 0x1)
return ERROR_OK; return ERROR_OK;
@ -1797,8 +1799,8 @@ static int aice_write_reg(uint32_t coreid, uint32_t num, uint32_t val);
static int check_suppressed_exception(uint32_t coreid, uint32_t dbger_value) static int check_suppressed_exception(uint32_t coreid, uint32_t dbger_value)
{ {
uint32_t ir4_value; uint32_t ir4_value = 0;
uint32_t ir6_value; uint32_t ir6_value = 0;
/* the default value of handling_suppressed_exception is false */ /* the default value of handling_suppressed_exception is false */
static bool handling_suppressed_exception; static bool handling_suppressed_exception;
@ -1852,7 +1854,7 @@ static int check_privilege(uint32_t coreid, uint32_t dbger_value)
static int aice_check_dbger(uint32_t coreid, uint32_t expect_status) static int aice_check_dbger(uint32_t coreid, uint32_t expect_status)
{ {
uint32_t i = 0; uint32_t i = 0;
uint32_t value_dbger; uint32_t value_dbger = 0;
while (1) { while (1) {
aice_read_misc(coreid, NDS_EDM_MISC_DBGER, &value_dbger); aice_read_misc(coreid, NDS_EDM_MISC_DBGER, &value_dbger);
@ -1973,7 +1975,7 @@ static int aice_read_reg(uint32_t coreid, uint32_t num, uint32_t *val)
aice_execute_dim(coreid, instructions, 4); aice_execute_dim(coreid, instructions, 4);
uint32_t value_edmsw; uint32_t value_edmsw = 0;
aice_read_edmsr(coreid, NDS_EDM_SR_EDMSW, &value_edmsw); aice_read_edmsr(coreid, NDS_EDM_SR_EDMSW, &value_edmsw);
if (value_edmsw & NDS_EDMSW_WDV) if (value_edmsw & NDS_EDMSW_WDV)
aice_read_dtr(coreid, val); aice_read_dtr(coreid, val);
@ -2018,7 +2020,7 @@ static int aice_write_reg(uint32_t coreid, uint32_t num, uint32_t val)
LOG_DEBUG("aice_write_reg, reg_no: 0x%08" PRIx32 ", value: 0x%08" PRIx32, num, val); LOG_DEBUG("aice_write_reg, reg_no: 0x%08" PRIx32 ", value: 0x%08" PRIx32, num, val);
uint32_t instructions[4]; /** execute instructions in DIM */ uint32_t instructions[4]; /** execute instructions in DIM */
uint32_t value_edmsw; uint32_t value_edmsw = 0;
aice_write_dtr(coreid, val); aice_write_dtr(coreid, val);
aice_read_edmsr(coreid, NDS_EDM_SR_EDMSW, &value_edmsw); aice_read_edmsr(coreid, NDS_EDM_SR_EDMSW, &value_edmsw);
@ -2447,7 +2449,7 @@ static int aice_backup_tmp_registers(uint32_t coreid)
LOG_DEBUG("backup_tmp_registers -"); LOG_DEBUG("backup_tmp_registers -");
/* backup target DTR first(if the target DTR is valid) */ /* backup target DTR first(if the target DTR is valid) */
uint32_t value_edmsw; uint32_t value_edmsw = 0;
aice_read_edmsr(coreid, NDS_EDM_SR_EDMSW, &value_edmsw); aice_read_edmsr(coreid, NDS_EDM_SR_EDMSW, &value_edmsw);
core_info[coreid].edmsw_backup = value_edmsw; core_info[coreid].edmsw_backup = value_edmsw;
if (value_edmsw & 0x1) { /* EDMSW.WDV == 1 */ if (value_edmsw & 0x1) { /* EDMSW.WDV == 1 */
@ -2614,13 +2616,13 @@ static int aice_usb_halt(uint32_t coreid)
aice_init_edm_registers(coreid, false); aice_init_edm_registers(coreid, false);
/** Clear EDM_CTL.DBGIM & EDM_CTL.DBGACKM */ /** Clear EDM_CTL.DBGIM & EDM_CTL.DBGACKM */
uint32_t edm_ctl_value; uint32_t edm_ctl_value = 0;
aice_read_edmsr(coreid, NDS_EDM_SR_EDM_CTL, &edm_ctl_value); aice_read_edmsr(coreid, NDS_EDM_SR_EDM_CTL, &edm_ctl_value);
if (edm_ctl_value & 0x3) if (edm_ctl_value & 0x3)
aice_write_edmsr(coreid, NDS_EDM_SR_EDM_CTL, edm_ctl_value & ~(0x3)); aice_write_edmsr(coreid, NDS_EDM_SR_EDM_CTL, edm_ctl_value & ~(0x3));
uint32_t dbger; uint32_t dbger = 0;
uint32_t acc_ctl_value; uint32_t acc_ctl_value = 0;
core_info[coreid].debug_under_dex_on = false; core_info[coreid].debug_under_dex_on = false;
aice_read_misc(coreid, NDS_EDM_MISC_DBGER, &dbger); aice_read_misc(coreid, NDS_EDM_MISC_DBGER, &dbger);
@ -2661,7 +2663,7 @@ static int aice_usb_halt(uint32_t coreid)
* it is only for debugging 'debug exception handler' purpose. * it is only for debugging 'debug exception handler' purpose.
* after openocd detaches from target, target behavior is * after openocd detaches from target, target behavior is
* undefined. */ * undefined. */
uint32_t ir0_value; uint32_t ir0_value = 0;
uint32_t debug_mode_ir0_value; uint32_t debug_mode_ir0_value;
aice_read_reg(coreid, IR0, &ir0_value); aice_read_reg(coreid, IR0, &ir0_value);
debug_mode_ir0_value = ir0_value | 0x408; /* turn on DEX, set POM = 1 */ debug_mode_ir0_value = ir0_value | 0x408; /* turn on DEX, set POM = 1 */
@ -4029,7 +4031,7 @@ static int aice_usb_profiling(uint32_t coreid, uint32_t interval, uint32_t itera
/* check status */ /* check status */
uint32_t i; uint32_t i;
uint32_t batch_status; uint32_t batch_status = 0;
i = 0; i = 0;
while (1) { while (1) {