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target/riscv: use buf_get_uXX instead of manual bit shift 

Replaced manual bit shift with buf_get_u64/buf_get_u32

Signed-off-by: Farid Khaydari <f.khaydari@syntacore.com>
This commit is contained in:
Farid Khaydari 2024-11-22 16:03:58 +03:00
parent f51900b4a2
commit 6fafca021c
1 changed files with 8 additions and 20 deletions
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28
src/target/riscv/riscv-013.c
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@ -1203,14 +1203,8 @@ static int scratch_read64(struct target *target, scratch_mem_t *scratch,
uint8_t buffer[8] = {0}; uint8_t buffer[8] = {0};
if (read_memory(target, scratch->debug_address, 4, 2, buffer, 4) != ERROR_OK) if (read_memory(target, scratch->debug_address, 4, 2, buffer, 4) != ERROR_OK)
return ERROR_FAIL; return ERROR_FAIL;
*value = buffer[0] | *value = buf_get_u64(buffer,
(((uint64_t) buffer[1]) << 8) | /* first = */ 0, /* bit_num = */ 64);
(((uint64_t) buffer[2]) << 16) |
(((uint64_t) buffer[3]) << 24) |
(((uint64_t) buffer[4]) << 32) |
(((uint64_t) buffer[5]) << 40) |
(((uint64_t) buffer[6]) << 48) |
(((uint64_t) buffer[7]) << 56);
} }
break; break;
} }
@ -4486,27 +4480,21 @@ static int write_memory_bus_v1(struct target *target, target_addr_t address,
uint32_t sbvalue[4] = { 0 }; uint32_t sbvalue[4] = { 0 };
if (size > 12) { if (size > 12) {
sbvalue[3] = ((uint32_t)p[12]) | sbvalue[3] = buf_get_u32(&p[12],
(((uint32_t)p[13]) << 8) | /* first = */ 0, /* bit_num = */ 32);
(((uint32_t)p[14]) << 16) |
(((uint32_t)p[15]) << 24);
riscv_batch_add_dm_write(batch, DM_SBDATA3, sbvalue[3], false, riscv_batch_add_dm_write(batch, DM_SBDATA3, sbvalue[3], false,
RISCV_DELAY_BASE); RISCV_DELAY_BASE);
} }
if (size > 8) { if (size > 8) {
sbvalue[2] = ((uint32_t)p[8]) | sbvalue[2] = buf_get_u32(&p[8],
(((uint32_t)p[9]) << 8) | /* first = */ 0, /* bit_num = */ 32);
(((uint32_t)p[10]) << 16) |
(((uint32_t)p[11]) << 24);
riscv_batch_add_dm_write(batch, DM_SBDATA2, sbvalue[2], false, riscv_batch_add_dm_write(batch, DM_SBDATA2, sbvalue[2], false,
RISCV_DELAY_BASE); RISCV_DELAY_BASE);
} }
if (size > 4) { if (size > 4) {
sbvalue[1] = ((uint32_t)p[4]) | sbvalue[1] = buf_get_u32(&p[4],
(((uint32_t)p[5]) << 8) | /* first = */ 0, /* bit_num = */ 32);
(((uint32_t)p[6]) << 16) |
(((uint32_t)p[7]) << 24);
riscv_batch_add_dm_write(batch, DM_SBDATA1, sbvalue[1], false, riscv_batch_add_dm_write(batch, DM_SBDATA1, sbvalue[1], false,
RISCV_DELAY_BASE); RISCV_DELAY_BASE);
} }