interesting
/
riscv-openocd
1
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

tcl/at91/sam9_smc: fix syntax errors 

This file has been added to OpenOCD 0.5.0 in 2011, before gerrit
gets in use, with commit ba71e8c521 ("at91: add chip register
definition and generic init support").
The only procedure in the file has never been referenced in any
other part of OpenOCD. This procedure has syntax errors while uses
its argument 'cs' and several unmatched parenthesis, which clearly
highlights that it has never been used so far.
Gerrit does not report any patch aimed at fixing it.

Even if the file seems unused and could be removed, let's fix it
in the hope it could get used.
While there, remove some useless parenthesis and format it using
the new simplified syntax required by jimtcl 0.81.

Change-Id: Ied26456262e7b99de37667a8ce418f4f12e237bd
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: ba71e8c521 ("at91: add chip register definition and generic init support")
Reviewed-on: http://openocd.zylin.com/6157
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
This commit is contained in:
Antonio Borneo 2021-04-10 15:58:22 +02:00
parent df443551a8
commit 6f1252373b
1 changed files with 16 additions and 16 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

32
tcl/chip/atmel/at91/sam9_smc.cfg
View File

@ -26,30 +26,30 @@
# tdf_cycles # tdf_cycles
proc sam9_smc_config { cs smc_config } { proc sam9_smc_config { cs smc_config } {
;# Setup Register for CS n ;# Setup Register for CS n
set AT91_SMC_SETUP [expr ($::AT91_SMC + 0x00 + ((cs)*0x10))] set AT91_SMC_SETUP [expr {$::AT91_SMC + 0x00 + $cs * 0x10}]
set val [expr ($smc_config(nwe_setup) << 0)] set val [expr {$smc_config(nwe_setup) << 0}]
set val [expr ($val | $smc_config(ncs_write_setup) << 8] set val [expr {$val | $smc_config(ncs_write_setup) << 8}]
set val [expr ($val | $smc_config(nrd_setup)) << 16] set val [expr {$val | $smc_config(nrd_setup)) << 16}]
set val [expr ($val | $smc_config(ncs_read_setup) << 24] set val [expr {$val | $smc_config(ncs_read_setup) << 24}]
mww $AT91_SMC_SETUP $val mww $AT91_SMC_SETUP $val
;# Pulse Register for CS n ;# Pulse Register for CS n
set AT91_SMC_PULSE [expr ($::AT91_SMC + 0x04 + ((cs)*0x10))] set AT91_SMC_PULSE [expr {$::AT91_SMC + 0x04 + $cs * 0x10}]
set val [expr ($smc_config(nwe_pulse) << 0)] set val [expr {$smc_config(nwe_pulse) << 0}]
set val [expr ($val | $smc_config(ncs_write_pulse) << 8] set val [expr {$val | $smc_config(ncs_write_pulse) << 8}]
set val [expr ($val | $smc_config(nrd_pulse) << 16] set val [expr {$val | $smc_config(nrd_pulse) << 16}]
set val [expr ($val | $smc_config(ncs_read_pulse) << 24] set val [expr {$val | $smc_config(ncs_read_pulse) << 24}]
mww $AT91_SMC_PULSE $val mww $AT91_SMC_PULSE $val
;# Cycle Register for CS n ;# Cycle Register for CS n
set AT91_SMC_CYCLE [expr ($::AT91_SMC + 0x08 + ((cs)*0x10))] set AT91_SMC_CYCLE [expr {$::AT91_SMC + 0x08 + $cs * 0x10}]
set val [expr ($smc_config(write_cycle) << 0)] set val [expr {$smc_config(write_cycle) << 0}]
set val [expr ($val | $smc_config(read_cycle) << 16] set val [expr {$val | $smc_config(read_cycle) << 16}]
mww $AT91_SMC_CYCLE $val mww $AT91_SMC_CYCLE $val
;# Mode Register for CS n ;# Mode Register for CS n
set AT91_SMC_MODE [expr ($::AT91_SMC + 0x0c + ((cs)*0x10))] set AT91_SMC_MODE [expr {$::AT91_SMC + 0x0c + $cs * 0x10}]
set val [expr ($smc_config(mode) << 0)] set val [expr {$smc_config(mode) << 0}]
set val [expr ($val | $smc_config(tdf_cycles) << 16] set val [expr {$val | $smc_config(tdf_cycles) << 16}]
mww $AT91_SMC_MODE $val mww $AT91_SMC_MODE $val
} }