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armv7a: fix-up dcache clean and flush functions inner loop pattern 

Other cache functions use an updated pattern for the address range loop.
Bring dcache clean and flush functions in line.

Change-Id: Iccb4a05c49054471033a3403363110cb08245d5b
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3035
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
This commit is contained in:
Matthias Welwarsky 2015-10-18 14:12:27 +02:00 committed by Paul Fertser
parent f24aa404ba
commit 6d7f5be6ac
1 changed files with 18 additions and 8 deletions
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26
src/target/armv7a_cache.c
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@ -218,7 +218,8 @@ int armv7a_l1_d_cache_clean_virt(struct target *target, uint32_t virt,
struct armv7a_common *armv7a = target_to_armv7a(target); struct armv7a_common *armv7a = target_to_armv7a(target);
struct arm_dpm *dpm = armv7a->arm.dpm; struct arm_dpm *dpm = armv7a->arm.dpm;
struct armv7a_cache_common *armv7a_cache = &armv7a->armv7a_mmu.armv7a_cache; struct armv7a_cache_common *armv7a_cache = &armv7a->armv7a_mmu.armv7a_cache;
uint32_t i, linelen = armv7a_cache->dminline; uint32_t linelen = armv7a_cache->dminline;
uint32_t va_line, va_end;
int retval; int retval;
retval = armv7a_l1_d_cache_sanity_check(target); retval = armv7a_l1_d_cache_sanity_check(target);
@ -229,15 +230,19 @@ int armv7a_l1_d_cache_clean_virt(struct target *target, uint32_t virt,
if (retval != ERROR_OK) if (retval != ERROR_OK)
goto done; goto done;
for (i = 0; i < size; i += linelen) { va_line = virt & (-linelen);
uint32_t offs = virt + i; va_end = virt + size;
while (va_line < va_end) {
/* DCCMVAC - Data Cache Clean by MVA to PoC */ /* DCCMVAC - Data Cache Clean by MVA to PoC */
retval = dpm->instr_write_data_r0(dpm, retval = dpm->instr_write_data_r0(dpm,
ARMV4_5_MCR(15, 0, 0, 7, 10, 1), offs); ARMV4_5_MCR(15, 0, 0, 7, 10, 1), va_line);
if (retval != ERROR_OK) if (retval != ERROR_OK)
goto done; goto done;
va_line += linelen;
} }
dpm->finish(dpm);
return retval; return retval;
done: done:
@ -253,7 +258,8 @@ int armv7a_l1_d_cache_flush_virt(struct target *target, uint32_t virt,
struct armv7a_common *armv7a = target_to_armv7a(target); struct armv7a_common *armv7a = target_to_armv7a(target);
struct arm_dpm *dpm = armv7a->arm.dpm; struct arm_dpm *dpm = armv7a->arm.dpm;
struct armv7a_cache_common *armv7a_cache = &armv7a->armv7a_mmu.armv7a_cache; struct armv7a_cache_common *armv7a_cache = &armv7a->armv7a_mmu.armv7a_cache;
uint32_t i, linelen = armv7a_cache->dminline; uint32_t linelen = armv7a_cache->dminline;
uint32_t va_line, va_end;
int retval; int retval;
retval = armv7a_l1_d_cache_sanity_check(target); retval = armv7a_l1_d_cache_sanity_check(target);
@ -264,15 +270,19 @@ int armv7a_l1_d_cache_flush_virt(struct target *target, uint32_t virt,
if (retval != ERROR_OK) if (retval != ERROR_OK)
goto done; goto done;
for (i = 0; i < size; i += linelen) { va_line = virt & (-linelen);
uint32_t offs = virt + i; va_end = virt + size;
while (va_line < va_end) {
/* DCCIMVAC */ /* DCCIMVAC */
retval = dpm->instr_write_data_r0(dpm, retval = dpm->instr_write_data_r0(dpm,
ARMV4_5_MCR(15, 0, 0, 7, 14, 1), offs); ARMV4_5_MCR(15, 0, 0, 7, 14, 1), va_line);
if (retval != ERROR_OK) if (retval != ERROR_OK)
goto done; goto done;
va_line += linelen;
} }
dpm->finish(dpm);
return retval; return retval;
done: done: