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Fix build with --disable-target64 

Change-Id: I5acf47845ff197a1aeb31356de7e4cd8ce63d476
This commit is contained in:
Tim Newsome 2018-02-19 15:07:10 -08:00
parent cf895486b6
commit 6b02ab4196
2 changed files with 6 additions and 6 deletions
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4
src/target/mips_m4k.c
View File

@ -702,7 +702,7 @@ static int mips_m4k_set_breakpoint(struct target *target,
} }
if (verify == 0) { if (verify == 0) {
LOG_ERROR("Unable to set 32bit breakpoint at address %08" PRIx64 LOG_ERROR("Unable to set 32bit breakpoint at address %08" TARGET_PRIxADDR
" - check that memory is read/writable", breakpoint->address); " - check that memory is read/writable", breakpoint->address);
return ERROR_OK; return ERROR_OK;
} }
@ -723,7 +723,7 @@ static int mips_m4k_set_breakpoint(struct target *target,
return retval; return retval;
if (verify != MIPS16_SDBBP(isa_req)) { if (verify != MIPS16_SDBBP(isa_req)) {
LOG_ERROR("Unable to set 16bit breakpoint at address %08" PRIx64 LOG_ERROR("Unable to set 16bit breakpoint at address %08" TARGET_PRIxADDR
" - check that memory is read/writable", breakpoint->address); " - check that memory is read/writable", breakpoint->address);
return ERROR_OK; return ERROR_OK;
} }

8
src/target/riscv/riscv-013.c
View File

@ -777,12 +777,12 @@ static int examine_progbuf(struct target *target)
uint32_t written = dmi_read(target, DMI_PROGBUF0); uint32_t written = dmi_read(target, DMI_PROGBUF0);
if (written == (uint32_t) info->progbuf_address) { if (written == (uint32_t) info->progbuf_address) {
LOG_INFO("progbuf is writable at 0x%" TARGET_PRIxADDR, LOG_INFO("progbuf is writable at 0x%" PRIx64,
info->progbuf_address); info->progbuf_address);
info->progbuf_writable = YNM_YES; info->progbuf_writable = YNM_YES;
} else { } else {
LOG_INFO("progbuf is not writeable at 0x%" TARGET_PRIxADDR, LOG_INFO("progbuf is not writeable at 0x%" PRIx64,
info->progbuf_address); info->progbuf_address);
info->progbuf_writable = YNM_NO; info->progbuf_writable = YNM_NO;
} }
@ -1535,8 +1535,8 @@ static int read_memory(struct target *target, target_addr_t address,
* dm_data0 contains mem[s0 - 2*size] * dm_data0 contains mem[s0 - 2*size]
* s1 contains mem[s0-size] */ * s1 contains mem[s0-size] */
LOG_DEBUG("creating burst to read from 0x%" TARGET_PRIxADDR LOG_DEBUG("creating burst to read from 0x%" PRIx64
" up to 0x%" TARGET_PRIxADDR, read_addr, fin_addr); " up to 0x%" PRIx64, read_addr, fin_addr);
assert(read_addr >= address && read_addr < fin_addr); assert(read_addr >= address && read_addr < fin_addr);
struct riscv_batch *batch = riscv_batch_alloc(target, 32, struct riscv_batch *batch = riscv_batch_alloc(target, 32,
info->dmi_busy_delay + info->ac_busy_delay); info->dmi_busy_delay + info->ac_busy_delay);