Add the support for the armv7m arch.
Signed-off-by: Jonathan Dumaresq <jdumaresq@cimeq.qc.ca>
This commit is contained in:
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9f408db29d
commit
6a1750e961
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@ -29,6 +29,7 @@
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#include "cfi.h"
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#include "cfi.h"
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#include "non_cfi.h"
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#include "non_cfi.h"
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#include <target/arm.h>
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#include <target/arm.h>
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#include <target/armv7m.h>
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#include <helper/binarybuffer.h>
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#include <helper/binarybuffer.h>
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#include <target/algorithm.h>
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#include <target/algorithm.h>
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@ -1491,7 +1492,7 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer,
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/* R11 = unlock2_cmd */
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/* R11 = unlock2_cmd */
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/* see contib/loaders/flash/armv4_5_cfi_span_32.s for src */
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/* see contib/loaders/flash/armv4_5_cfi_span_32.s for src */
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static const uint32_t word_32_code[] = {
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static const uint32_t armv4_5_word_32_code[] = {
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/* 00008100 <sp_32_code>: */
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/* 00008100 <sp_32_code>: */
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0xe4905004, /* ldr r5, [r0], #4 */
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0xe4905004, /* ldr r5, [r0], #4 */
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0xe5889000, /* str r9, [r8] */
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0xe5889000, /* str r9, [r8] */
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@ -1526,7 +1527,7 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer,
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};
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};
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/* see contib/loaders/flash/armv4_5_cfi_span_16.s for src */
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/* see contib/loaders/flash/armv4_5_cfi_span_16.s for src */
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static const uint32_t word_16_code[] = {
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static const uint32_t armv4_5_word_16_code[] = {
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/* 00008158 <sp_16_code>: */
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/* 00008158 <sp_16_code>: */
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0xe0d050b2, /* ldrh r5, [r0], #2 */
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0xe0d050b2, /* ldrh r5, [r0], #2 */
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0xe1c890b0, /* strh r9, [r8] */
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0xe1c890b0, /* strh r9, [r8] */
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@ -1560,8 +1561,30 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer,
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0xeafffffe /* b 81ac <sp_16_done> */
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0xeafffffe /* b 81ac <sp_16_done> */
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};
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};
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/* see contib/loaders/flash/armv7m_cfi_span_16.s for src */
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static const uint32_t armv7m_word_16_code[] = {
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0x5B02F830,
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0x9000F8A8,
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0xB000F8AA,
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0x3000F8A8,
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0xBF00800D,
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0xEA85880E,
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0x40270706,
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0xEA16D00A,
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0xD0F70694,
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0xEA85880E,
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0x40270706,
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0xF04FD002,
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0xD1070500,
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0xD0023A01,
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0x0102F101,
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0xF04FE7E0,
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0xE7FF0580,
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0x0000BE00
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};
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/* see contib/loaders/flash/armv4_5_cfi_span_16_dq7.s for src */
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/* see contib/loaders/flash/armv4_5_cfi_span_16_dq7.s for src */
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static const uint32_t word_16_code_dq7only[] = {
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static const uint32_t armv4_5_word_16_code_dq7only[] = {
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/* <sp_16_code>: */
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/* <sp_16_code>: */
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0xe0d050b2, /* ldrh r5, [r0], #2 */
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0xe0d050b2, /* ldrh r5, [r0], #2 */
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0xe1c890b0, /* strh r9, [r8] */
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0xe1c890b0, /* strh r9, [r8] */
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@ -1587,7 +1610,7 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer,
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};
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};
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/* see contib/loaders/flash/armv4_5_cfi_span_8.s for src */
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/* see contib/loaders/flash/armv4_5_cfi_span_8.s for src */
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static const uint32_t word_8_code[] = {
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static const uint32_t armv4_5_word_8_code[] = {
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/* 000081b0 <sp_16_code_end>: */
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/* 000081b0 <sp_16_code_end>: */
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0xe4d05001, /* ldrb r5, [r0], #1 */
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0xe4d05001, /* ldrb r5, [r0], #1 */
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0xe5c89000, /* strb r9, [r8] */
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0xe5c89000, /* strb r9, [r8] */
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@ -1621,9 +1644,18 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer,
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0xeafffffe /* b 8204 <sp_8_done> */
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0xeafffffe /* b 8204 <sp_8_done> */
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};
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};
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armv4_5_info.common_magic = ARM_COMMON_MAGIC;
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if(strcmp("cortex_m3", target_type_name(target)) == 0) /* Cortex-M3 target */
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armv4_5_info.core_mode = ARM_MODE_SVC;
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{
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armv4_5_info.core_state = ARM_STATE_ARM;
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armv4_5_info.common_magic = ARMV7M_COMMON_MAGIC;
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armv4_5_info.core_mode = ARMV7M_MODE_HANDLER;
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armv4_5_info.core_state = ARM_STATE_ARM;
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}
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else /* right now is only armv4_5 target */
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{
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armv4_5_info.common_magic = ARM_COMMON_MAGIC;
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armv4_5_info.core_mode = ARM_MODE_SVC;
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armv4_5_info.core_state = ARM_STATE_ARM;
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}
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int target_code_size;
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int target_code_size;
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const uint32_t *target_code_src;
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const uint32_t *target_code_src;
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@ -1631,26 +1663,43 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer,
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switch (bank->bus_width)
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switch (bank->bus_width)
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{
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{
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case 1 :
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case 1 :
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target_code_src = word_8_code;
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if(armv4_5_info.common_magic == ARM_COMMON_MAGIC) /* armv4_5 target */
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target_code_size = sizeof(word_8_code);
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{
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target_code_src = armv4_5_word_8_code;
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target_code_size = sizeof(armv4_5_word_8_code);
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}
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break;
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break;
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case 2 :
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case 2 :
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/* Check for DQ5 support */
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/* Check for DQ5 support */
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if( cfi_info->status_poll_mask & (1 << 5) )
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if( cfi_info->status_poll_mask & (1 << 5) )
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{
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{
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target_code_src = word_16_code;
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if(armv4_5_info.common_magic == ARM_COMMON_MAGIC) /* armv4_5 target */
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target_code_size = sizeof(word_16_code);
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{
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target_code_src = armv4_5_word_16_code;
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target_code_size = sizeof(armv4_5_word_16_code);
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}
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else if (armv4_5_info.common_magic == ARMV7M_COMMON_MAGIC) /* cortex-m3 target */
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{
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target_code_src = armv7m_word_16_code;
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target_code_size = sizeof(armv7m_word_16_code);
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}
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}
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}
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else
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else
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{
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{
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/* No DQ5 support. Use DQ7 DATA# polling only. */
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/* No DQ5 support. Use DQ7 DATA# polling only. */
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target_code_src = word_16_code_dq7only;
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if(armv4_5_info.common_magic == ARM_COMMON_MAGIC) // armv4_5 target
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target_code_size = sizeof(word_16_code_dq7only);
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{
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target_code_src = armv4_5_word_16_code_dq7only;
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target_code_size = sizeof(armv4_5_word_16_code_dq7only);
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}
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}
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}
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break;
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break;
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case 4 :
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case 4 :
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target_code_src = word_32_code;
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if(armv4_5_info.common_magic == ARM_COMMON_MAGIC) // armv4_5 target
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target_code_size = sizeof(word_32_code);
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{
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target_code_src = armv4_5_word_32_code;
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target_code_size = sizeof(armv4_5_word_32_code);
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}
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break;
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break;
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default:
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default:
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LOG_ERROR("Unsupported bank buswidth %d, can't do block memory writes", bank->bus_width);
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LOG_ERROR("Unsupported bank buswidth %d, can't do block memory writes", bank->bus_width);
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