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target/atsamv: make APCSW cacheable 

Change-Id: Ic00d3192642c682f370a6f7f8b70ae29744eb746
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4678
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
This commit is contained in:
Christopher Head 2018-09-19 16:20:26 -07:00 committed by Tomas Vanek
parent bdef93520a
commit 6823a97beb
1 changed files with 7 additions and 0 deletions
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7
tcl/target/atsamv.cfg
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@ -50,3 +50,10 @@ if {![using_hla]} {
set _FLASHNAME $_CHIPNAME.flash set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME atsamv 0x00400000 0 0 0 $_TARGETNAME flash bank $_FLASHNAME atsamv 0x00400000 0 0 0 $_TARGETNAME
# Set CSW[27], which according to ARM ADI v5 appendix E1.4 maps to AHB signal
# HPROT[3], which according to AMBA AHB/ASB/APB specification chapter 3.7.3
# makes the data access cacheable. This allows reading and writing data in the
# CPU cache from the debugger, which is far more useful than going straight to
# RAM when operating on typical variables, and is generally no worse when
# operating on special memory locations.
$_CHIPNAME.dap apcsw 0x08000000 0x08000000