Merge pull request #911 from riscv/from_upstream

From upstream

.gitignore

@@ -103,3 +103,11 @@ GTAGS
 
 # checkpatch script files
 .checkpatch-camelcase.*
+
+# clangd (e.g. for advanced code completion and linting) generates cache files
+# into .cache
+.cache
+
+# A compile_commands.json can be generated using bear and will help tools such
+# as clangd to locate header files and use correct $CFLAGS
+compile_commands.json

README.Windows

@@ -52,5 +52,5 @@ port depending on which application to use.
 
 For more information, see:
 
-  http://msdn.microsoft.com/en-us/library/windows/hardware/jj649944(v=vs.85).aspx
+  https://learn.microsoft.com/en-us/windows-hardware/drivers/usbcon/usb-device-specific-registry-settings
   http://www.ftdichip.com/Support/Knowledgebase/index.html?ignorehardwareserialnumber.htm

doc/openocd.texi

@@ -2480,7 +2480,7 @@ This command is only available if your libusb1 is at least version 1.0.16.
 Specifies the @var{serial_string} of the adapter to use.
 If this command is not specified, serial strings are not checked.
 Only the following adapter drivers use the serial string from this command:
-arm-jtag-ew, cmsis_dap, ft232r, ftdi, hla (stlink, ti-icdi), jlink, kitprog, opendus,
+arm-jtag-ew, cmsis_dap, esp_usb_jtag, ft232r, ftdi, hla (stlink, ti-icdi), jlink, kitprog, opendus,
 openjtag, osbdm, presto, rlink, st-link, usb_blaster (ublast2), usbprog, vsllink, xds110.
 @end deffn
 

doc/usb_adapters/esp_usb_jtag/303a_1001_esp_usb_jtag.txt

@@ -0,0 +1,134 @@
+# SPDX-License-Identifier: GPL-2.0-or-later OR GFDL-1.2-no-invariants-or-later
+
+# Optional comment
+
+Bus 002 Device 035: ID 303a:1001
+Device Descriptor:
+  bLength                18
+  bDescriptorType         1
+  bcdUSB               2.00
+  bDeviceClass          239 Miscellaneous Device
+  bDeviceSubClass         2
+  bDeviceProtocol         1 Interface Association
+  bMaxPacketSize0        64
+  idVendor           0x303a
+  idProduct          0x1001
+  bcdDevice            1.01
+  iManufacturer           1 Espressif
+  iProduct                2 USB JTAG/serial debug unit
+  iSerial                 3 7C:DF:A1:A2:8F:38
+  bNumConfigurations      1
+  Configuration Descriptor:
+    bLength                 9
+    bDescriptorType         2
+    wTotalLength       0x0062
+    bNumInterfaces          3
+    bConfigurationValue     1
+    iConfiguration          0
+    bmAttributes         0xc0
+      Self Powered
+    MaxPower              500mA
+    Interface Association:
+      bLength                 8
+      bDescriptorType        11
+      bFirstInterface         0
+      bInterfaceCount         2
+      bFunctionClass          2 Communications
+      bFunctionSubClass       2 Abstract (modem)
+      bFunctionProtocol       0
+      iFunction               0
+    Interface Descriptor:
+      bLength                 9
+      bDescriptorType         4
+      bInterfaceNumber        0
+      bAlternateSetting       0
+      bNumEndpoints           1
+      bInterfaceClass         2 Communications
+      bInterfaceSubClass      2 Abstract (modem)
+      bInterfaceProtocol      0
+      iInterface              0
+      CDC Header:
+        bcdCDC               1.10
+      CDC ACM:
+        bmCapabilities       0x02
+          line coding and serial state
+      CDC Union:
+        bMasterInterface        0
+        bSlaveInterface         1
+      CDC Call Management:
+        bmCapabilities       0x03
+          call management
+          use DataInterface
+        bDataInterface          1
+      Endpoint Descriptor:
+        bLength                 7
+        bDescriptorType         5
+        bEndpointAddress     0x82  EP 2 IN
+        bmAttributes            3
+          Transfer Type            Interrupt
+          Synch Type               None
+          Usage Type               Data
+        wMaxPacketSize     0x0040  1x 64 bytes
+        bInterval               1
+    Interface Descriptor:
+      bLength                 9
+      bDescriptorType         4
+      bInterfaceNumber        1
+      bAlternateSetting       0
+      bNumEndpoints           2
+      bInterfaceClass        10 CDC Data
+      bInterfaceSubClass      2
+      bInterfaceProtocol      0
+      iInterface              0
+      Endpoint Descriptor:
+        bLength                 7
+        bDescriptorType         5
+        bEndpointAddress     0x01  EP 1 OUT
+        bmAttributes            2
+          Transfer Type            Bulk
+          Synch Type               None
+          Usage Type               Data
+        wMaxPacketSize     0x0040  1x 64 bytes
+        bInterval               1
+      Endpoint Descriptor:
+        bLength                 7
+        bDescriptorType         5
+        bEndpointAddress     0x81  EP 1 IN
+        bmAttributes            2
+          Transfer Type            Bulk
+          Synch Type               None
+          Usage Type               Data
+        wMaxPacketSize     0x0040  1x 64 bytes
+        bInterval               1
+    Interface Descriptor:
+      bLength                 9
+      bDescriptorType         4
+      bInterfaceNumber        2
+      bAlternateSetting       0
+      bNumEndpoints           2
+      bInterfaceClass       255 Vendor Specific Class
+      bInterfaceSubClass    255 Vendor Specific Subclass
+      bInterfaceProtocol      1
+      iInterface              0
+      Endpoint Descriptor:
+        bLength                 7
+        bDescriptorType         5
+        bEndpointAddress     0x02  EP 2 OUT
+        bmAttributes            2
+          Transfer Type            Bulk
+          Synch Type               None
+          Usage Type               Data
+        wMaxPacketSize     0x0040  1x 64 bytes
+        bInterval               1
+      Endpoint Descriptor:
+        bLength                 7
+        bDescriptorType         5
+        bEndpointAddress     0x83  EP 3 IN
+        bmAttributes            2
+          Transfer Type            Bulk
+          Synch Type               None
+          Usage Type               Data
+        wMaxPacketSize     0x0040  1x 64 bytes
+        bInterval               1
+Device Status:     0x0001
+  Self Powered

doc/usb_adapters/readme.txt

@@ -15,6 +15,7 @@ OpenOCD gerrit, as explained in HACKING.
 
 The dumps are organized in subfolders corresponding to OpenOCD drivers:
 - cmsis_dap;
+- esp_usb_jtag;
 - ft232r;
 - ftdi;
 - icdi;

src/flash/nor/psoc4.c

@@ -651,9 +651,6 @@ static int psoc4_write(struct flash_bank *bank, const uint8_t *buffer,
 	if (row_offset)
 		memset(row_buffer, bank->default_padded_value, row_offset);
 
-	/* Mask automatic polling triggered by execution of halted events */
-	bool save_poll_mask = jtag_poll_mask();
-
 	while (count) {
 		uint32_t chunk_size = psoc4_info->row_size - row_offset;
 		if (chunk_size > count) {
@@ -693,8 +690,6 @@ static int psoc4_write(struct flash_bank *bank, const uint8_t *buffer,
 	}
 
 cleanup:
-	jtag_poll_unmask(save_poll_mask);
-
 	free(sysrq_buffer);
 	return retval;
 }

src/flash/nor/stm32l4x.c

@@ -327,6 +327,7 @@ static const struct stm32l4_rev stm32g49_g4axx_revs[] = {
 
 static const struct stm32l4_rev stm32u57_u58xx_revs[] = {
 	{ 0x1000, "A" }, { 0x1001, "Z" }, { 0x1003, "Y" }, { 0x2000, "B" },
+	{ 0x2001, "X" }, { 0x3000, "C" },
 };
 
 static const struct stm32l4_rev stm32wb1xx_revs[] = {

src/helper/Makefile.am

@@ -9,6 +9,7 @@ noinst_LTLIBRARIES += %D%/libhelper.la
 	%D%/configuration.c \
 	%D%/log.c \
 	%D%/command.c \
+	%D%/crc32.c \
 	%D%/time_support.c \
 	%D%/replacements.c \
 	%D%/fileio.c \
@@ -24,6 +25,7 @@ noinst_LTLIBRARIES += %D%/libhelper.la
 	%D%/types.h \
 	%D%/log.h \
 	%D%/command.h \
+	%D%/crc32.h \
 	%D%/time_support.h \
 	%D%/replacements.h \
 	%D%/fileio.h \

src/helper/crc32.c

@@ -0,0 +1,50 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/***************************************************************************
+ *   Copyright (C) 2013-2014 by Franck Jullien                             *
+ *   elec4fun@gmail.com                                                    *
+ *                                                                         *
+ *   Copyright (C) 2022 Otto-von-Guericke-Universität Magdeburg            *
+ *   marian.buschsieweke@ovgu.de                                           *
+ ***************************************************************************/
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include "crc32.h"
+#include <stdint.h>
+#include <stddef.h>
+
+static uint32_t crc_le_step(uint32_t poly, uint32_t crc, uint32_t data_in,
+		unsigned int data_bits)
+{
+	for (unsigned int i = 0; i < data_bits; i++) {
+		uint32_t d, c;
+		d = ((data_in >> i) & 0x1) ? 0xffffffff : 0;
+		c = (crc & 0x1) ? 0xffffffff : 0;
+		crc = crc >> 1;
+		crc = crc ^ ((d ^ c) & poly);
+	}
+
+	return crc;
+}
+
+uint32_t crc32_le(uint32_t poly, uint32_t seed, const void *_data,
+		size_t data_len)
+{
+	if (((uintptr_t)_data & 0x3) || (data_len & 0x3)) {
+		/* data is unaligned, processing data one byte at a time */
+		const uint8_t *data = _data;
+		for (size_t i = 0; i < data_len; i++)
+			seed = crc_le_step(poly, seed, data[i], 8);
+	} else {
+		/* data is aligned, processing 32 bit at a time */
+		data_len >>= 2;
+		const uint32_t *data = _data;
+		for (size_t i = 0; i < data_len; i++)
+			seed = crc_le_step(poly, seed, data[i], 32);
+	}
+
+	return seed;
+}

src/helper/crc32.h

@@ -0,0 +1,37 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+/***************************************************************************
+ *   Copyright (C) 2022 Otto-von-Guericke-Universität Magdeburg            *
+ *   marian.buschsieweke@ovgu.de                                           *
+ ***************************************************************************/
+
+#ifndef OPENOCD_HELPER_CRC32_H
+#define OPENOCD_HELPER_CRC32_H
+
+#include <stdint.h>
+#include <stddef.h>
+
+/** @file
+ * A generic CRC32 implementation
+ */
+
+/**
+ * CRC32 polynomial commonly used for little endian CRC32
+ */
+#define CRC32_POLY_LE	0xedb88320
+
+/**
+ * Calculate the CRC32 value of the given data
+ * @param	poly		The polynomial of the CRC
+ * @param	seed		The seed to use (mostly either `0` or `0xffffffff`)
+ * @param	data		The data to calculate the CRC32 of
+ * @param	data_len	The length of the data in @p data in bytes
+ * @return	The CRC value of the first @p data_len bytes at @p data
+ * @note	This function can be used to incrementally compute the CRC one
+ *			chunk of data at a time by using the CRC32 of the previous chunk
+ *			as @p seed for the next chunk.
+ */
+uint32_t crc32_le(uint32_t poly, uint32_t seed, const void *data,
+		size_t data_len);
+
+#endif /* OPENOCD_HELPER_CRC32_H */

src/jtag/hla/Makefile.am

@@ -4,10 +4,8 @@ noinst_LTLIBRARIES += %D%/libocdhla.la
 
 %C%_libocdhla_la_SOURCES = \
 	%D%/hla_transport.c \
-	%D%/hla_tcl.c \
 	%D%/hla_interface.c \
 	%D%/hla_layout.c \
 	%D%/hla_transport.h \
 	%D%/hla_interface.h \
-	%D%/hla_layout.h \
+	%D%/hla_layout.h
-	%D%/hla_tcl.h

src/jtag/hla/hla_interface.c

@@ -17,7 +17,6 @@
 #include <transport/transport.h>
 #include <helper/time_support.h>
 
-#include <jtag/hla/hla_tcl.h>
 #include <jtag/hla/hla_layout.h>
 #include <jtag/hla/hla_transport.h>
 #include <jtag/hla/hla_interface.h>

src/jtag/hla/hla_layout.c

@@ -18,7 +18,6 @@
 #include <helper/time_support.h>
 
 #include <jtag/hla/hla_layout.h>
-#include <jtag/hla/hla_tcl.h>
 #include <jtag/hla/hla_transport.h>
 #include <jtag/hla/hla_interface.h>
 

src/jtag/hla/hla_tcl.c

@@ -1,143 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-
-/***************************************************************************
- *   Copyright (C) 2011 by Mathias Kuester                                 *
- *   Mathias Kuester <kesmtp@freenet.de>                                   *
- *                                                                         *
- *   Copyright (C) 2012 by Spencer Oliver                                  *
- *   spen@spen-soft.co.uk                                                  *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-/* project specific includes */
-#include <jtag/interface.h>
-#include <transport/transport.h>
-#include <helper/time_support.h>
-
-static int jim_newtap_expected_id(struct jim_nvp *n, struct jim_getopt_info *goi,
-				  struct jtag_tap *tap)
-{
-	jim_wide w;
-	int e = jim_getopt_wide(goi, &w);
-	if (e != JIM_OK) {
-		Jim_SetResultFormatted(goi->interp, "option: %s bad parameter",
-				       n->name);
-		return e;
-	}
-
-	uint32_t *p = realloc(tap->expected_ids,
-			      (tap->expected_ids_cnt + 1) * sizeof(uint32_t));
-	if (!p) {
-		Jim_SetResultFormatted(goi->interp, "no memory");
-		return JIM_ERR;
-	}
-
-	tap->expected_ids = p;
-	tap->expected_ids[tap->expected_ids_cnt++] = w;
-
-	return JIM_OK;
-}
-
-#define NTAP_OPT_IRLEN     0
-#define NTAP_OPT_IRMASK    1
-#define NTAP_OPT_IRCAPTURE 2
-#define NTAP_OPT_ENABLED   3
-#define NTAP_OPT_DISABLED  4
-#define NTAP_OPT_EXPECTED_ID 5
-#define NTAP_OPT_VERSION   6
-#define NTAP_OPT_BYPASS    7
-
-static int jim_hl_newtap_cmd(struct jim_getopt_info *goi)
-{
-	struct jtag_tap *tap;
-	int x;
-	int e;
-	struct jim_nvp *n;
-	char *cp;
-	const struct jim_nvp opts[] = {
-		{ .name = "-irlen",       .value = NTAP_OPT_IRLEN },
-		{ .name = "-irmask",       .value = NTAP_OPT_IRMASK },
-		{ .name = "-ircapture",       .value = NTAP_OPT_IRCAPTURE },
-		{ .name = "-enable",       .value = NTAP_OPT_ENABLED },
-		{ .name = "-disable",       .value = NTAP_OPT_DISABLED },
-		{ .name = "-expected-id",       .value = NTAP_OPT_EXPECTED_ID },
-		{ .name = "-ignore-version",       .value = NTAP_OPT_VERSION },
-		{ .name = "-ignore-bypass",       .value = NTAP_OPT_BYPASS },
-		{ .name = NULL, .value = -1},
-	};
-
-	tap = calloc(1, sizeof(struct jtag_tap));
-	if (!tap) {
-		Jim_SetResultFormatted(goi->interp, "no memory");
-		return JIM_ERR;
-	}
-
-	/*
-	 * we expect CHIP + TAP + OPTIONS
-	 * */
-	if (goi->argc < 3) {
-		Jim_SetResultFormatted(goi->interp,
-				       "Missing CHIP TAP OPTIONS ....");
-		free(tap);
-		return JIM_ERR;
-	}
-
-	const char *tmp;
-	jim_getopt_string(goi, &tmp, NULL);
-	tap->chip = strdup(tmp);
-
-	jim_getopt_string(goi, &tmp, NULL);
-	tap->tapname = strdup(tmp);
-
-	/* name + dot + name + null */
-	x = strlen(tap->chip) + 1 + strlen(tap->tapname) + 1;
-	cp = malloc(x);
-	sprintf(cp, "%s.%s", tap->chip, tap->tapname);
-	tap->dotted_name = cp;
-
-	LOG_DEBUG("Creating New Tap, Chip: %s, Tap: %s, Dotted: %s, %d params",
-		  tap->chip, tap->tapname, tap->dotted_name, goi->argc);
-
-	while (goi->argc) {
-		e = jim_getopt_nvp(goi, opts, &n);
-		if (e != JIM_OK) {
-			jim_getopt_nvp_unknown(goi, opts, 0);
-			free(cp);
-			free(tap);
-			return e;
-		}
-		LOG_DEBUG("Processing option: %s", n->name);
-		switch (n->value) {
-		case NTAP_OPT_EXPECTED_ID:
-			e = jim_newtap_expected_id(n, goi, tap);
-			if (e != JIM_OK) {
-				free(cp);
-				free(tap);
-				return e;
-			}
-			break;
-		case NTAP_OPT_IRLEN:
-		case NTAP_OPT_IRMASK:
-		case NTAP_OPT_IRCAPTURE:
-			/* dummy read to ignore the next argument */
-			jim_getopt_wide(goi, NULL);
-			break;
-		}		/* switch (n->value) */
-	}			/* while (goi->argc) */
-
-	/* default is enabled-after-reset */
-	tap->enabled = !tap->disabled_after_reset;
-
-	jtag_tap_init(tap);
-	return JIM_OK;
-}
-
-int jim_hl_newtap(Jim_Interp *interp, int argc, Jim_Obj * const *argv)
-{
-	struct jim_getopt_info goi;
-	jim_getopt_setup(&goi, interp, argc - 1, argv + 1);
-	return jim_hl_newtap_cmd(&goi);
-}

src/jtag/hla/hla_tcl.h

@@ -1,17 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-
-/***************************************************************************
- *   Copyright (C) 2011 by Mathias Kuester                                 *
- *   Mathias Kuester <kesmtp@freenet.de>                                   *
- *                                                                         *
- *   Copyright (C) 2012 by Spencer Oliver                                  *
- *   spen@spen-soft.co.uk                                                  *
- ***************************************************************************/
-
-#ifndef OPENOCD_JTAG_HLA_HLA_TCL_H
-#define OPENOCD_JTAG_HLA_HLA_TCL_H
-
-/** */
-int jim_hl_newtap(Jim_Interp *interp, int argc, Jim_Obj * const *argv);
-
-#endif /* OPENOCD_JTAG_HLA_HLA_TCL_H */

src/jtag/hla/hla_transport.c

@@ -18,7 +18,6 @@
 #include <transport/transport.h>
 #include <helper/time_support.h>
 #include <target/target.h>
-#include <jtag/hla/hla_tcl.h>
 #include <jtag/hla/hla_transport.h>
 #include <jtag/hla/hla_interface.h>
 
@@ -38,7 +37,7 @@ static const struct command_registration hl_swd_transport_subcommand_handlers[]
 	{
 	 .name = "newdap",
 	 .mode = COMMAND_CONFIG,
-	 .jim_handler = jim_hl_newtap,
+	 .jim_handler = jim_jtag_newtap,
 	 .help = "declare a new SWD DAP",
 	 },
 	COMMAND_REGISTRATION_DONE
@@ -59,7 +58,7 @@ static const struct command_registration hl_transport_jtag_subcommand_handlers[]
 	{
 	 .name = "newtap",
 	 .mode = COMMAND_CONFIG,
-	 .jim_handler = jim_hl_newtap,
+	 .jim_handler = jim_jtag_newtap,
 	 .help = "Create a new TAP instance named basename.tap_type, "
 	 "and appends it to the scan chain.",
 	 .usage = "basename tap_type '-irlen' count "

src/jtag/tcl.c

@@ -557,13 +557,6 @@ static int jim_newtap_cmd(struct jim_getopt_info *goi)
 	LOG_DEBUG("Creating New Tap, Chip: %s, Tap: %s, Dotted: %s, %d params",
 		tap->chip, tap->tapname, tap->dotted_name, goi->argc);
 
-	if (!transport_is_jtag()) {
-		/* SWD doesn't require any JTAG tap parameters */
-		tap->enabled = true;
-		jtag_tap_init(tap);
-		return JIM_OK;
-	}
-
 	/* IEEE specifies that the two LSBs of an IR scan are 01, so make
 	 * that the default.  The "-ircapture" and "-irmask" options are only
 	 * needed to cope with nonstandard TAPs, or to specify more bits.
@@ -618,7 +611,7 @@ static int jim_newtap_cmd(struct jim_getopt_info *goi)
 	tap->enabled = !tap->disabled_after_reset;
 
 	/* Did all the required option bits get cleared? */
-	if (tap->ir_length != 0) {
+	if (!transport_is_jtag() || tap->ir_length != 0) {
 		jtag_tap_init(tap);
 		return JIM_OK;
 	}

src/rtos/Makefile.am

@@ -10,6 +10,7 @@ noinst_LTLIBRARIES += %D%/librtos.la
 	%D%/rtos_mqx_stackings.c \
 	%D%/rtos_ucos_iii_stackings.c \
 	%D%/rtos_riot_stackings.c \
+	%D%/rtos_nuttx_stackings.c \
 	%D%/FreeRTOS.c \
 	%D%/ThreadX.c \
 	%D%/eCos.c \
@@ -32,4 +33,5 @@ noinst_LTLIBRARIES += %D%/librtos.la
 	%D%/rtos_mqx_stackings.h \
 	%D%/rtos_riot_stackings.h \
 	%D%/rtos_ucos_iii_stackings.h \
+	%D%/rtos_nuttx_stackings.h \
 	%D%/nuttx_header.h

src/rtos/nuttx.c

@@ -21,7 +21,7 @@
 #include "server/gdb_server.h"
 
 #include "nuttx_header.h"
-
+#include "rtos_nuttx_stackings.h"
 
 int rtos_thread_packet(struct connection *connection, const char *packet, int packet_size);
 
@@ -85,62 +85,6 @@ static char *task_state_str[] = {
 #endif /* CONFIG_PAGING */
 };
 
-/* see arch/arm/include/armv7-m/irq_cmnvector.h */
-static const struct stack_register_offset nuttx_stack_offsets_cortex_m[] = {
-	{ ARMV7M_R0,	0x28, 32 },		/* r0   */
-	{ ARMV7M_R1,	0x2c, 32 },		/* r1   */
-	{ ARMV7M_R2,	0x30, 32 },		/* r2   */
-	{ ARMV7M_R3,	0x34, 32 },		/* r3   */
-	{ ARMV7M_R4,	0x08, 32 },		/* r4   */
-	{ ARMV7M_R5,	0x0c, 32 },		/* r5   */
-	{ ARMV7M_R6,	0x10, 32 },		/* r6   */
-	{ ARMV7M_R7,	0x14, 32 },		/* r7   */
-	{ ARMV7M_R8,	0x18, 32 },		/* r8   */
-	{ ARMV7M_R9,	0x1c, 32 },		/* r9   */
-	{ ARMV7M_R10,	0x20, 32 },		/* r10  */
-	{ ARMV7M_R11,	0x24, 32 },		/* r11  */
-	{ ARMV7M_R12,	0x38, 32 },		/* r12  */
-	{ ARMV7M_R13,	  0,  32 },		/* sp   */
-	{ ARMV7M_R14,	0x3c, 32 },		/* lr   */
-	{ ARMV7M_PC,	0x40, 32 },		/* pc   */
-	{ ARMV7M_XPSR,	0x44, 32 },		/* xPSR */
-};
-
-
-static const struct rtos_register_stacking nuttx_stacking_cortex_m = {
-	.stack_registers_size = 0x48,
-	.stack_growth_direction = -1,
-	.num_output_registers = 17,
-	.register_offsets = nuttx_stack_offsets_cortex_m
-};
-
-static const struct stack_register_offset nuttx_stack_offsets_cortex_m_fpu[] = {
-	{ ARMV7M_R0,	0x6c, 32 },		/* r0   */
-	{ ARMV7M_R1,	0x70, 32 },		/* r1   */
-	{ ARMV7M_R2,	0x74, 32 },		/* r2   */
-	{ ARMV7M_R3,	0x78, 32 },		/* r3   */
-	{ ARMV7M_R4,	0x08, 32 },		/* r4   */
-	{ ARMV7M_R5,	0x0c, 32 },		/* r5   */
-	{ ARMV7M_R6,	0x10, 32 },		/* r6   */
-	{ ARMV7M_R7,	0x14, 32 },		/* r7   */
-	{ ARMV7M_R8,	0x18, 32 },		/* r8   */
-	{ ARMV7M_R9,	0x1c, 32 },		/* r9   */
-	{ ARMV7M_R10,	0x20, 32 },		/* r10  */
-	{ ARMV7M_R11,	0x24, 32 },		/* r11  */
-	{ ARMV7M_R12,	0x7c, 32 },		/* r12  */
-	{ ARMV7M_R13,	  0,  32 },		/* sp   */
-	{ ARMV7M_R14,	0x80, 32 },		/* lr   */
-	{ ARMV7M_PC,	0x84, 32 },		/* pc   */
-	{ ARMV7M_XPSR,	0x88, 32 },		/* xPSR */
-};
-
-static const struct rtos_register_stacking nuttx_stacking_cortex_m_fpu = {
-	.stack_registers_size = 0x8c,
-	.stack_growth_direction = -1,
-	.num_output_registers = 17,
-	.register_offsets = nuttx_stack_offsets_cortex_m_fpu
-};
-
 static int pid_offset = PID;
 static int state_offset = STATE;
 static int name_offset =  NAME;

src/rtos/rtos_nuttx_stackings.c

@@ -0,0 +1,110 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include "rtos.h"
+#include "target/armv7m.h"
+#include "rtos_nuttx_stackings.h"
+#include "rtos_standard_stackings.h"
+#include <target/riscv/riscv.h>
+
+/* see arch/arm/include/armv7-m/irq_cmnvector.h */
+static const struct stack_register_offset nuttx_stack_offsets_cortex_m[] = {
+	{ ARMV7M_R0, 0x28, 32 },		/* r0   */
+	{ ARMV7M_R1, 0x2c, 32 },		/* r1   */
+	{ ARMV7M_R2, 0x30, 32 },		/* r2   */
+	{ ARMV7M_R3, 0x34, 32 },		/* r3   */
+	{ ARMV7M_R4, 0x08, 32 },		/* r4   */
+	{ ARMV7M_R5, 0x0c, 32 },		/* r5   */
+	{ ARMV7M_R6, 0x10, 32 },		/* r6   */
+	{ ARMV7M_R7, 0x14, 32 },		/* r7   */
+	{ ARMV7M_R8, 0x18, 32 },		/* r8   */
+	{ ARMV7M_R9, 0x1c, 32 },		/* r9   */
+	{ ARMV7M_R10, 0x20, 32 },		/* r10  */
+	{ ARMV7M_R11, 0x24, 32 },		/* r11  */
+	{ ARMV7M_R12, 0x38, 32 },		/* r12  */
+	{ ARMV7M_R13, 0, 32 },			/* sp   */
+	{ ARMV7M_R14, 0x3c, 32 },		/* lr   */
+	{ ARMV7M_PC, 0x40, 32 },		/* pc   */
+	{ ARMV7M_XPSR, 0x44, 32 },		/* xPSR */
+};
+
+const struct rtos_register_stacking nuttx_stacking_cortex_m = {
+	.stack_registers_size = 0x48,
+	.stack_growth_direction = -1,
+	.num_output_registers = 17,
+	.register_offsets = nuttx_stack_offsets_cortex_m,
+};
+
+static const struct stack_register_offset nuttx_stack_offsets_cortex_m_fpu[] = {
+	{ ARMV7M_R0, 0x6c, 32 },		/* r0   */
+	{ ARMV7M_R1, 0x70, 32 },		/* r1   */
+	{ ARMV7M_R2, 0x74, 32 },		/* r2   */
+	{ ARMV7M_R3, 0x78, 32 },		/* r3   */
+	{ ARMV7M_R4, 0x08, 32 },		/* r4   */
+	{ ARMV7M_R5, 0x0c, 32 },		/* r5   */
+	{ ARMV7M_R6, 0x10, 32 },		/* r6   */
+	{ ARMV7M_R7, 0x14, 32 },		/* r7   */
+	{ ARMV7M_R8, 0x18, 32 },		/* r8   */
+	{ ARMV7M_R9, 0x1c, 32 },		/* r9   */
+	{ ARMV7M_R10, 0x20, 32 },		/* r10  */
+	{ ARMV7M_R11, 0x24, 32 },		/* r11  */
+	{ ARMV7M_R12, 0x7c, 32 },		/* r12  */
+	{ ARMV7M_R13, 0, 32 },			/* sp   */
+	{ ARMV7M_R14, 0x80, 32 },		/* lr   */
+	{ ARMV7M_PC, 0x84, 32 },		/* pc   */
+	{ ARMV7M_XPSR, 0x88, 32 },		/* xPSR */
+};
+
+const struct rtos_register_stacking nuttx_stacking_cortex_m_fpu = {
+	.stack_registers_size = 0x8c,
+	.stack_growth_direction = -1,
+	.num_output_registers = 17,
+	.register_offsets = nuttx_stack_offsets_cortex_m_fpu,
+};
+
+static const struct stack_register_offset nuttx_stack_offsets_riscv[] = {
+	{ GDB_REGNO_ZERO, -1, 32 },
+	{ GDB_REGNO_RA, 0x04, 32 },
+	{ GDB_REGNO_SP, 0x08, 32 },
+	{ GDB_REGNO_GP, 0x0c, 32 },
+	{ GDB_REGNO_TP, 0x10, 32 },
+	{ GDB_REGNO_T0, 0x14, 32 },
+	{ GDB_REGNO_T1, 0x18, 32 },
+	{ GDB_REGNO_T2, 0x1c, 32 },
+	{ GDB_REGNO_FP, 0x20, 32 },
+	{ GDB_REGNO_S1, 0x24, 32 },
+	{ GDB_REGNO_A0, 0x28, 32 },
+	{ GDB_REGNO_A1, 0x2c, 32 },
+	{ GDB_REGNO_A2, 0x30, 32 },
+	{ GDB_REGNO_A3, 0x34, 32 },
+	{ GDB_REGNO_A4, 0x38, 32 },
+	{ GDB_REGNO_A5, 0x3c, 32 },
+	{ GDB_REGNO_A6, 0x40, 32 },
+	{ GDB_REGNO_A7, 0x44, 32 },
+	{ GDB_REGNO_S2, 0x48, 32 },
+	{ GDB_REGNO_S3, 0x4c, 32 },
+	{ GDB_REGNO_S4, 0x50, 32 },
+	{ GDB_REGNO_S5, 0x54, 32 },
+	{ GDB_REGNO_S6, 0x58, 32 },
+	{ GDB_REGNO_S7, 0x5c, 32 },
+	{ GDB_REGNO_S8, 0x60, 32 },
+	{ GDB_REGNO_S9, 0x64, 32 },
+	{ GDB_REGNO_S10, 0x68, 32 },
+	{ GDB_REGNO_S11, 0x6c, 32 },
+	{ GDB_REGNO_T3, 0x70, 32 },
+	{ GDB_REGNO_T4, 0x74, 32 },
+	{ GDB_REGNO_T5, 0x78, 32 },
+	{ GDB_REGNO_T6, 0x7c, 32 },
+	{ GDB_REGNO_PC, 0x00, 32 },
+};
+
+const struct rtos_register_stacking nuttx_riscv_stacking = {
+	.stack_registers_size = 33 * 4,
+	.stack_growth_direction = -1,
+	.num_output_registers = 33,
+	.calculate_process_stack = rtos_generic_stack_align8,
+	.register_offsets = nuttx_stack_offsets_riscv,
+};

src/rtos/rtos_nuttx_stackings.h

@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#ifndef INCLUDED_RTOS_NUTTX_STACKINGS_H
+#define INCLUDED_RTOS_NUTTX_STACKINGS_H
+
+#include "rtos.h"
+
+extern const struct rtos_register_stacking nuttx_stacking_cortex_m;
+extern const struct rtos_register_stacking nuttx_stacking_cortex_m_fpu;
+extern const struct rtos_register_stacking nuttx_riscv_stacking;
+
+#endif	/* INCLUDED_RTOS_NUTTX_STACKINGS_H */

src/target/openrisc/or1k_du_adv.c

@@ -22,8 +22,9 @@
 #include "or1k_du.h"
 #include "jsp_server.h"
 
-#include <target/target.h>
+#include <helper/crc32.h>
 #include <jtag/jtag.h>
+#include <target/target.h>
 
 #define JSP_BANNER "\n\r" \
 		   "******************************\n\r" \
@@ -67,13 +68,6 @@
 #define DBG_CPU_CR_STALL		0x01
 #define DBG_CPU_CR_RESET		0x02
 
-/* Polynomial for the CRC calculation
- * Yes, it's backwards.  Yes, this is on purpose.
- * The hardware is designed this way to save on logic and routing,
- * and it's really all the same to us here.
- */
-#define ADBG_CRC_POLY			0xedb88320
-
 /* These are for the internal registers in the Wishbone module
  * The first is the length of the index register,
  * the indexes of the various registers are defined after that.
@@ -133,20 +127,6 @@ static struct or1k_du or1k_du_adv;
 
 static const char * const chain_name[] = {"WISHBONE", "CPU0", "CPU1", "JSP"};
 
-static uint32_t adbg_compute_crc(uint32_t crc, uint32_t data_in,
-				 int length_bits)
-{
-	for (int i = 0; i < length_bits; i++) {
-		uint32_t d, c;
-		d = ((data_in >> i) & 0x1) ? 0xffffffff : 0;
-		c = (crc & 0x1) ? 0xffffffff : 0;
-		crc = crc >> 1;
-		crc = crc ^ ((d ^ c) & ADBG_CRC_POLY);
-	}
-
-	return crc;
-}
-
 static int find_status_bit(void *_buf, int len)
 {
 	int i = 0;
@@ -522,9 +502,8 @@ retry_read_full:
 	memcpy(data, in_buffer, total_size_bytes);
 	memcpy(&crc_read, &in_buffer[total_size_bytes], 4);
 
-	uint32_t crc_calc = 0xffffffff;
+	uint32_t crc_calc = crc32_le(CRC32_POLY_LE, 0xffffffff, data,
-	for (int i = 0; i < total_size_bytes; i++)
+			total_size_bytes);
-		crc_calc = adbg_compute_crc(crc_calc, data[i], 8);
 
 	if (crc_calc != crc_read) {
 		LOG_WARNING("CRC ERROR! Computed 0x%08" PRIx32 ", read CRC 0x%08" PRIx32, crc_calc, crc_read);
@@ -650,9 +629,8 @@ retry_full_write:
 	field[0].out_value = &value;
 	field[0].in_value = NULL;
 
-	uint32_t crc_calc = 0xffffffff;
+	uint32_t crc_calc = crc32_le(CRC32_POLY_LE, 0xffffffff, data,
-	for (int i = 0; i < (count * size); i++)
+			count * size);
-		crc_calc = adbg_compute_crc(crc_calc, data[i], 8);
 
 	field[1].num_bits = count * size * 8;
 	field[1].out_value = data;

tcl/target/stm32f3x.cfg

@@ -24,6 +24,14 @@ if { [info exists WORKAREASIZE] } {
    set _WORKAREASIZE 0x4000
 }
 
+# Allow overriding the Flash bank size
+if { [info exists FLASH_SIZE] } {
+   set _FLASH_SIZE $FLASH_SIZE
+} else {
+   # autodetect size
+   set _FLASH_SIZE 0
+}
+
 # JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
 #
 # Since we may be running of an RC oscilator, we crank down the speed a
@@ -63,7 +71,7 @@ target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
 
 set _FLASHNAME $_CHIPNAME.flash
-flash bank $_FLASHNAME stm32f1x 0 0 0 0 $_TARGETNAME
+flash bank $_FLASHNAME stm32f1x 0 $_FLASH_SIZE 0 0 $_TARGETNAME
 
 reset_config srst_nogate