cortex-m3: support connecting under reset
Some targets support connecting while the target's srst is asserted. Tested on stm32 family. Change-Id: I9df43623025e37832155aeee7aa099b844b85f16 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/606 Tested-by: jenkins
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@ -952,6 +952,16 @@ static int cortex_m3_assert_reset(struct target *target)
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return ERROR_OK;
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return ERROR_OK;
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}
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}
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/* some cores support connecting while srst is asserted
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* use that mode is it has been configured */
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bool srst_asserted = false;
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if (jtag_reset_config & RESET_SRST_NO_GATING) {
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adapter_assert_reset();
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srst_asserted = true;
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}
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/* Enable debug requests */
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/* Enable debug requests */
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int retval;
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int retval;
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retval = mem_ap_read_atomic_u32(swjdp, DCB_DHCSR, &cortex_m3->dcb_dhcsr);
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retval = mem_ap_read_atomic_u32(swjdp, DCB_DHCSR, &cortex_m3->dcb_dhcsr);
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@ -996,7 +1006,8 @@ static int cortex_m3_assert_reset(struct target *target)
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if (jtag_reset_config & RESET_HAS_SRST) {
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if (jtag_reset_config & RESET_HAS_SRST) {
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/* default to asserting srst */
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/* default to asserting srst */
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adapter_assert_reset();
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if (!srst_asserted)
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adapter_assert_reset();
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} else {
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} else {
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/* Use a standard Cortex-M3 software reset mechanism.
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/* Use a standard Cortex-M3 software reset mechanism.
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* We default to using VECRESET as it is supported on all current cores.
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* We default to using VECRESET as it is supported on all current cores.
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