tcl/target/ti_k3: Add AM62A7 SoC
Add support for the TI K3 family AM62A7 SoC. For further details, see https://www.ti.com/lit/pdf/spruj16a Change-Id: Ie69bde4895f34b04f9967f63d1ca9c8149c50b8a Signed-off-by: Jason Kacines <j-kacines@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7854 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
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@ -14,6 +14,8 @@
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# Has 2 ARMV8 Cores and 4 R5 Cores, M4F and an M3
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# * AM625: https://www.ti.com/lit/pdf/spruiv7a
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# Has 4 ARMV8 Cores and 1 R5 Core and an M4F
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# * AM62a7: https://www.ti.com/lit/pdf/spruj16a
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# Has 4 ARMV8 Cores and 2 R5 Cores
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#
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source [find target/swj-dp.tcl]
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@ -119,6 +121,27 @@ switch $_soc {
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set _gp_mcu_cores 1
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set _gp_mcu_ap_unlock_offsets {0xf0 0x7c}
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}
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am62a7 {
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set _CHIPNAME am62a7
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set _K3_DAP_TAPID 0x0bb8d02f
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# AM62a7 has 1 clusters of 4 A53 cores.
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set _armv8_cpu_name a53
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set _armv8_cores 4
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set ARMV8_DBGBASE {0x90010000 0x90110000 0x90210000 0x90310000}
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set ARMV8_CTIBASE {0x90020000 0x90120000 0x90220000 0x90320000}
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# AM62a7 has 2 cluster of 1 R5s core.
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set _r5_cores 2
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set R5_NAMES {main0_r5.0 mcu0_r5.0}
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set R5_DBGBASE {0x9d410000 0x9d810000}
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set R5_CTIBASE {0x9d418000 0x9d818000}
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# sysctrl CTI base
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set CM3_CTIBASE {0x20001000}
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# Sysctrl power-ap unlock offsets
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set _sysctrl_ap_unlock_offsets {0xf0 0x78}
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}
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j721e {
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set _CHIPNAME j721e
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set _K3_DAP_TAPID 0x0bb6402f
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