targets: Print nested ROM tables with the 'dap info' command.
Move the ROM table printing into a separate function to allow recursive calls with nested tables. ROM tables can nest. The printing is limited to 16 levels. Update the types of tables printed. When an entry can't be read, print a warning and continue. Change-Id: Ib134edd9e987af2f5f606071521885b17af4d70f Signed-off-by: Chris Johns <chrisj@rtems.org> Reviewed-on: http://openocd.zylin.com/1427 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
This commit is contained in:
Chris Johns
Andreas Fritiofson
parent
e3bb6d390c
commit
623eb336cf
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@ -1025,59 +1025,29 @@ int dap_lookup_cs_component(struct adiv5_dap *dap, int ap,
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return retval;
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}
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static int dap_info_command(struct command_context *cmd_ctx,
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struct adiv5_dap *dap, int ap)
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static int dap_rom_display(struct command_context *cmd_ctx,
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struct adiv5_dap *dap, int ap, uint32_t dbgbase, int depth)
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{
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int retval;
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uint32_t dbgbase = 0, apid = 0; /* Silence gcc by initializing */
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int romtable_present = 0;
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uint8_t mem_ap;
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uint32_t ap_old;
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retval = dap_get_debugbase(dap, ap, &dbgbase, &apid);
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if (retval != ERROR_OK)
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return retval;
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ap_old = dap->ap_current;
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dap_ap_select(dap, ap);
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/* Now we read ROM table ID registers, ref. ARM IHI 0029B sec */
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mem_ap = ((apid&0x10000) && ((apid&0x0F) != 0));
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command_print(cmd_ctx, "AP ID register 0x%8.8" PRIx32, apid);
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if (apid) {
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switch (apid&0x0F) {
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case 0:
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command_print(cmd_ctx, "\tType is JTAG-AP");
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break;
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case 1:
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command_print(cmd_ctx, "\tType is MEM-AP AHB");
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break;
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case 2:
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command_print(cmd_ctx, "\tType is MEM-AP APB");
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break;
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default:
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command_print(cmd_ctx, "\tUnknown AP type");
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break;
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}
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/* NOTE: a MEM-AP may have a single CoreSight component that's
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* not a ROM table ... or have no such components at all.
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*/
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if (mem_ap)
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command_print(cmd_ctx, "AP BASE 0x%8.8" PRIx32, dbgbase);
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} else
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command_print(cmd_ctx, "No AP found at this ap 0x%x", ap);
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romtable_present = ((mem_ap) && (dbgbase != 0xFFFFFFFF));
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if (romtable_present) {
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uint32_t cid0, cid1, cid2, cid3, memtype, romentry;
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uint16_t entry_offset;
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int i;
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char tabs[16 + 1];
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if (depth > 16) {
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command_print(cmd_ctx, "\tTables too deep");
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return ERROR_FAIL;
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}
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for (i = 0; i < depth; ++i)
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tabs[i] = '\t';
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tabs[i] = '\0';
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/* bit 16 of apid indicates a memory access port */
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if (dbgbase & 0x02)
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command_print(cmd_ctx, "\tValid ROM table present");
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command_print(cmd_ctx, "\t%sValid ROM table present", tabs);
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else
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command_print(cmd_ctx, "\tROM table in legacy format");
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command_print(cmd_ctx, "\t%sROM table in legacy format", tabs);
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/* Now we read ROM table ID registers, ref. ARM IHI 0029B sec */
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retval = mem_ap_read_u32(dap, (dbgbase&0xFFFFF000) | 0xFF0, &cid0);
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@ -1100,25 +1070,25 @@ static int dap_info_command(struct command_context *cmd_ctx,
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return retval;
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if (!is_dap_cid_ok(cid3, cid2, cid1, cid0))
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command_print(cmd_ctx, "\tCID3 0x%2.2x"
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", CID2 0x%2.2x"
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", CID1 0x%2.2x"
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", CID0 0x%2.2x",
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command_print(cmd_ctx, "\t%sCID3 0x%02x"
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", CID2 0x%02x"
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", CID1 0x%02x"
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", CID0 0x%02x",
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tabs,
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(unsigned)cid3, (unsigned)cid2,
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(unsigned)cid1, (unsigned)cid0);
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if (memtype & 0x01)
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command_print(cmd_ctx, "\tMEMTYPE system memory present on bus");
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command_print(cmd_ctx, "\t%sMEMTYPE system memory present on bus", tabs);
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else
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command_print(cmd_ctx, "\tMEMTYPE System memory not present. "
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"Dedicated debug bus.");
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command_print(cmd_ctx, "\t%sMEMTYPE system memory not present: dedicated debug bus", tabs);
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/* Now we read ROM table entries from dbgbase&0xFFFFF000) | 0x000 until we get 0x00000000 */
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entry_offset = 0;
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do {
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for (entry_offset = 0; ; entry_offset += 4) {
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retval = mem_ap_read_atomic_u32(dap, (dbgbase&0xFFFFF000) | entry_offset, &romentry);
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if (retval != ERROR_OK)
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return retval;
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command_print(cmd_ctx, "\tROMTABLE[0x%x] = 0x%" PRIx32 "", entry_offset, romentry);
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command_print(cmd_ctx, "\t%sROMTABLE[0x%x] = 0x%" PRIx32 "",
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tabs, entry_offset, romentry);
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if (romentry & 0x01) {
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uint32_t c_cid0, c_cid1, c_cid2, c_cid3;
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uint32_t c_pid0, c_pid1, c_pid2, c_pid3, c_pid4;
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@ -1130,8 +1100,11 @@ static int dap_info_command(struct command_context *cmd_ctx,
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/* IDs are in last 4K section */
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retval = mem_ap_read_atomic_u32(dap, component_base + 0xFE0, &c_pid0);
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if (retval != ERROR_OK)
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return retval;
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if (retval != ERROR_OK) {
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command_print(cmd_ctx, "\t%s\tCan't read component with base address 0x%" PRIx32
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", the corresponding core might be turned off", tabs, component_base);
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continue;
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}
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c_pid0 &= 0xff;
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retval = mem_ap_read_atomic_u32(dap, component_base + 0xFE4, &c_pid1);
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if (retval != ERROR_OK)
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@ -1167,12 +1140,12 @@ static int dap_info_command(struct command_context *cmd_ctx,
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return retval;
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c_cid3 &= 0xff;
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command_print(cmd_ctx, "\t\tComponent base address 0x%" PRIx32 ","
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"start address 0x%" PRIx32, component_base,
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command_print(cmd_ctx, "\t%s\tComponent base address 0x%" PRIx32 ", "
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"start address 0x%" PRIx32, tabs, component_base,
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/* component may take multiple 4K pages */
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component_base - 0x1000*(c_pid4 >> 4));
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command_print(cmd_ctx, "\t\tComponent class is 0x%x, %s",
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(int) (c_cid1 >> 4) & 0xf,
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(uint32_t)(component_base - 0x1000*(c_pid4 >> 4)));
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command_print(cmd_ctx, "\t%s\tComponent class is 0x%x, %s",
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tabs, (c_cid1 >> 4) & 0xf,
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/* See ARM IHI 0029B Table 3-3 */
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class_description[(c_cid1 >> 4) & 0xf]);
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@ -1283,25 +1256,26 @@ static int dap_info_command(struct command_context *cmd_ctx,
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}
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break;
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}
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command_print(cmd_ctx, "\t\tType is 0x%2.2x, %s, %s",
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(unsigned) (devtype & 0xff),
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command_print(cmd_ctx, "\t%s\tType is 0x%02x, %s, %s",
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tabs, devtype & 0xff,
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major, subtype);
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/* REVISIT also show 0xfc8 DevId */
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}
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if (!is_dap_cid_ok(cid3, cid2, cid1, cid0))
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command_print(cmd_ctx,
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"\t\tCID3 0%2.2x"
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", CID2 0%2.2x"
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", CID1 0%2.2x"
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", CID0 0%2.2x",
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"\t%s\tCID3 0%02x"
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", CID2 0%02x"
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", CID1 0%02x"
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", CID0 0%02x",
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tabs,
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(int)c_cid3,
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(int)c_cid2,
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(int)c_cid1,
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(int)c_cid0);
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command_print(cmd_ctx,
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"\t\tPeripheral ID[4..0] = hex "
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"%2.2x %2.2x %2.2x %2.2x %2.2x",
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"\t%s\tPeripheral ID[4..0] = hex "
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"%02x %02x %02x %02x %02x", tabs,
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(int)c_pid4, (int)c_pid3, (int)c_pid2,
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(int)c_pid1, (int)c_pid0);
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@ -1367,6 +1341,10 @@ static int dap_info_command(struct command_context *cmd_ctx,
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type = "Coresight TPIU";
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full = "(Trace Port Interface Unit)";
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break;
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case 0x913:
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type = "Coresight ITM";
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full = "(Instrumentation Trace Macrocell)";
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break;
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case 0x921:
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type = "Cortex-A8 ETM";
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full = "(Embedded Trace)";
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@ -1399,21 +1377,81 @@ static int dap_info_command(struct command_context *cmd_ctx,
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type = "Cortex-A8 Debug";
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full = "(Debug Unit)";
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break;
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case 0xc09:
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type = "Cortex-A9 Debug";
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full = "(Debug Unit)";
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break;
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default:
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type = "-*- unrecognized -*-";
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full = "";
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break;
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}
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command_print(cmd_ctx, "\t\tPart is %s %s",
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type, full);
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command_print(cmd_ctx, "\t%s\tPart is %s %s",
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tabs, type, full);
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/* ROM Table? */
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if (((c_cid1 >> 4) & 0x0f) == 1) {
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retval = dap_rom_display(cmd_ctx, dap, ap, component_base, depth + 1);
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if (retval != ERROR_OK)
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return retval;
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}
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} else {
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if (romentry)
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command_print(cmd_ctx, "\t\tComponent not present");
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command_print(cmd_ctx, "\t%s\tComponent not present", tabs);
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else
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command_print(cmd_ctx, "\t\tEnd of ROM table");
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break;
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}
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entry_offset += 4;
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} while (romentry > 0);
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}
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command_print(cmd_ctx, "\t%s\tEnd of ROM table", tabs);
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return ERROR_OK;
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}
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static int dap_info_command(struct command_context *cmd_ctx,
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struct adiv5_dap *dap, int ap)
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{
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int retval;
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uint32_t dbgbase = 0, apid = 0; /* Silence gcc by initializing */
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int romtable_present = 0;
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uint8_t mem_ap;
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uint32_t ap_old;
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retval = dap_get_debugbase(dap, ap, &dbgbase, &apid);
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if (retval != ERROR_OK)
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return retval;
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ap_old = dap->ap_current;
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dap_ap_select(dap, ap);
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/* Now we read ROM table ID registers, ref. ARM IHI 0029B sec */
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mem_ap = ((apid&0x10000) && ((apid&0x0F) != 0));
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command_print(cmd_ctx, "AP ID register 0x%8.8" PRIx32, apid);
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if (apid) {
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switch (apid&0x0F) {
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case 0:
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command_print(cmd_ctx, "\tType is JTAG-AP");
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break;
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case 1:
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command_print(cmd_ctx, "\tType is MEM-AP AHB");
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break;
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case 2:
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command_print(cmd_ctx, "\tType is MEM-AP APB");
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break;
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default:
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command_print(cmd_ctx, "\tUnknown AP type");
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break;
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}
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/* NOTE: a MEM-AP may have a single CoreSight component that's
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* not a ROM table ... or have no such components at all.
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*/
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if (mem_ap)
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command_print(cmd_ctx, "AP BASE 0x%8.8" PRIx32, dbgbase);
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} else
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command_print(cmd_ctx, "No AP found at this ap 0x%x", ap);
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romtable_present = ((mem_ap) && (dbgbase != 0xFFFFFFFF));
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if (romtable_present) {
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dap_rom_display(cmd_ctx, dap, ap, dbgbase, 0);
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} else
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command_print(cmd_ctx, "\tNo ROM table present");
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dap_ap_select(dap, ap_old);
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